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ARM: ebsa110: use __iomem pointers for MMIO
ARM is moving to stricter checks on readl/write functions, so we need to use the correct types everywhere. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@ -74,22 +74,22 @@ static struct map_desc ebsa110_io_desc[] __initdata = {
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* sparse external-decode ISAIO space
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*/
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{ /* IRQ_STAT/IRQ_MCLR */
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.virtual = IRQ_STAT,
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.virtual = (unsigned long)IRQ_STAT,
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.pfn = __phys_to_pfn(TRICK4_PHYS),
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.length = TRICK4_SIZE,
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.type = MT_DEVICE
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}, { /* IRQ_MASK/IRQ_MSET */
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.virtual = IRQ_MASK,
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.virtual = (unsigned long)IRQ_MASK,
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.pfn = __phys_to_pfn(TRICK3_PHYS),
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.length = TRICK3_SIZE,
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.type = MT_DEVICE
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}, { /* SOFT_BASE */
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.virtual = SOFT_BASE,
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.virtual = (unsigned long)SOFT_BASE,
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.pfn = __phys_to_pfn(TRICK1_PHYS),
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.length = TRICK1_SIZE,
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.type = MT_DEVICE
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}, { /* PIT_BASE */
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.virtual = PIT_BASE,
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.virtual = (unsigned long)PIT_BASE,
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.pfn = __phys_to_pfn(TRICK0_PHYS),
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.length = TRICK0_SIZE,
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.type = MT_DEVICE
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@ -31,11 +31,11 @@
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#define TRICK7_PHYS 0xf3c00000
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/* Virtual addresses */
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#define PIT_BASE 0xfc000000 /* trick 0 */
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#define SOFT_BASE 0xfd000000 /* trick 1 */
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#define IRQ_MASK 0xfe000000 /* trick 3 - read */
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#define IRQ_MSET 0xfe000000 /* trick 3 - write */
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#define IRQ_STAT 0xff000000 /* trick 4 - read */
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#define IRQ_MCLR 0xff000000 /* trick 4 - write */
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#define PIT_BASE IOMEM(0xfc000000) /* trick 0 */
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#define SOFT_BASE IOMEM(0xfd000000) /* trick 1 */
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#define IRQ_MASK IOMEM(0xfe000000) /* trick 3 - read */
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#define IRQ_MSET IOMEM(0xfe000000) /* trick 3 - write */
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#define IRQ_STAT IOMEM(0xff000000) /* trick 4 - read */
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#define IRQ_MCLR IOMEM(0xff000000) /* trick 4 - write */
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#endif
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