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ARM: LPC32xx: Adjust dts files to gpio dt binding

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The GPIO devicetree binding in 3.5 doesn't register the various LPC32xx GPIO
banks via DT subnodes but always all at once, and changes the gpio referencing
to 3 cells (bank, gpio, flags). This patch adjusts the DTS files to this
binding that was just accepted to the gpio subsystem.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Roland Stigge 2012-05-19 12:28:53 +02:00 committed by Olof Johansson
parent af56e0aa35
commit a035254aef
2 changed files with 4 additions and 41 deletions
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41
arch/arm/boot/dts/lpc32xx.dtsi
View File

@ -215,45 +215,8 @@
gpio: gpio@40028000 {
compatible = "nxp,lpc3220-gpio";
reg = <0x40028000 0x1000>;
/* create a private address space for enumeration */
#address-cells = <1>;
#size-cells = <0>;
gpio_p0: gpio-bank@0 {
gpio-controller;
#gpio-cells = <2>;
reg = <0>;
};
gpio_p1: gpio-bank@1 {
gpio-controller;
#gpio-cells = <2>;
reg = <1>;
};
gpio_p2: gpio-bank@2 {
gpio-controller;
#gpio-cells = <2>;
reg = <2>;
};
gpio_p3: gpio-bank@3 {
gpio-controller;
#gpio-cells = <2>;
reg = <3>;
};
gpi_p3: gpio-bank@4 {
gpio-controller;
#gpio-cells = <2>;
reg = <4>;
};
gpo_p3: gpio-bank@5 {
gpio-controller;
#gpio-cells = <2>;
reg = <5>;
};
gpio-controller;
#gpio-cells = <3>; /* bank, pin, flags */
};
watchdog@4003C000 {

4
arch/arm/boot/dts/phy3250.dts
View File

@ -131,13 +131,13 @@
compatible = "gpio-leds";
led0 {
gpios = <&gpo_p3 1 1>; /* GPO_P3 1, GPIO 80, active low */
gpios = <&gpio 5 1 1>; /* GPO_P3 1, GPIO 80, active low */
linux,default-trigger = "heartbeat";
default-state = "off";
};
led1 {
gpios = <&gpo_p3 14 1>; /* GPO_P3 14, GPIO 93, active low */
gpios = <&gpio 5 14 1>; /* GPO_P3 14, GPIO 93, active low */
linux,default-trigger = "timer";
default-state = "off";
};