Minki/linux
1
0
Fork 1
mirror of https://github.com/torvalds/linux.git synced 2024-12-11 05:33:09 +00:00
Code Issues Packages Projects Releases Wiki Activity

media: imx-pxp: extract helper function to setup data path

Browse Source 
The driver must configure the data path through the Pixel Pipeline.

Currently, the driver is using a fixed setup, but once there are
different pipeline configurations, it is helpful to have a dedicated
function for determining the register value for the data path.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
This commit is contained in:
Michael Tretter 2023-01-13 10:54:09 +01:00 committed by Mauro Carvalho Chehab
parent a4a69d1386
commit 9fb41a0583
1 changed files with 42 additions and 20 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

62
drivers/media/platform/nxp/imx-pxp.c
View File

@ -724,6 +724,47 @@ static void pxp_setup_csc(struct pxp_ctx *ctx)
} }
} }
static u32 pxp_data_path_ctrl0(struct pxp_ctx *ctx)
{
u32 ctrl0;
ctrl0 = 0;
ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX15_SEL(0);
ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX14_SEL(1);
ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX13_SEL(0);
ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX12_SEL(0);
ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX11_SEL(0);
ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX10_SEL(0);
ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX9_SEL(1);
ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX8_SEL(0);
ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX7_SEL(0);
ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX6_SEL(0);
ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX5_SEL(0);
ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX4_SEL(0);
ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX3_SEL(0);
ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX2_SEL(0);
ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX1_SEL(0);
ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX0_SEL(0);
return ctrl0;
}
static void pxp_set_data_path(struct pxp_ctx *ctx)
{
struct pxp_dev *dev = ctx->dev;
u32 ctrl0;
u32 ctrl1;
ctrl0 = pxp_data_path_ctrl0(ctx);
ctrl1 = 0;
ctrl1 |= BF_PXP_DATA_PATH_CTRL1_MUX17_SEL(1);
ctrl1 |= BF_PXP_DATA_PATH_CTRL1_MUX16_SEL(1);
writel(ctrl0, dev->mmio + HW_PXP_DATA_PATH_CTRL0);
writel(ctrl1, dev->mmio + HW_PXP_DATA_PATH_CTRL1);
}
static int pxp_start(struct pxp_ctx *ctx, struct vb2_v4l2_buffer *in_vb, static int pxp_start(struct pxp_ctx *ctx, struct vb2_v4l2_buffer *in_vb,
struct vb2_v4l2_buffer *out_vb) struct vb2_v4l2_buffer *out_vb)
{ {
@ -910,26 +951,7 @@ static int pxp_start(struct pxp_ctx *ctx, struct vb2_v4l2_buffer *in_vb,
/* bypass LUT */ /* bypass LUT */
writel(BM_PXP_LUT_CTRL_BYPASS, dev->mmio + HW_PXP_LUT_CTRL); writel(BM_PXP_LUT_CTRL_BYPASS, dev->mmio + HW_PXP_LUT_CTRL);
writel(BF_PXP_DATA_PATH_CTRL0_MUX15_SEL(0)| pxp_set_data_path(ctx);
BF_PXP_DATA_PATH_CTRL0_MUX14_SEL(1)|
BF_PXP_DATA_PATH_CTRL0_MUX13_SEL(0)|
BF_PXP_DATA_PATH_CTRL0_MUX12_SEL(0)|
BF_PXP_DATA_PATH_CTRL0_MUX11_SEL(0)|
BF_PXP_DATA_PATH_CTRL0_MUX10_SEL(0)|
BF_PXP_DATA_PATH_CTRL0_MUX9_SEL(1)|
BF_PXP_DATA_PATH_CTRL0_MUX8_SEL(0)|
BF_PXP_DATA_PATH_CTRL0_MUX7_SEL(0)|
BF_PXP_DATA_PATH_CTRL0_MUX6_SEL(0)|
BF_PXP_DATA_PATH_CTRL0_MUX5_SEL(0)|
BF_PXP_DATA_PATH_CTRL0_MUX4_SEL(0)|
BF_PXP_DATA_PATH_CTRL0_MUX3_SEL(0)|
BF_PXP_DATA_PATH_CTRL0_MUX2_SEL(0)|
BF_PXP_DATA_PATH_CTRL0_MUX1_SEL(0)|
BF_PXP_DATA_PATH_CTRL0_MUX0_SEL(0),
dev->mmio + HW_PXP_DATA_PATH_CTRL0);
writel(BF_PXP_DATA_PATH_CTRL1_MUX17_SEL(1) |
BF_PXP_DATA_PATH_CTRL1_MUX16_SEL(1),
dev->mmio + HW_PXP_DATA_PATH_CTRL1);
writel(0xffff, dev->mmio + HW_PXP_IRQ_MASK); writel(0xffff, dev->mmio + HW_PXP_IRQ_MASK);