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media: imx-pxp: extract helper function to setup data path
The driver must configure the data path through the Pixel Pipeline. Currently, the driver is using a fixed setup, but once there are different pipeline configurations, it is helpful to have a dedicated function for determining the register value for the data path. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
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@ -724,6 +724,47 @@ static void pxp_setup_csc(struct pxp_ctx *ctx)
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}
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}
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static u32 pxp_data_path_ctrl0(struct pxp_ctx *ctx)
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{
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u32 ctrl0;
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ctrl0 = 0;
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ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX15_SEL(0);
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ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX14_SEL(1);
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ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX13_SEL(0);
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ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX12_SEL(0);
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ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX11_SEL(0);
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ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX10_SEL(0);
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ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX9_SEL(1);
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ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX8_SEL(0);
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ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX7_SEL(0);
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ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX6_SEL(0);
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ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX5_SEL(0);
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ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX4_SEL(0);
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ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX3_SEL(0);
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ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX2_SEL(0);
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ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX1_SEL(0);
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ctrl0 |= BF_PXP_DATA_PATH_CTRL0_MUX0_SEL(0);
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return ctrl0;
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}
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static void pxp_set_data_path(struct pxp_ctx *ctx)
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{
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struct pxp_dev *dev = ctx->dev;
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u32 ctrl0;
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u32 ctrl1;
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ctrl0 = pxp_data_path_ctrl0(ctx);
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ctrl1 = 0;
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ctrl1 |= BF_PXP_DATA_PATH_CTRL1_MUX17_SEL(1);
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ctrl1 |= BF_PXP_DATA_PATH_CTRL1_MUX16_SEL(1);
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writel(ctrl0, dev->mmio + HW_PXP_DATA_PATH_CTRL0);
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writel(ctrl1, dev->mmio + HW_PXP_DATA_PATH_CTRL1);
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}
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static int pxp_start(struct pxp_ctx *ctx, struct vb2_v4l2_buffer *in_vb,
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struct vb2_v4l2_buffer *out_vb)
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{
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@ -910,26 +951,7 @@ static int pxp_start(struct pxp_ctx *ctx, struct vb2_v4l2_buffer *in_vb,
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/* bypass LUT */
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writel(BM_PXP_LUT_CTRL_BYPASS, dev->mmio + HW_PXP_LUT_CTRL);
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writel(BF_PXP_DATA_PATH_CTRL0_MUX15_SEL(0)|
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BF_PXP_DATA_PATH_CTRL0_MUX14_SEL(1)|
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BF_PXP_DATA_PATH_CTRL0_MUX13_SEL(0)|
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BF_PXP_DATA_PATH_CTRL0_MUX12_SEL(0)|
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BF_PXP_DATA_PATH_CTRL0_MUX11_SEL(0)|
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BF_PXP_DATA_PATH_CTRL0_MUX10_SEL(0)|
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BF_PXP_DATA_PATH_CTRL0_MUX9_SEL(1)|
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BF_PXP_DATA_PATH_CTRL0_MUX8_SEL(0)|
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BF_PXP_DATA_PATH_CTRL0_MUX7_SEL(0)|
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BF_PXP_DATA_PATH_CTRL0_MUX6_SEL(0)|
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BF_PXP_DATA_PATH_CTRL0_MUX5_SEL(0)|
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BF_PXP_DATA_PATH_CTRL0_MUX4_SEL(0)|
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BF_PXP_DATA_PATH_CTRL0_MUX3_SEL(0)|
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BF_PXP_DATA_PATH_CTRL0_MUX2_SEL(0)|
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BF_PXP_DATA_PATH_CTRL0_MUX1_SEL(0)|
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BF_PXP_DATA_PATH_CTRL0_MUX0_SEL(0),
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dev->mmio + HW_PXP_DATA_PATH_CTRL0);
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writel(BF_PXP_DATA_PATH_CTRL1_MUX17_SEL(1) |
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BF_PXP_DATA_PATH_CTRL1_MUX16_SEL(1),
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dev->mmio + HW_PXP_DATA_PATH_CTRL1);
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pxp_set_data_path(ctx);
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writel(0xffff, dev->mmio + HW_PXP_IRQ_MASK);
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