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ath9k: Fix bug in rate table
The following commit added an entry in 11na and 11ng rate table but missed to update its rate count field. This inconsistency between the rate count and the actual number of rates in the table will leave out the final rate entry (mcs15 with half gi in ht40) while forming the valid rate indices. Not having mcs15+shortGI in ht40 will have a performance impact (on max throughput) of about 10% both in nght40 and naht40 mode. Author: Vasanthakumar Thiagarajan <vasanth@atheros.com> Date: Thu May 13 18:42:38 2010 -0700 ath9k: Enable Short GI in 20 Mhz for ar9287 and later chips This patch enables short GI rx at all rates and tx at mcs15 for 20 Mhz channel width also. Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -20,7 +20,7 @@
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#include "ath9k.h"
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static const struct ath_rate_table ar5416_11na_ratetable = {
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42,
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43,
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8, /* MCS start */
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{
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{ VALID, VALID, WLAN_RC_PHY_OFDM, 6000, /* 6 Mb */
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@ -118,7 +118,7 @@ static const struct ath_rate_table ar5416_11na_ratetable = {
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* for HT are the 64K max aggregate limit */
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static const struct ath_rate_table ar5416_11ng_ratetable = {
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46,
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47,
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12, /* MCS start */
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{
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{ VALID_ALL, VALID_ALL, WLAN_RC_PHY_CCK, 1000, /* 1 Mb */
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