Minki/linux
1
0
Fork 1
mirror of https://github.com/torvalds/linux.git synced 2024-12-20 01:52:13 +00:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'master'

Browse Source
This commit is contained in:
Jeff Garzik 2005-10-28 18:50:09 -04:00
commit 9dfb7808fb
602 changed files with 17194 additions and 9678 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
CREDITS
View File

@ -2247,6 +2247,12 @@ S: 249 Nichols Avenue
S: Syracuse, New York 13206
S: USA
N: Kyle McMartin
E: kyle@parisc-linux.org
D: Linux/PARISC hacker
D: AD1889 sound driver
S: Ottawa, Canada
N: Dirk Melchers
E: dirk@merlin.nbg.sub.org
D: 8 bit XT hard disk driver for OMTI5520

2
Documentation/Changes
View File

@ -65,7 +65,7 @@ o isdn4k-utils 3.1pre1 # isdnctrl 2>&1|grep version
o nfs-utils 1.0.5 # showmount --version
o procps 3.2.0 # ps --version
o oprofile 0.9 # oprofiled --version
o udev 058 # udevinfo -V
o udev 071 # udevinfo -V
Kernel compilation
==================

3
Documentation/DocBook/writing_usb_driver.tmpl
View File

@ -345,8 +345,7 @@ if (!retval) {
<programlisting>
static inline void skel_delete (struct usb_skel *dev)
{
if (dev->bulk_in_buffer != NULL)
kfree (dev->bulk_in_buffer);
kfree (dev->bulk_in_buffer);
if (dev->bulk_out_buffer != NULL)
usb_buffer_free (dev->udev, dev->bulk_out_size,
dev->bulk_out_buffer,

68
Documentation/driver-model/driver.txt
View File

@ -14,8 +14,8 @@ struct device_driver {
int (*probe) (struct device * dev);
int (*remove) (struct device * dev);
int (*suspend) (struct device * dev, pm_message_t state, u32 level);
int (*resume) (struct device * dev, u32 level);
int (*suspend) (struct device * dev, pm_message_t state);
int (*resume) (struct device * dev);
};
@ -194,69 +194,13 @@ device; i.e. anything in the device's driver_data field.
If the device is still present, it should quiesce the device and place
it into a supported low-power state.
int (*suspend) (struct device * dev, pm_message_t state, u32 level);
int (*suspend) (struct device * dev, pm_message_t state);
suspend is called to put the device in a low power state. There are
several stages to successfully suspending a device, which is denoted in
the @level parameter. Breaking the suspend transition into several
stages affords the platform flexibility in performing device power
management based on the requirements of the system and the
user-defined policy.
suspend is called to put the device in a low power state.
SUSPEND_NOTIFY notifies the device that a suspend transition is about
to happen. This happens on system power state transitions to verify
that all devices can successfully suspend.
int (*resume) (struct device * dev);
A driver may choose to fail on this call, which should cause the
entire suspend transition to fail. A driver should fail only if it
knows that the device will not be able to be resumed properly when the
system wakes up again. It could also fail if it somehow determines it
is in the middle of an operation too important to stop.
SUSPEND_DISABLE tells the device to stop I/O transactions. When it
stops transactions, or what it should do with unfinished transactions
is a policy of the driver. After this call, the driver should not
accept any other I/O requests.
SUSPEND_SAVE_STATE tells the device to save the context of the
hardware. This includes any bus-specific hardware state and
device-specific hardware state. A pointer to this saved state can be
stored in the device's saved_state field.
SUSPEND_POWER_DOWN tells the driver to place the device in the low
power state requested.
Whether suspend is called with a given level is a policy of the
platform. Some levels may be omitted; drivers must not assume the
reception of any level. However, all levels must be called in the
order above; i.e. notification will always come before disabling;
disabling the device will come before suspending the device.
All calls are made with interrupts enabled, except for the
SUSPEND_POWER_DOWN level.
int (*resume) (struct device * dev, u32 level);
Resume is used to bring a device back from a low power state. Like the
suspend transition, it happens in several stages.
RESUME_POWER_ON tells the driver to set the power state to the state
before the suspend call (The device could have already been in a low
power state before the suspend call to put in a lower power state).
RESUME_RESTORE_STATE tells the driver to restore the state saved by
the SUSPEND_SAVE_STATE suspend call.
RESUME_ENABLE tells the driver to start accepting I/O transactions
again. Depending on driver policy, the device may already have pending
I/O requests.
RESUME_POWER_ON is called with interrupts disabled. The other resume
levels are called with interrupts enabled.
As with the various suspend stages, the driver must not assume that
any other resume calls have been or will be made. Each call should be
self-contained and not dependent on any external state.
Resume is used to bring a device back from a low power state.
Attributes

2
Documentation/driver-model/porting.txt
View File

@ -350,7 +350,7 @@ When a driver is registered, the bus's list of devices is iterated
over. bus->match() is called for each device that is not already
claimed by a driver.
When a device is successfully bound to a device, device->driver is
When a device is successfully bound to a driver, device->driver is
set, the device is added to a per-driver list of devices, and a
symlink is created in the driver's sysfs directory that points to the
device's physical directory:

8
Documentation/hwmon/it87
View File

@ -4,18 +4,18 @@ Kernel driver it87
Supported chips:
* IT8705F
Prefix: 'it87'
Addresses scanned: from Super I/O config space, or default ISA 0x290 (8 I/O ports)
Addresses scanned: from Super I/O config space (8 I/O ports)
Datasheet: Publicly available at the ITE website
http://www.ite.com.tw/
* IT8712F
Prefix: 'it8712'
Addresses scanned: I2C 0x28 - 0x2f
from Super I/O config space, or default ISA 0x290 (8 I/O ports)
from Super I/O config space (8 I/O ports)
Datasheet: Publicly available at the ITE website
http://www.ite.com.tw/
* SiS950 [clone of IT8705F]
Prefix: 'sis950'
Addresses scanned: from Super I/O config space, or default ISA 0x290 (8 I/O ports)
Prefix: 'it87'
Addresses scanned: from Super I/O config space (8 I/O ports)
Datasheet: No longer be available
Author: Christophe Gauthron <chrisg@0-in.com>

47
Documentation/hwmon/lm90
View File

@ -24,14 +24,14 @@ Supported chips:
http://www.national.com/pf/LM/LM86.html
* Analog Devices ADM1032
Prefix: 'adm1032'
Addresses scanned: I2C 0x4c
Addresses scanned: I2C 0x4c and 0x4d
Datasheet: Publicly available at the Analog Devices website
http://products.analog.com/products/info.asp?product=ADM1032
http://www.analog.com/en/prod/0,2877,ADM1032,00.html
* Analog Devices ADT7461
Prefix: 'adt7461'
Addresses scanned: I2C 0x4c
Addresses scanned: I2C 0x4c and 0x4d
Datasheet: Publicly available at the Analog Devices website
http://products.analog.com/products/info.asp?product=ADT7461
http://www.analog.com/en/prod/0,2877,ADT7461,00.html
Note: Only if in ADM1032 compatibility mode
* Maxim MAX6657
Prefix: 'max6657'
@ -71,8 +71,8 @@ increased resolution of the remote temperature measurement.
The different chipsets of the family are not strictly identical, although
very similar. This driver doesn't handle any specific feature for now,
but could if there ever was a need for it. For reference, here comes a
non-exhaustive list of specific features:
with the exception of SMBus PEC. For reference, here comes a non-exhaustive
list of specific features:
LM90:
* Filter and alert configuration register at 0xBF.
@ -91,6 +91,7 @@ ADM1032:
* Conversion averaging.
* Up to 64 conversions/s.
* ALERT is triggered by open remote sensor.
* SMBus PEC support for Write Byte and Receive Byte transactions.
ADT7461
* Extended temperature range (breaks compatibility)
@ -119,3 +120,37 @@ The lm90 driver will not update its values more frequently than every
other second; reading them more often will do no harm, but will return
'old' values.
PEC Support
-----------
The ADM1032 is the only chip of the family which supports PEC. It does
not support PEC on all transactions though, so some care must be taken.
When reading a register value, the PEC byte is computed and sent by the
ADM1032 chip. However, in the case of a combined transaction (SMBus Read
Byte), the ADM1032 computes the CRC value over only the second half of
the message rather than its entirety, because it thinks the first half
of the message belongs to a different transaction. As a result, the CRC
value differs from what the SMBus master expects, and all reads fail.
For this reason, the lm90 driver will enable PEC for the ADM1032 only if
the bus supports the SMBus Send Byte and Receive Byte transaction types.
These transactions will be used to read register values, instead of
SMBus Read Byte, and PEC will work properly.
Additionally, the ADM1032 doesn't support SMBus Send Byte with PEC.
Instead, it will try to write the PEC value to the register (because the
SMBus Send Byte transaction with PEC is similar to a Write Byte transaction
without PEC), which is not what we want. Thus, PEC is explicitely disabled
on SMBus Send Byte transactions in the lm90 driver.
PEC on byte data transactions represents a significant increase in bandwidth
usage (+33% for writes, +25% for reads) in normal conditions. With the need
to use two SMBus transaction for reads, this overhead jumps to +50%. Worse,
two transactions will typically mean twice as much delay waiting for
transaction completion, effectively doubling the register cache refresh time.
I guess reliability comes at a price, but it's quite expensive this time.
So, as not everyone might enjoy the slowdown, PEC can be disabled through
sysfs. Just write 0 to the "pec" file and PEC will be disabled. Write 1
to that file to enable PEC again.

8
Documentation/hwmon/smsc47b397
View File

@ -3,6 +3,7 @@ Kernel driver smsc47b397
Supported chips:
* SMSC LPC47B397-NC
* SMSC SCH5307-NS
Prefix: 'smsc47b397'
Addresses scanned: none, address read from Super I/O config space
Datasheet: In this file
@ -12,11 +13,14 @@ Authors: Mark M. Hoffman <mhoffman@lightlink.com>
November 23, 2004
The following specification describes the SMSC LPC47B397-NC sensor chip
The following specification describes the SMSC LPC47B397-NC[1] sensor chip
(for which there is no public datasheet available). This document was
provided by Craig Kelly (In-Store Broadcast Network) and edited/corrected
by Mark M. Hoffman <mhoffman@lightlink.com>.
[1] And SMSC SCH5307-NS, which has a different device ID but is otherwise
compatible.
* * * * *
Methods for detecting the HP SIO and reading the thermal data on a dc7100.
@ -127,7 +131,7 @@ OUT DX,AL
The registers of interest for identifying the SIO on the dc7100 are Device ID
(0x20) and Device Rev (0x21).
The Device ID will read 0X6F
The Device ID will read 0x6F (for SCH5307-NS, 0x81)
The Device Rev currently reads 0x01
Obtaining the HWM Base Address.

7
Documentation/hwmon/smsc47m1
View File

@ -12,6 +12,10 @@ Supported chips:
http://www.smsc.com/main/datasheets/47m14x.pdf
http://www.smsc.com/main/tools/discontinued/47m15x.pdf
http://www.smsc.com/main/datasheets/47m192.pdf
* SMSC LPC47M997
Addresses scanned: none, address read from Super I/O config space
Prefix: 'smsc47m1'
Datasheet: none
Authors:
Mark D. Studebaker <mdsxyz123@yahoo.com>,
@ -30,6 +34,9 @@ The 47M15x and 47M192 chips contain a full 'hardware monitoring block'
in addition to the fan monitoring and control. The hardware monitoring
block is not supported by the driver.
No documentation is available for the 47M997, but it has the same device
ID as the 47M15x and 47M192 chips and seems to be compatible.
Fan rotation speeds are reported in RPM (rotations per minute). An alarm is
triggered if the rotation speed has dropped below a programmable limit. Fan
readings can be divided by a programmable divider (1, 2, 4 or 8) to give

3
Documentation/hwmon/sysfs-interface
View File

@ -272,3 +272,6 @@ beep_mask Bitmask for beep.
eeprom Raw EEPROM data in binary form.
Read only.
pec Enable or disable PEC (SMBus only)
Read/Write

17
Documentation/hwmon/via686a
View File

@ -18,8 +18,9 @@ Authors:
Module Parameters
-----------------
force_addr=0xaddr Set the I/O base address. Useful for Asus A7V boards
that don't set the address in the BIOS. Does not do a
force_addr=0xaddr Set the I/O base address. Useful for boards that
don't set the address in the BIOS. Look for a BIOS
upgrade before resorting to this. Does not do a
PCI force; the via686a must still be present in lspci.
Don't use this unless the driver complains that the
base address is not set.
@ -63,3 +64,15 @@ miss once-only alarms.
The driver only updates its values each 1.5 seconds; reading it more often
will do no harm, but will return 'old' values.
Known Issues
------------
This driver handles sensors integrated in some VIA south bridges. It is
possible that a motherboard maker used a VT82C686A/B chip as part of a
product design but was not interested in its hardware monitoring features,
in which case the sensor inputs will not be wired. This is the case of
the Asus K7V, A7V and A7V133 motherboards, to name only a few of them.
So, if you need the force_addr parameter, and end up with values which
don't seem to make any sense, don't look any further: your chip is simply
not wired for hardware monitoring.

1
Documentation/i2c/busses/i2c-i810
View File

@ -2,6 +2,7 @@ Kernel driver i2c-i810
Supported adapters:
* Intel 82810, 82810-DC100, 82810E, and 82815 (GMCH)
* Intel 82845G (GMCH)
Authors:
Frodo Looijaard <frodol@dds.nl>,

27
Documentation/i2c/busses/i2c-viapro
View File

@ -4,17 +4,18 @@ Supported adapters:
* VIA Technologies, Inc. VT82C596A/B
Datasheet: Sometimes available at the VIA website
* VIA Technologies, Inc. VT82C686A/B
* VIA Technologies, Inc. VT82C686A/B
Datasheet: Sometimes available at the VIA website
* VIA Technologies, Inc. VT8231, VT8233, VT8233A, VT8235, VT8237
Datasheet: available on request from Via
Authors:
Frodo Looijaard <frodol@dds.nl>,
Philip Edelbrock <phil@netroedge.com>,
Kyösti Mälkki <kmalkki@cc.hut.fi>,
Mark D. Studebaker <mdsxyz123@yahoo.com>
Frodo Looijaard <frodol@dds.nl>,
Philip Edelbrock <phil@netroedge.com>,
Kyösti Mälkki <kmalkki@cc.hut.fi>,
Mark D. Studebaker <mdsxyz123@yahoo.com>,
Jean Delvare <khali@linux-fr.org>
Module Parameters
-----------------
@ -28,20 +29,22 @@ Description
-----------
i2c-viapro is a true SMBus host driver for motherboards with one of the
supported VIA southbridges.
supported VIA south bridges.
Your lspci -n listing must show one of these :
device 1106:3050 (VT82C596 function 3)
device 1106:3051 (VT82C596 function 3)
device 1106:3050 (VT82C596A function 3)
device 1106:3051 (VT82C596B function 3)
device 1106:3057 (VT82C686 function 4)
device 1106:3074 (VT8233)
device 1106:3147 (VT8233A)
device 1106:8235 (VT8231)
devide 1106:3177 (VT8235)
devide 1106:3227 (VT8237)
device 1106:8235 (VT8231 function 4)
device 1106:3177 (VT8235)
device 1106:3227 (VT8237R)
If none of these show up, you should look in the BIOS for settings like
enable ACPI / SMBus or even USB.
Except for the oldest chips (VT82C596A/B, VT82C686A and most probably
VT8231), this driver supports I2C block transactions. Such transactions
are mainly useful to read from and write to EEPROMs.

38
Documentation/i2c/chips/x1205 Normal file
View File

@ -0,0 +1,38 @@
Kernel driver x1205
===================
Supported chips:
* Xicor X1205 RTC
Prefix: 'x1205'
Addresses scanned: none
Datasheet: http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html
Authors:
Karen Spearel <kas11@tampabay.rr.com>,
Alessandro Zummo <a.zummo@towertech.it>
Description
-----------
This module aims to provide complete access to the Xicor X1205 RTC.
Recently Xicor has merged with Intersil, but the chip is
still sold under the Xicor brand.
This chip is located at address 0x6f and uses a 2-byte register addressing.
Two bytes need to be written to read a single register, while most
other chips just require one and take the second one as the data
to be written. To prevent corrupting unknown chips, the user must
explicitely set the probe parameter.
example:
modprobe x1205 probe=0,0x6f
The module supports one more option, hctosys, which is used to set the
software clock from the x1205. On systems where the x1205 is the
only hardware rtc, this parameter could be used to achieve a correct
date/time earlier in the system boot sequence.
example:
modprobe x1205 probe=0,0x6f hctosys=1

7
Documentation/i2c/functionality
View File

@ -17,9 +17,10 @@ For the most up-to-date list of functionality constants, please check
I2C_FUNC_I2C Plain i2c-level commands (Pure SMBus
adapters typically can not do these)
I2C_FUNC_10BIT_ADDR Handles the 10-bit address extensions
I2C_FUNC_PROTOCOL_MANGLING Knows about the I2C_M_REV_DIR_ADDR,
I2C_M_REV_DIR_ADDR and I2C_M_REV_DIR_NOSTART
flags (which modify the i2c protocol!)
I2C_FUNC_PROTOCOL_MANGLING Knows about the I2C_M_IGNORE_NAK,
I2C_M_REV_DIR_ADDR, I2C_M_NOSTART and
I2C_M_NO_RD_ACK flags (which modify the
I2C protocol!)
I2C_FUNC_SMBUS_QUICK Handles the SMBus write_quick command
I2C_FUNC_SMBUS_READ_BYTE Handles the SMBus read_byte command
I2C_FUNC_SMBUS_WRITE_BYTE Handles the SMBus write_byte command

2
Documentation/i2c/porting-clients
View File

@ -82,7 +82,7 @@ Technical changes:
exit and exit_free. For i2c+isa drivers, labels should be named
ERROR0, ERROR1 and ERROR2. Don't forget to properly set err before
jumping to error labels. By the way, labels should be left-aligned.
Use memset to fill the client and data area with 0x00.
Use kzalloc instead of kmalloc.
Use i2c_set_clientdata to set the client data (as opposed to
a direct access to client->data).
Use strlcpy instead of strcpy to copy the client name.

27
Documentation/i2c/writing-clients
View File

@ -33,8 +33,8 @@ static struct i2c_driver foo_driver = {
.command = &foo_command /* may be NULL */
}
The name can be chosen freely, and may be upto 40 characters long. Please
use something descriptive here.
The name field must match the driver name, including the case. It must not
contain spaces, and may be up to 31 characters long.
Don't worry about the flags field; just put I2C_DF_NOTIFY into it. This
means that your driver will be notified when new adapters are found.
@ -43,9 +43,6 @@ This is almost always what you want.
All other fields are for call-back functions which will be explained
below.
There use to be two additional fields in this structure, inc_use et dec_use,
for module usage count, but these fields were obsoleted and removed.
Extra client data
=================
@ -58,6 +55,7 @@ be very useful.
An example structure is below.
struct foo_data {
struct i2c_client client;
struct semaphore lock; /* For ISA access in `sensors' drivers. */
int sysctl_id; /* To keep the /proc directory entry for
`sensors' drivers. */
@ -310,22 +308,15 @@ For now, you can ignore the `flags' parameter. It is there for future use.
client structure, even though we cannot fill it completely yet.
But it allows us to access several i2c functions safely */
/* Note that we reserve some space for foo_data too. If you don't
need it, remove it. We do it here to help to lessen memory
fragmentation. */
if (! (new_client = kmalloc(sizeof(struct i2c_client) +
sizeof(struct foo_data),
GFP_KERNEL))) {
if (!(data = kzalloc(sizeof(struct foo_data), GFP_KERNEL))) {
err = -ENOMEM;
goto ERROR0;
}
/* This is tricky, but it will set the data to the right value. */
client->data = new_client + 1;
data = (struct foo_data *) (client->data);
new_client = &data->client;
i2c_set_clientdata(new_client, data);
new_client->addr = address;
new_client->data = data;
new_client->adapter = adapter;
new_client->driver = &foo_driver;
new_client->flags = 0;
@ -451,7 +442,7 @@ much simpler than the attachment code, fortunately!
release_region(client->addr,LM78_EXTENT);
/* HYBRID SENSORS CHIP ONLY END */
kfree(client); /* Frees client data too, if allocated at the same time */
kfree(data);
return 0;
}
@ -576,12 +567,12 @@ SMBus communication
extern s32 i2c_smbus_write_block_data(struct i2c_client * client,
u8 command, u8 length,
u8 *values);
extern s32 i2c_smbus_read_i2c_block_data(struct i2c_client * client,
u8 command, u8 *values);
These ones were removed in Linux 2.6.10 because they had no users, but could
be added back later if needed:
extern s32 i2c_smbus_read_i2c_block_data(struct i2c_client * client,
u8 command, u8 *values);
extern s32 i2c_smbus_read_block_data(struct i2c_client * client,
u8 command, u8 *values);
extern s32 i2c_smbus_write_i2c_block_data(struct i2c_client * client,

15
MAINTAINERS
View File

@ -197,6 +197,15 @@ M: Thorsten Knabe <linux@thorsten-knabe.de>
W: http://linux.thorsten-knabe.de
S: Maintained
AD1889 SOUND DRIVER
P: Kyle McMartin
M: kyle@parisc-linux.org
P: Thibaut Varene
M: T-Bone@parisc-linux.org
W: http://wiki.parisc-linux.org/AD1889
L: parisc-linux@lists.parisc-linux.org
S: Maintained
ADM1025 HARDWARE MONITOR DRIVER
P: Jean Delvare
M: khali@linux-fr.org
@ -2727,6 +2736,12 @@ P: Roger Luethi
M: rl@hellgate.ch
S: Maintained
VIAPRO SMBUS DRIVER
P: Jean Delvare
M: khali@linux-fr.org
L: lm-sensors@lm-sensors.org
S: Maintained
UCLINUX (AND M68KNOMMU)
P: Greg Ungerer
M: gerg@uclinux.org

4
Makefile
View File

@ -371,8 +371,8 @@ export MODVERDIR := $(if $(KBUILD_EXTMOD),$(firstword $(KBUILD_EXTMOD))/).tmp_ve
# Files to ignore in find ... statements
RCS_FIND_IGNORE := \( -name SCCS -o -name BitKeeper -o -name .svn -o -name CVS -o -name .pc -o -name .hg \) -prune -o
export RCS_TAR_IGNORE := --exclude SCCS --exclude BitKeeper --exclude .svn --exclude CVS --exclude .pc --exclude .hg
RCS_FIND_IGNORE := \( -name SCCS -o -name BitKeeper -o -name .svn -o -name CVS -o -name .pc -o -name .hg -o -name .git \) -prune -o
export RCS_TAR_IGNORE := --exclude SCCS --exclude BitKeeper --exclude .svn --exclude CVS --exclude .pc --exclude .hg --exclude .git
# ===========================================================================
# Rules shared between *config targets and build targets

4
arch/arm/Kconfig
View File

@ -204,6 +204,7 @@ config ARCH_H720X
config ARCH_AAEC2000
bool "Agilent AAEC-2000 based"
select ARM_AMBA
help
This enables support for systems based on the Agilent AAEC-2000
@ -687,7 +688,8 @@ source "drivers/acorn/block/Kconfig"
if PCMCIA || ARCH_CLPS7500 || ARCH_IOP3XX || ARCH_IXP4XX \
|| ARCH_L7200 || ARCH_LH7A40X || ARCH_PXA || ARCH_RPC \
|| ARCH_S3C2410 || ARCH_SA1100 || ARCH_SHARK || FOOTBRIDGE
|| ARCH_S3C2410 || ARCH_SA1100 || ARCH_SHARK || FOOTBRIDGE \
|| MACH_MP1000
source "drivers/ide/Kconfig"
endif

3
arch/arm/boot/compressed/head.S
View File

@ -39,7 +39,8 @@
defined(CONFIG_ARCH_IXP4XX) || \
defined(CONFIG_ARCH_IXP2000) || \
defined(CONFIG_ARCH_LH7A40X) || \
defined(CONFIG_ARCH_OMAP)
defined(CONFIG_ARCH_OMAP) || \
defined(CONFIG_MACH_MP1000)
.macro loadsp, rb
addruart \rb
.endm

10
arch/arm/common/locomo.c
View File

@ -550,15 +550,12 @@ struct locomo_save_data {
u16 LCM_SPIMD;
};
static int locomo_suspend(struct device *dev, pm_message_t state, u32 level)
static int locomo_suspend(struct device *dev, pm_message_t state)
{
struct locomo *lchip = dev_get_drvdata(dev);
struct locomo_save_data *save;
unsigned long flags;
if (level != SUSPEND_DISABLE)
return 0;
save = kmalloc(sizeof(struct locomo_save_data), GFP_KERNEL);
if (!save)
return -ENOMEM;
@ -597,16 +594,13 @@ static int locomo_suspend(struct device *dev, pm_message_t state, u32 level)
return 0;
}
static int locomo_resume(struct device *dev, u32 level)
static int locomo_resume(struct device *dev)
{
struct locomo *lchip = dev_get_drvdata(dev);
struct locomo_save_data *save;
unsigned long r;
unsigned long flags;
if (level != RESUME_ENABLE)
return 0;
save = (struct locomo_save_data *) dev->power.saved_state;
if (!save)
return 0;

11
arch/arm/common/sa1111.c
View File

@ -801,7 +801,7 @@ struct sa1111_save_data {
#ifdef CONFIG_PM
static int sa1111_suspend(struct device *dev, pm_message_t state, u32 level)
static int sa1111_suspend(struct device *dev, pm_message_t state)
{
struct sa1111 *sachip = dev_get_drvdata(dev);
struct sa1111_save_data *save;
@ -809,9 +809,6 @@ static int sa1111_suspend(struct device *dev, pm_message_t state, u32 level)
unsigned int val;
void __iomem *base;
if (level != SUSPEND_DISABLE)
return 0;
save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL);
if (!save)
return -ENOMEM;
@ -856,23 +853,19 @@ static int sa1111_suspend(struct device *dev, pm_message_t state, u32 level)
/*
* sa1111_resume - Restore the SA1111 device state.
* @dev: device to restore
* @level: resume level
*
* Restore the general state of the SA1111; clock control and
* interrupt controller. Other parts of the SA1111 must be
* restored by their respective drivers, and must be called
* via LDM after this function.
*/
static int sa1111_resume(struct device *dev, u32 level)
static int sa1111_resume(struct device *dev)
{
struct sa1111 *sachip = dev_get_drvdata(dev);
struct sa1111_save_data *save;
unsigned long flags, id;
void __iomem *base;
if (level != RESUME_ENABLE)
return 0;
save = (struct sa1111_save_data *)dev->power.saved_state;
if (!save)
return 0;

24
arch/arm/common/scoop.c
View File

@ -102,26 +102,24 @@ static void check_scoop_reg(struct scoop_dev *sdev)
}
#ifdef CONFIG_PM
static int scoop_suspend(struct device *dev, pm_message_t state, uint32_t level)
static int scoop_suspend(struct device *dev, pm_message_t state)
{
if (level == SUSPEND_POWER_DOWN) {
struct scoop_dev *sdev = dev_get_drvdata(dev);
struct scoop_dev *sdev = dev_get_drvdata(dev);
check_scoop_reg(sdev);
sdev->scoop_gpwr = SCOOP_REG(sdev->base, SCOOP_GPWR);
SCOOP_REG(sdev->base, SCOOP_GPWR) = (sdev->scoop_gpwr & ~sdev->suspend_clr) | sdev->suspend_set;
check_scoop_reg(sdev);
sdev->scoop_gpwr = SCOOP_REG(sdev->base, SCOOP_GPWR);
SCOOP_REG(sdev->base, SCOOP_GPWR) = (sdev->scoop_gpwr & ~sdev->suspend_clr) | sdev->suspend_set;
}
return 0;
}
static int scoop_resume(struct device *dev, uint32_t level)
static int scoop_resume(struct device *dev)
{
if (level == RESUME_POWER_ON) {
struct scoop_dev *sdev = dev_get_drvdata(dev);
struct scoop_dev *sdev = dev_get_drvdata(dev);
check_scoop_reg(sdev);
SCOOP_REG(sdev->base,SCOOP_GPWR) = sdev->scoop_gpwr;
check_scoop_reg(sdev);
SCOOP_REG(sdev->base,SCOOP_GPWR) = sdev->scoop_gpwr;
}
return 0;
}
#else

897
arch/arm/configs/mp1000_defconfig Normal file
View File

@ -0,0 +1,897 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.14-rc1
# Fri Sep 16 15:48:13 2005
#
CONFIG_ARM=y
CONFIG_MMU=y
CONFIG_UID16=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
# CONFIG_CLEAN_COMPILE is not set
CONFIG_BROKEN=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_LOCK_KERNEL=y
CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
#
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
# CONFIG_HOTPLUG is not set
CONFIG_KOBJECT_UEVENT=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SHMEM=y
CONFIG_CC_ALIGN_FUNCTIONS=0
CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_KMOD=y
#
# System Type
#
# CONFIG_ARCH_CLPS7500 is not set
CONFIG_ARCH_CLPS711X=y
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_CAMELOT is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP3XX is not set
# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_L7200 is not set
# CONFIG_ARCH_PXA is not set
# CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_S3C2410 is not set
# CONFIG_ARCH_SHARK is not set
# CONFIG_ARCH_LH7A40X is not set
# CONFIG_ARCH_OMAP is not set
# CONFIG_ARCH_VERSATILE is not set
# CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_AAEC2000 is not set
#
# CLPS711X/EP721X Implementations
#
# CONFIG_ARCH_AUTCPU12 is not set
# CONFIG_ARCH_CDB89712 is not set
# CONFIG_ARCH_CEIVA is not set
# CONFIG_ARCH_CLEP7312 is not set
# CONFIG_ARCH_EDB7211 is not set
# CONFIG_ARCH_P720T is not set
# CONFIG_ARCH_FORTUNET is not set
CONFIG_MACH_MP1000=y
CONFIG_MP1000_90MHZ=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM720T=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_LV4T=y
CONFIG_CPU_CACHE_V4=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_V4WT=y
CONFIG_CPU_TLB_V4WT=y
#
# Processor Features
#
CONFIG_ARM_THUMB=y
#
# Bus support
#
CONFIG_ISA_DMA_API=y
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
#
# Kernel Features
#
# CONFIG_SMP is not set
CONFIG_PREEMPT=y
# CONFIG_NO_IDLE_HZ is not set
# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_ALIGNMENT_TRAP=y
#
# Boot options
#
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="console=ttyCL,38400 root=/dev/discs/disc0/part1 ip=any cs89x0_media=rj45"
# CONFIG_XIP_KERNEL is not set
#
# Floating point emulation
#
#
# At least one emulation must be selected
#
CONFIG_FPE_NWFPE=y
# CONFIG_FPE_NWFPE_XP is not set
# CONFIG_FPE_FASTFPE is not set
#
# Userspace binary formats
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_AOUT is not set
CONFIG_BINFMT_MISC=y
# CONFIG_ARTHUR is not set
#
# Power management options
#
# CONFIG_PM is not set
#
# Networking
#
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_TUNNEL is not set
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_BIC=y
CONFIG_IPV6=y
# CONFIG_IPV6_PRIVACY is not set
# CONFIG_INET6_AH is not set
# CONFIG_INET6_ESP is not set
# CONFIG_INET6_IPCOMP is not set
# CONFIG_INET6_TUNNEL is not set
# CONFIG_IPV6_TUNNEL is not set
# CONFIG_NETFILTER is not set
#
# DCCP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_DCCP is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_SCTP is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_NETFILTER_NETLINK is not set
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_IEEE80211 is not set
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_DEBUG_DRIVER is not set
#
# Memory Technology Devices (MTD)
#
CONFIG_MTD=y
CONFIG_MTD_DEBUG=y
CONFIG_MTD_DEBUG_VERBOSE=3
# CONFIG_MTD_CONCAT is not set
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_REDBOOT_PARTS=m
CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2
CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_AFS_PARTS is not set
#
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
#
# RAM/ROM/Flash chip drivers
#
CONFIG_MTD_CFI=m
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_GEN_PROBE=m
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_NOSWAP=y
# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_2 is not set
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
# CONFIG_MTD_CFI_I1 is not set
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
# CONFIG_MTD_OTP is not set
CONFIG_MTD_CFI_INTELEXT=m
# CONFIG_MTD_CFI_AMDSTD is not set
# CONFIG_MTD_CFI_STAA is not set
CONFIG_MTD_CFI_UTIL=m
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
# CONFIG_MTD_OBSOLETE_CHIPS is not set
# CONFIG_MTD_XIP is not set
#
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_PHYSMAP=m
CONFIG_MTD_PHYSMAP_START=0x0000000
CONFIG_MTD_PHYSMAP_LEN=0x4000000
CONFIG_MTD_PHYSMAP_BANKWIDTH=2
# CONFIG_MTD_ARM_INTEGRATOR is not set
CONFIG_MTD_EDB7312=m
# CONFIG_MTD_PLATRAM is not set
#
# Self-contained MTD device drivers
#
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLKMTD is not set
# CONFIG_MTD_BLOCK2MTD is not set
#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
#
# NAND Flash Device Drivers
#
CONFIG_MTD_NAND=y
# CONFIG_MTD_NAND_VERIFY_WRITE is not set
CONFIG_MTD_NAND_MP1000=y
CONFIG_MTD_NAND_IDS=y
# CONFIG_MTD_NAND_DISKONCHIP is not set
# CONFIG_MTD_NAND_NANDSIM is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
#
# Block devices
#
# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=m
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=2
CONFIG_BLK_DEV_RAM_SIZE=16384
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CDROM_PKTCDVD is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_ATA_OVER_ETH is not set
#
# ATA/ATAPI/MFM/RLL support
#
CONFIG_IDE=y
CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_IDE_SATA is not set
# CONFIG_BLK_DEV_HD_IDE is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_BLK_DEV_IDECD is not set
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
#
# IDE chipset support/bugfixes
#
# CONFIG_IDE_GENERIC is not set
CONFIG_IDE_ARM=y
CONFIG_BLK_DEV_IDE_MP1000=y
# CONFIG_BLK_DEV_IDEDMA is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_BLK_DEV_HD is not set
#
# SCSI device support
#
# CONFIG_RAID_ATTRS is not set
# CONFIG_SCSI is not set
#
# Multi-device support (RAID and LVM)
#
CONFIG_MD=y
# CONFIG_BLK_DEV_MD is not set
CONFIG_BLK_DEV_DM=y
# CONFIG_DM_CRYPT is not set
# CONFIG_DM_SNAPSHOT is not set
# CONFIG_DM_MIRROR is not set
# CONFIG_DM_ZERO is not set
# CONFIG_DM_MULTIPATH is not set
#
# Fusion MPT device support
#
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
# CONFIG_IEEE1394 is not set
#
# I2O device support
#
#
# Network device support
#
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
#
# PHY device support
#
# CONFIG_PHYLIB is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MII is not set
# CONFIG_SMC91X is not set
# CONFIG_DM9000 is not set
CONFIG_CS89x0=y
#
# Ethernet (1000 Mbit)
#
#
# Ethernet (10000 Mbit)
#
#
# Token Ring devices
#
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
#
# ISDN subsystem
#
# CONFIG_ISDN is not set
#
# Input device support
#
CONFIG_INPUT=y
#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
CONFIG_INPUT_EVBUG=y
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
CONFIG_SERIO=y
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_LIBPS2 is not set
# CONFIG_SERIO_RAW is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=2
# CONFIG_SERIAL_8250_EXTENDED is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_CLPS711X=y
CONFIG_SERIAL_CLPS711X_CONSOLE=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
CONFIG_NVRAM=y
CONFIG_RTC=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
#
# I2C support
#
# CONFIG_I2C is not set
#
# Hardware Monitoring support
#
CONFIG_HWMON=y
# CONFIG_HWMON_VID is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
#
# Misc devices
#
#
# Multimedia Capabilities Port drivers
#
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# Graphics support
#
# CONFIG_FB is not set
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
CONFIG_USB_ARCH_HAS_HCD=y
# CONFIG_USB_ARCH_HAS_OHCI is not set
# CONFIG_USB is not set
#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
# MMC/SD Card support
#
# CONFIG_MMC is not set
#
# File systems
#
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
# CONFIG_EXT2_FS_POSIX_ACL is not set
# CONFIG_EXT2_FS_SECURITY is not set
# CONFIG_EXT2_FS_XIP is not set
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_XATTR=y
# CONFIG_EXT3_FS_POSIX_ACL is not set
# CONFIG_EXT3_FS_SECURITY is not set
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
CONFIG_FS_MBCACHE=y
CONFIG_REISERFS_FS=m
# CONFIG_REISERFS_CHECK is not set
# CONFIG_REISERFS_PROC_INFO is not set
# CONFIG_REISERFS_FS_XATTR is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
CONFIG_INOTIFY=y
CONFIG_QUOTA=y
# CONFIG_QFMT_V1 is not set
# CONFIG_QFMT_V2 is not set
CONFIG_QUOTACTL=y
CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_HUGETLBFS is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
# CONFIG_RELAYFS_FS is not set
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
CONFIG_JFFS2_FS=m
CONFIG_JFFS2_FS_DEBUG=0
CONFIG_JFFS2_FS_WRITEBUFFER=y
# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
CONFIG_JFFS2_ZLIB=y
CONFIG_JFFS2_RTIME=y
# CONFIG_JFFS2_RUBIN is not set
CONFIG_CRAMFS=m
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
CONFIG_NFS_V4=y
# CONFIG_NFS_DIRECTIO is not set
CONFIG_NFSD=y
CONFIG_NFSD_V3=y
# CONFIG_NFSD_V3_ACL is not set
CONFIG_NFSD_V4=y
CONFIG_NFSD_TCP=y
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_EXPORTFS=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
CONFIG_RPCSEC_GSS_KRB5=y
# CONFIG_RPCSEC_GSS_SPKM3 is not set
CONFIG_SMB_FS=m
# CONFIG_SMB_NLS_DEFAULT is not set
CONFIG_CIFS=m
# CONFIG_CIFS_STATS is not set
# CONFIG_CIFS_XATTR is not set
# CONFIG_CIFS_EXPERIMENTAL is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
# CONFIG_9P_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Native Language Support
#
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=y
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
#
# Profiling support
#
# CONFIG_PROFILING is not set
#
# Kernel hacking
#
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_KERNEL=y
# CONFIG_MAGIC_SYSRQ is not set
CONFIG_LOG_BUF_SHIFT=14
CONFIG_DETECT_SOFTLOCKUP=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_DEBUG_SLAB is not set
CONFIG_DEBUG_PREEMPT=y
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_KOBJECT is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_WAITQ=y
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set
# CONFIG_DEBUG_CLPS711X_UART2 is not set
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
CONFIG_CRYPTO=y
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_MD4 is not set
CONFIG_CRYPTO_MD5=y
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_WP512 is not set
# CONFIG_CRYPTO_TGR192 is not set
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_TWOFISH is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_AES is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_TEST is not set
#
# Hardware crypto devices
#
#
# Library routines
#
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=m
CONFIG_ZLIB_DEFLATE=m

1
arch/arm/kernel/module.c
View File

@ -11,6 +11,7 @@
*/
#include <linux/config.h>
#include <linux/module.h>
#include <linux/moduleloader.h>
#include <linux/kernel.h>
#include <linux/elf.h>
#include <linux/vmalloc.h>

4
arch/arm/kernel/traps.c
View File

@ -345,7 +345,9 @@ static int bad_syscall(int n, struct pt_regs *regs)
struct thread_info *thread = current_thread_info();
siginfo_t info;
if (current->personality != PER_LINUX && thread->exec_domain->handler) {
if (current->personality != PER_LINUX &&
current->personality != PER_LINUX_32BIT &&
thread->exec_domain->handler) {
thread->exec_domain->handler(n, regs);
return regs->ARM_r0;
}

2
arch/arm/lib/Makefile
View File

@ -11,7 +11,7 @@ lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \
strnlen_user.o strchr.o strrchr.o testchangebit.o \
testclearbit.o testsetbit.o uaccess.o getuser.o \
putuser.o ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \
ucmpdi2.o lib1funcs.o div64.o \
ucmpdi2.o lib1funcs.o div64.o sha1.o \
io-readsb.o io-writesb.o io-readsl.o io-writesl.o
ifeq ($(CONFIG_CPU_32v3),y)

206
arch/arm/lib/sha1.S Normal file
View File

@ -0,0 +1,206 @@
/*
* linux/arch/arm/lib/sha1.S
*
* SHA transform optimized for ARM
*
* Copyright: (C) 2005 by Nicolas Pitre <nico@cam.org>
* Created: September 17, 2005
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* The reference implementation for this code is linux/lib/sha1.c
*/
#include <linux/linkage.h>
.text
/*
* void sha_transform(__u32 *digest, const char *in, __u32 *W)
*
* Note: the "in" ptr may be unaligned.
*/
ENTRY(sha_transform)
stmfd sp!, {r4 - r8, lr}
@ for (i = 0; i < 16; i++)
@ W[i] = be32_to_cpu(in[i]); */
#ifdef __ARMEB__
mov r4, r0
mov r0, r2
mov r2, #64
bl memcpy
mov r2, r0
mov r0, r4
#else
mov r3, r2
mov lr, #16
1: ldrb r4, [r1], #1
ldrb r5, [r1], #1
ldrb r6, [r1], #1
ldrb r7, [r1], #1
subs lr, lr, #1
orr r5, r5, r4, lsl #8
orr r6, r6, r5, lsl #8
orr r7, r7, r6, lsl #8
str r7, [r3], #4
bne 1b
#endif
@ for (i = 0; i < 64; i++)
@ W[i+16] = ror(W[i+13] ^ W[i+8] ^ W[i+2] ^ W[i], 31);
sub r3, r2, #4
mov lr, #64
2: ldr r4, [r3, #4]!
subs lr, lr, #1
ldr r5, [r3, #8]
ldr r6, [r3, #32]
ldr r7, [r3, #52]
eor r4, r4, r5
eor r4, r4, r6
eor r4, r4, r7
mov r4, r4, ror #31
str r4, [r3, #64]
bne 2b
/*
* The SHA functions are:
*
* f1(B,C,D) = (D ^ (B & (C ^ D)))
* f2(B,C,D) = (B ^ C ^ D)
* f3(B,C,D) = ((B & C) | (D & (B | C)))
*
* Then the sub-blocks are processed as follows:
*
* A' = ror(A, 27) + f(B,C,D) + E + K + *W++
* B' = A
* C' = ror(B, 2)
* D' = C
* E' = D
*
* We therefore unroll each loop 5 times to avoid register shuffling.
* Also the ror for C (and also D and E which are successivelyderived
* from it) is applied in place to cut on an additional mov insn for
* each round.
*/
.macro sha_f1, A, B, C, D, E
ldr r3, [r2], #4
eor ip, \C, \D
add \E, r1, \E, ror #2
and ip, \B, ip, ror #2
add \E, \E, \A, ror #27
eor ip, ip, \D, ror #2
add \E, \E, r3
add \E, \E, ip
.endm
.macro sha_f2, A, B, C, D, E
ldr r3, [r2], #4
add \E, r1, \E, ror #2
eor ip, \B, \C, ror #2
add \E, \E, \A, ror #27
eor ip, ip, \D, ror #2
add \E, \E, r3
add \E, \E, ip
.endm
.macro sha_f3, A, B, C, D, E
ldr r3, [r2], #4
add \E, r1, \E, ror #2
orr ip, \B, \C, ror #2
add \E, \E, \A, ror #27
and ip, ip, \D, ror #2
add \E, \E, r3
and r3, \B, \C, ror #2
orr ip, ip, r3
add \E, \E, ip
.endm
ldmia r0, {r4 - r8}
mov lr, #4
ldr r1, .L_sha_K + 0
/* adjust initial values */
mov r6, r6, ror #30
mov r7, r7, ror #30
mov r8, r8, ror #30
3: subs lr, lr, #1
sha_f1 r4, r5, r6, r7, r8
sha_f1 r8, r4, r5, r6, r7
sha_f1 r7, r8, r4, r5, r6
sha_f1 r6, r7, r8, r4, r5
sha_f1 r5, r6, r7, r8, r4
bne 3b
ldr r1, .L_sha_K + 4
mov lr, #4
4: subs lr, lr, #1
sha_f2 r4, r5, r6, r7, r8
sha_f2 r8, r4, r5, r6, r7
sha_f2 r7, r8, r4, r5, r6
sha_f2 r6, r7, r8, r4, r5
sha_f2 r5, r6, r7, r8, r4
bne 4b
ldr r1, .L_sha_K + 8
mov lr, #4
5: subs lr, lr, #1
sha_f3 r4, r5, r6, r7, r8
sha_f3 r8, r4, r5, r6, r7
sha_f3 r7, r8, r4, r5, r6
sha_f3 r6, r7, r8, r4, r5
sha_f3 r5, r6, r7, r8, r4
bne 5b
ldr r1, .L_sha_K + 12
mov lr, #4
6: subs lr, lr, #1
sha_f2 r4, r5, r6, r7, r8
sha_f2 r8, r4, r5, r6, r7
sha_f2 r7, r8, r4, r5, r6
sha_f2 r6, r7, r8, r4, r5
sha_f2 r5, r6, r7, r8, r4
bne 6b
ldmia r0, {r1, r2, r3, ip, lr}
add r4, r1, r4
add r5, r2, r5
add r6, r3, r6, ror #2
add r7, ip, r7, ror #2
add r8, lr, r8, ror #2
stmia r0, {r4 - r8}
ldmfd sp!, {r4 - r8, pc}
.L_sha_K:
.word 0x5a827999, 0x6ed9eba1, 0x8f1bbcdc, 0xca62c1d6
/*
* void sha_init(__u32 *buf)
*/
.L_sha_initial_digest:
.word 0x67452301, 0xefcdab89, 0x98badcfe, 0x10325476, 0xc3d2e1f0
ENTRY(sha_init)
str lr, [sp, #-4]!
adr r1, .L_sha_initial_digest
ldmia r1, {r1, r2, r3, ip, lr}
stmia r0, {r1, r2, r3, ip, lr}
ldr pc, [sp], #4

2
arch/arm/mach-aaec2000/Makefile
View File

@ -3,7 +3,7 @@
#
# Common support (must be linked before board specific support)
obj-y += core.o
obj-y += core.o clock.o
# Specific board support
obj-$(CONFIG_MACH_AAED2000) += aaed2000.o

50
arch/arm/mach-aaec2000/aaed2000.c
View File

@ -27,16 +27,65 @@
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/arch/aaed2000.h>
#include "core.h"
static void aaed2000_clcd_disable(struct clcd_fb *fb)
{
AAED_EXT_GPIO &= ~AAED_EGPIO_LCD_PWR_EN;
}
static void aaed2000_clcd_enable(struct clcd_fb *fb)
{
AAED_EXT_GPIO |= AAED_EGPIO_LCD_PWR_EN;
}
struct aaec2000_clcd_info clcd_info = {
.enable = aaed2000_clcd_enable,
.disable = aaed2000_clcd_disable,
.panel = {
.mode = {
.name = "Sharp",
.refresh = 60,
.xres = 640,
.yres = 480,
.pixclock = 39721,
.left_margin = 20,
.right_margin = 44,
.upper_margin = 21,
.lower_margin = 34,
.hsync_len = 96,
.vsync_len = 2,
.sync = 0,
.vmode = FB_VMODE_NONINTERLACED,
},
.width = -1,
.height = -1,
.tim2 = TIM2_IVS | TIM2_IHS,
.cntl = CNTL_LCDTFT,
.bpp = 16,
},
};
static void __init aaed2000_init_irq(void)
{
aaec2000_init_irq();
}
static void __init aaed2000_init(void)
{
aaec2000_set_clcd_plat_data(&clcd_info);
}
static struct map_desc aaed2000_io_desc[] __initdata = {
{ EXT_GPIO_VBASE, EXT_GPIO_PBASE, EXT_GPIO_LENGTH, MT_DEVICE }, /* Ext GPIO */
};
static void __init aaed2000_map_io(void)
{
aaec2000_map_io();
iotable_init(aaed2000_io_desc, ARRAY_SIZE(aaed2000_io_desc));
}
MACHINE_START(AAED2000, "Agilent AAED-2000 Development Platform")
@ -47,4 +96,5 @@ MACHINE_START(AAED2000, "Agilent AAED-2000 Development Platform")
.map_io = aaed2000_map_io,
.init_irq = aaed2000_init_irq,
.timer = &aaec2000_timer,
.init_machine = aaed2000_init,
MACHINE_END

110
arch/arm/mach-aaec2000/clock.c Normal file
View File

@ -0,0 +1,110 @@
/*
* linux/arch/arm/mach-aaec2000/clock.c
*
* Copyright (C) 2005 Nicolas Bellido Y Ortega
*
* Based on linux/arch/arm/mach-integrator/clock.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <asm/semaphore.h>
#include <asm/hardware/clock.h>
#include "clock.h"
static LIST_HEAD(clocks);
static DECLARE_MUTEX(clocks_sem);
struct clk *clk_get(struct device *dev, const char *id)
{
struct clk *p, *clk = ERR_PTR(-ENOENT);
down(&clocks_sem);
list_for_each_entry(p, &clocks, node) {
if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
clk = p;
break;
}
}
up(&clocks_sem);
return clk;
}
EXPORT_SYMBOL(clk_get);
void clk_put(struct clk *clk)
{
module_put(clk->owner);
}
EXPORT_SYMBOL(clk_put);
int clk_enable(struct clk *clk)
{
return 0;
}
EXPORT_SYMBOL(clk_enable);
void clk_disable(struct clk *clk)
{
}
EXPORT_SYMBOL(clk_disable);
int clk_use(struct clk *clk)
{
return 0;
}
EXPORT_SYMBOL(clk_use);
void clk_unuse(struct clk *clk)
{
}
EXPORT_SYMBOL(clk_unuse);
unsigned long clk_get_rate(struct clk *clk)
{
return clk->rate;
}
EXPORT_SYMBOL(clk_get_rate);
long clk_round_rate(struct clk *clk, unsigned long rate)
{
return rate;
}
EXPORT_SYMBOL(clk_round_rate);
int clk_set_rate(struct clk *clk, unsigned long rate)
{
return 0;
}
EXPORT_SYMBOL(clk_set_rate);
int clk_register(struct clk *clk)
{
down(&clocks_sem);
list_add(&clk->node, &clocks);
up(&clocks_sem);
return 0;
}
EXPORT_SYMBOL(clk_register);
void clk_unregister(struct clk *clk)
{
down(&clocks_sem);
list_del(&clk->node);
up(&clocks_sem);
}
EXPORT_SYMBOL(clk_unregister);
static int __init clk_init(void)
{
return 0;
}
arch_initcall(clk_init);

23
arch/arm/mach-aaec2000/clock.h Normal file
View File

@ -0,0 +1,23 @@
/*
* linux/arch/arm/mach-aaec2000/clock.h
*
* Copyright (C) 2005 Nicolas Bellido Y Ortega
*
* Based on linux/arch/arm/mach-integrator/clock.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
struct module;
struct clk {
struct list_head node;
unsigned long rate;
struct module *owner;
const char *name;
void *data;
};
int clk_register(struct clk *clk);
void clk_unregister(struct clk *clk);

135
arch/arm/mach-aaec2000/core.c
View File

@ -13,19 +13,27 @@
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/dma-mapping.h>
#include <linux/interrupt.h>
#include <linux/timex.h>
#include <linux/signal.h>
#include <asm/hardware.h>
#include <asm/irq.h>
#include <asm/sizes.h>
#include <asm/hardware/amba.h>
#include <asm/mach/flash.h>
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include "core.h"
#include "clock.h"
/*
* Common I/O mapping:
*
@ -40,9 +48,17 @@
* default mapping provided here.
*/
static struct map_desc standard_io_desc[] __initdata = {
/* virtual physical length type */
{ VIO_APB_BASE, PIO_APB_BASE, IO_APB_LENGTH, MT_DEVICE },
{ VIO_AHB_BASE, PIO_AHB_BASE, IO_AHB_LENGTH, MT_DEVICE }
{
.virtual = VIO_APB_BASE,
.physical = __phys_to_pfn(PIO_APB_BASE),
.length = IO_APB_LENGTH,
.type = MT_DEVICE
}, {
.virtual = VIO_AHB_BASE,
.physical = __phys_to_pfn(PIO_AHB_BASE),
.length = IO_AHB_LENGTH,
.type = MT_DEVICE
}
};
void __init aaec2000_map_io(void)
@ -155,3 +171,116 @@ struct sys_timer aaec2000_timer = {
.offset = aaec2000_gettimeoffset,
};
static struct clcd_panel mach_clcd_panel;
static int aaec2000_clcd_setup(struct clcd_fb *fb)
{
dma_addr_t dma;
fb->panel = &mach_clcd_panel;
fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, SZ_1M,
&dma, GFP_KERNEL);
if (!fb->fb.screen_base) {
printk(KERN_ERR "CLCD: unable to map framebuffer\n");
return -ENOMEM;
}
fb->fb.fix.smem_start = dma;
fb->fb.fix.smem_len = SZ_1M;
return 0;
}
static int aaec2000_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
{
return dma_mmap_writecombine(&fb->dev->dev, vma,
fb->fb.screen_base,
fb->fb.fix.smem_start,
fb->fb.fix.smem_len);
}
static void aaec2000_clcd_remove(struct clcd_fb *fb)
{
dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
fb->fb.screen_base, fb->fb.fix.smem_start);
}
static struct clcd_board clcd_plat_data = {
.name = "AAEC-2000",
.check = clcdfb_check,
.decode = clcdfb_decode,
.setup = aaec2000_clcd_setup,
.mmap = aaec2000_clcd_mmap,
.remove = aaec2000_clcd_remove,
};
static struct amba_device clcd_device = {
.dev = {
.bus_id = "mb:16",
.coherent_dma_mask = ~0,
.platform_data = &clcd_plat_data,
},
.res = {
.start = AAEC_CLCD_PHYS,
.end = AAEC_CLCD_PHYS + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
.irq = { INT_LCD, NO_IRQ },
.periphid = 0x41110,
};
static struct amba_device *amba_devs[] __initdata = {
&clcd_device,
};
static struct clk aaec2000_clcd_clk = {
.name = "CLCDCLK",
};
void __init aaec2000_set_clcd_plat_data(struct aaec2000_clcd_info *clcd)
{
clcd_plat_data.enable = clcd->enable;
clcd_plat_data.disable = clcd->disable;
memcpy(&mach_clcd_panel, &clcd->panel, sizeof(struct clcd_panel));
}
static struct flash_platform_data aaec2000_flash_data = {
.map_name = "cfi_probe",
.width = 4,
};
static struct resource aaec2000_flash_resource = {
.start = AAEC_FLASH_BASE,
.end = AAEC_FLASH_BASE + AAEC_FLASH_SIZE,
.flags = IORESOURCE_MEM,
};
static struct platform_device aaec2000_flash_device = {
.name = "armflash",
.id = 0,
.dev = {
.platform_data = &aaec2000_flash_data,
},
.num_resources = 1,
.resource = &aaec2000_flash_resource,
};
static int __init aaec2000_init(void)
{
int i;
clk_register(&aaec2000_clcd_clk);
for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
struct amba_device *d = amba_devs[i];
amba_device_register(d, &iomem_resource);
}
platform_device_register(&aaec2000_flash_device);
return 0;
};
arch_initcall(aaec2000_init);

11
arch/arm/mach-aaec2000/core.h
View File

@ -9,8 +9,19 @@
*
*/
#include <asm/hardware/amba_clcd.h>
struct sys_timer;
extern struct sys_timer aaec2000_timer;
extern void __init aaec2000_map_io(void);
extern void __init aaec2000_init_irq(void);
struct aaec2000_clcd_info {
struct clcd_panel panel;
void (*disable)(struct clcd_fb *);
void (*enable)(struct clcd_fb *);
};
extern void __init aaec2000_set_clcd_plat_data(struct aaec2000_clcd_info *);

11
arch/arm/mach-clps711x/Kconfig
View File

@ -69,6 +69,17 @@ config EP72XX_ROM_BOOT
You almost surely want to say N here.
config MACH_MP1000
bool "MACH_MP1000"
help
Say Y if you intend to run the kernel on the Comdial MP1000 platform.
config MP1000_90MHZ
bool "MP1000_90MHZ"
depends on MACH_MP1000
help
Say Y if you have the MP1000 configured to be set at 90MHZ rather than 74MHZ
endmenu
endif

1
arch/arm/mach-clps711x/Makefile
View File

@ -15,6 +15,7 @@ obj-$(CONFIG_ARCH_CDB89712) += cdb89712.o
obj-$(CONFIG_ARCH_CLEP7312) += clep7312.o
obj-$(CONFIG_ARCH_EDB7211) += edb7211-arch.o edb7211-mm.o
obj-$(CONFIG_ARCH_FORTUNET) += fortunet.o
obj-$(CONFIG_MACH_MP1000) += mp1000-mach.o mp1000-mm.o mp1000-seprom.o
obj-$(CONFIG_ARCH_P720T) += p720t.o
leds-$(CONFIG_ARCH_P720T) += p720t-leds.o
obj-$(CONFIG_LEDS) += $(leds-y)

12
arch/arm/mach-clps711x/autcpu12.c
View File

@ -46,10 +46,14 @@
*/
static struct map_desc autcpu12_io_desc[] __initdata = {
/* virtual, physical, length, type */
/* memory-mapped extra io and CS8900A Ethernet chip */
/* ethernet chip */
{ AUTCPU12_VIRT_CS8900A, AUTCPU12_PHYS_CS8900A, SZ_1M, MT_DEVICE }
/* memory-mapped extra io and CS8900A Ethernet chip */
/* ethernet chip */
{
.virtual = AUTCPU12_VIRT_CS8900A,
.pfn = __phys_to_pfn(AUTCPU12_PHYS_CS8900A),
.length = SZ_1M,
.type = MT_DEVICE
}
};
void __init autcpu12_map_io(void)

7
arch/arm/mach-clps711x/cdb89712.c
View File

@ -39,7 +39,12 @@
* ethernet driver, perhaps.
*/
static struct map_desc cdb89712_io_desc[] __initdata = {
{ ETHER_BASE, ETHER_START, ETHER_SIZE, MT_DEVICE }
{
.virtual = ETHER_BASE,
.pfn =__phys_to_pfn(ETHER_START),
.length = ETHER_SIZE,
.type = MT_DEVICE
}
};
static void __init cdb89712_map_io(void)

12
arch/arm/mach-clps711x/ceiva.c
View File

@ -37,11 +37,13 @@
#include "common.h"
static struct map_desc ceiva_io_desc[] __initdata = {
/* virtual, physical, length, type */
/* SED1355 controlled video RAM & registers */
{ CEIVA_VIRT_SED1355, CEIVA_PHYS_SED1355, SZ_2M, MT_DEVICE }
/* SED1355 controlled video RAM & registers */
{
.virtual = CEIVA_VIRT_SED1355,
.pfn = __phys_to_pfn(CEIVA_PHYS_SED1355),
.length = SZ_2M,
.type = MT_DEVICE
}
};

30
arch/arm/mach-clps711x/edb7211-mm.c
View File

@ -51,15 +51,27 @@ extern void clps711x_map_io(void);
* happens).
*/
static struct map_desc edb7211_io_desc[] __initdata = {
/* virtual, physical, length, type */
/* memory-mapped extra keyboard row and CS8900A Ethernet chip */
{ EP7211_VIRT_EXTKBD, EP7211_PHYS_EXTKBD, SZ_1M, MT_DEVICE },
{ EP7211_VIRT_CS8900A, EP7211_PHYS_CS8900A, SZ_1M, MT_DEVICE },
/* flash banks */
{ EP7211_VIRT_FLASH1, EP7211_PHYS_FLASH1, SZ_8M, MT_DEVICE },
{ EP7211_VIRT_FLASH2, EP7211_PHYS_FLASH2, SZ_8M, MT_DEVICE }
{ /* memory-mapped extra keyboard row */
.virtual = EP7211_VIRT_EXTKBD,
.pfn = __phys_to_pfn(EP7211_PHYS_EXTKBD),
.length = SZ_1M,
.type - MT_DEVICE
}, { /* and CS8900A Ethernet chip */
.virtual = EP7211_VIRT_CS8900A,
.pfn = __phys_to_pfn(EP7211_PHYS_CS8900A),
.length = SZ_1M,
.type = MT_DEVICE
}, { /* flash banks */
.virtual = EP7211_VIRT_FLASH1,
.pfn = __phys_to_pfn(EP7211_PHYS_FLASH1),
.length = SZ_8M,
.type = MT_DEVICE
}, {
.virtual = EP7211_VIRT_FLASH2,
.pfn = __phys_to_pfn(EP7211_PHYS_FLASH2),
.length = SZ_8M,
.type = MT_DEVICE
}
};
void __init edb7211_map_io(void)

8
arch/arm/mach-clps711x/mm.c
View File

@ -24,6 +24,7 @@
#include <linux/init.h>
#include <linux/bootmem.h>
#include <asm/sizes.h>
#include <asm/hardware.h>
#include <asm/pgtable.h>
#include <asm/page.h>
@ -34,7 +35,12 @@
* This maps the generic CLPS711x registers
*/
static struct map_desc clps711x_io_desc[] __initdata = {
{ CLPS7111_VIRT_BASE, CLPS7111_PHYS_BASE, 1048576, MT_DEVICE }
{
.virtual = CLPS7111_VIRT_BASE,
.pfn = __phys_to_pfn(CLPS7111_PHYS_BASE),
.length = SZ_1M,
.type = MT_DEVICE
}
};
void __init clps711x_map_io(void)

49
arch/arm/mach-clps711x/mp1000-mach.c Normal file
View File

@ -0,0 +1,49 @@
/*
* linux/arch/arm/mach-mp1000/mp1000.c
*
* Copyright (C) 2005 Comdial Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/init.h>
#include <linux/types.h>
#include <linux/string.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/arch/mp1000-seprom.h>
#include "common.h"
extern void mp1000_map_io(void);
static void __init mp1000_init(void)
{
seprom_init();
}
MACHINE_START(MP1000, "Comdial MP1000")
/* Maintainer: Jon Ringle */
.phys_ram = 0xc0000000,
.phys_io = 0x80000000,
.io_pg_offst = ((0xff000000) >> 18) & 0xfffc,
.boot_params = 0xc0015100,
.map_io = mp1000_map_io,
.init_irq = clps711x_init_irq,
.init_machine = mp1000_init,
.timer = &clps711x_timer,
MACHINE_END

47
arch/arm/mach-clps711x/mp1000-mm.c Normal file
View File

@ -0,0 +1,47 @@
/*
* linux/arch/arm/mach-mp1000/mm.c
*
* Extra MM routines for the MP1000
*
* Copyright (C) 2005 Comdial Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/hardware.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/sizes.h>
#include <asm/mach/map.h>
extern void clps711x_map_io(void);
static struct map_desc mp1000_io_desc[] __initdata = {
{ MP1000_EIO_BASE, MP1000_EIO_START, MP1000_EIO_SIZE, MT_DEVICE },
{ MP1000_FIO_BASE, MP1000_FIO_START, MP1000_FIO_SIZE, MT_DEVICE },
{ MP1000_LIO_BASE, MP1000_LIO_START, MP1000_LIO_SIZE, MT_DEVICE },
{ MP1000_NIO_BASE, MP1000_NIO_START, MP1000_NIO_SIZE, MT_DEVICE },
{ MP1000_IDE_BASE, MP1000_IDE_START, MP1000_IDE_SIZE, MT_DEVICE },
{ MP1000_DSP_BASE, MP1000_DSP_START, MP1000_DSP_SIZE, MT_DEVICE }
};
void __init mp1000_map_io(void)
{
clps711x_map_io();
iotable_init(mp1000_io_desc, ARRAY_SIZE(mp1000_io_desc));
}

195
arch/arm/mach-clps711x/mp1000-seprom.c Normal file
View File

@ -0,0 +1,195 @@
/*`
* mp1000-seprom.c
*
* This file contains the Serial EEPROM code for the MP1000 board
*
* Copyright (C) 2005 Comdial Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/hardware.h>
#include <asm/hardware/clps7111.h>
#include <asm/arch/mp1000-seprom.h>
/* If SepromInit() can initialize and checksum the seprom successfully, */
/* then it will point seprom_data_ptr at the shadow copy. */
static eeprom_struct seprom_data; /* shadow copy of seprom content */
eeprom_struct *seprom_data_ptr = 0; /* 0 => not initialized */
/*
* Port D Bit 5 is Chip Select for EEPROM
* Port E Bit 0 is Input, Data out from EEPROM
* Port E Bit 1 is Output, Data in to EEPROM
* Port E Bit 2 is Output, CLK to EEPROM
*/
static char *port_d_ptr = (char *)(CLPS7111_VIRT_BASE + PDDR);
static char *port_e_ptr = (char *)(CLPS7111_VIRT_BASE + PEDR);
#define NO_OF_SHORTS 64 // Device is 64 x 16 bits
#define ENABLE_RW 0
#define DISABLE_RW 1
static inline void toggle_seprom_clock(void)
{
*port_e_ptr |= HwPortESepromCLK;
*port_e_ptr &= ~(HwPortESepromCLK);
}
static inline void select_eeprom(void)
{
*port_d_ptr |= HwPortDEECS;
*port_e_ptr &= ~(HwPortESepromCLK);
}
static inline void deselect_eeprom(void)
{
*port_d_ptr &= ~(HwPortDEECS);
*port_e_ptr &= ~(HwPortESepromDIn);
}
/*
* GetSepromDataPtr - returns pointer to shadow (RAM) copy of seprom
* and returns 0 if seprom is not initialized or
* has a checksum error.
*/
eeprom_struct* get_seprom_ptr(void)
{
return seprom_data_ptr;
}
unsigned char* get_eeprom_mac_address(void)
{
return seprom_data_ptr->variant.eprom_struct.mac_Address;
}
/*
* ReadSProm, Physically reads data from the Serial PROM
*/
static void read_sprom(short address, int length, eeprom_struct *buffer)
{
short data = COMMAND_READ | (address & 0x3F);
short bit;
int i;
select_eeprom();
// Clock in 9 bits of the command
for (i = 0, bit = 0x100; i < 9; i++, bit >>= 1) {
if (data & bit)
*port_e_ptr |= HwPortESepromDIn;
else
*port_e_ptr &= ~(HwPortESepromDIn);
toggle_seprom_clock();
}
//
// Now read one or more shorts of data from the Seprom
//
while (length-- > 0) {
data = 0;
// Read 16 bits at a time
for (i = 0; i < 16; i++) {
data <<= 1;
toggle_seprom_clock();
data |= *port_e_ptr & HwPortESepromDOut;
}
buffer->variant.eprom_short_data[address++] = data;
}
deselect_eeprom();
return;
}
/*
* ReadSerialPROM
*
* Input: Pointer to array of 64 x 16 Bits
*
* Output: if no problem reading data is filled in
*/
static void read_serial_prom(eeprom_struct *data)
{
read_sprom(0, 64, data);
}
//
// Compute Serial EEPROM checksum
//
// Input: Pointer to struct with Eprom data
//
// Output: The computed Eprom checksum
//
static short compute_seprom_checksum(eeprom_struct *data)
{
short checksum = 0;
int i;
for (i = 0; i < 126; i++) {
checksum += (short)data->variant.eprom_byte_data[i];
}
return((short)(0x5555 - (checksum & 0xFFFF)));
}
//
// Make sure the data port bits for the SEPROM are correctly initialised
//
void __init seprom_init(void)
{
short checksum;
// Init Port D
*(char *)(CLPS7111_VIRT_BASE + PDDDR) = 0x0;
*(char *)(CLPS7111_VIRT_BASE + PDDR) = 0x15;
// Init Port E
*(int *)(CLPS7111_VIRT_BASE + PEDDR) = 0x06;
*(int *)(CLPS7111_VIRT_BASE + PEDR) = 0x04;
//
// Make sure that EEPROM struct size never exceeds 128 bytes
//
if (sizeof(eeprom_struct) > 128) {
panic("Serial PROM struct size > 128, aborting read\n");
}
read_serial_prom(&seprom_data);
checksum = compute_seprom_checksum(&seprom_data);
if (checksum != seprom_data.variant.eprom_short_data[63]) {
panic("Serial EEPROM checksum failed\n");
}
seprom_data_ptr = &seprom_data;
}

14
arch/arm/mach-clps711x/p720t.c
View File

@ -29,6 +29,7 @@
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/setup.h>
#include <asm/sizes.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@ -42,8 +43,17 @@
* We map both here.
*/
static struct map_desc p720t_io_desc[] __initdata = {
{ SYSPLD_VIRT_BASE, SYSPLD_PHYS_BASE, 1048576, MT_DEVICE },
{ 0xfe400000, 0x10400000, 1048576, MT_DEVICE }
{
.virtual = SYSPLD_VIRT_BASE,
.pfn = __phys_to_pfn(SYSPLD_PHYS_BASE),
.length = SZ_1M,
.type = MT_DEVICE
}, {
.virtual = 0xfe400000,
.pfn = __phys_to_pfn(0x10400000),
.length = SZ_1M,
.type = MT_DEVICE
}
};
static void __init

25
arch/arm/mach-clps7500/core.c
View File

@ -259,10 +259,27 @@ static void __init clps7500_init_irq(void)
}
static struct map_desc cl7500_io_desc[] __initdata = {
{ IO_BASE, IO_START, IO_SIZE, MT_DEVICE }, /* IO space */
{ ISA_BASE, ISA_START, ISA_SIZE, MT_DEVICE }, /* ISA space */
{ FLASH_BASE, FLASH_START, FLASH_SIZE, MT_DEVICE }, /* Flash */
{ LED_BASE, LED_START, LED_SIZE, MT_DEVICE } /* LED */
{ /* IO space */
.virtual = IO_BASE,
.pfn = __phys_to_pfn(IO_START),
.length = IO_SIZE,
.type = MT_DEVICE
}, { /* ISA space */
.virtual = ISA_BASE,
.pfn = __phys_to_pfn(ISA_START),
.length = ISA_SIZE,
.type = MT_DEVICE
}, { /* Flash */
.virtual = FLASH_BASE,
.pfn = __phys_to_pfn(FLASH_START),
.length = FLASH_SIZE,
.type = MT_DEVICE
}, { /* LED */
.virtual = LED_BASE,
.pfn = __phys_to_pfn(LED_START),
.length = LED_SIZE,
.type = MT_DEVICE
}
};
static void __init clps7500_map_io(void)

38
arch/arm/mach-ebsa110/core.c
View File

@ -76,16 +76,42 @@ static struct map_desc ebsa110_io_desc[] __initdata = {
/*
* sparse external-decode ISAIO space
*/
{ IRQ_STAT, TRICK4_PHYS, PGDIR_SIZE, MT_DEVICE }, /* IRQ_STAT/IRQ_MCLR */
{ IRQ_MASK, TRICK3_PHYS, PGDIR_SIZE, MT_DEVICE }, /* IRQ_MASK/IRQ_MSET */
{ SOFT_BASE, TRICK1_PHYS, PGDIR_SIZE, MT_DEVICE }, /* SOFT_BASE */
{ PIT_BASE, TRICK0_PHYS, PGDIR_SIZE, MT_DEVICE }, /* PIT_BASE */
{ /* IRQ_STAT/IRQ_MCLR */
.virtual = IRQ_STAT,
.pfn = __phys_to_pfn(TRICK4_PHYS),
.length = PGDIR_SIZE,
.type = MT_DEVICE
}, { /* IRQ_MASK/IRQ_MSET */
.virtual = IRQ_MASK,
.pfn = __phys_to_pfn(TRICK3_PHYS),
.length = PGDIR_SIZE,
.type = MT_DEVICE
}, { /* SOFT_BASE */
.virtual = SOFT_BASE,
.pfn = __phys_to_pfn(TRICK1_PHYS),
.length = PGDIR_SIZE,
.type = MT_DEVICE
}, { /* PIT_BASE */
.virtual = PIT_BASE,
.pfn = __phys_to_pfn(TRICK0_PHYS),
.length = PGDIR_SIZE,
.type = MT_DEVICE
},
/*
* self-decode ISAIO space
*/
{ ISAIO_BASE, ISAIO_PHYS, ISAIO_SIZE, MT_DEVICE },
{ ISAMEM_BASE, ISAMEM_PHYS, ISAMEM_SIZE, MT_DEVICE }
{
.virtual = ISAIO_BASE,
.pfn = __phys_to_pfn(ISAIO_PHYS),
.length = ISAIO_SIZE,
.type = MT_DEVICE
}, {
.virtual = ISAMEM_BASE,
.pfn = __phys_to_pfn(ISAMEM_PHYS),
.length = ISAMEM_SIZE,
.type = MT_DEVICE
}
};
static void __init ebsa110_map_io(void)

1
arch/arm/mach-ebsa110/io.c
View File

@ -24,6 +24,7 @@
#include <linux/kernel.h>
#include <linux/types.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/page.h>

37
arch/arm/mach-epxa10db/mm.c
View File

@ -31,12 +31,37 @@
/* Page table mapping for I/O region */
static struct map_desc epxa10db_io_desc[] __initdata = {
{ IO_ADDRESS(EXC_REGISTERS_BASE), EXC_REGISTERS_BASE, SZ_16K, MT_DEVICE },
{ IO_ADDRESS(EXC_PLD_BLOCK0_BASE), EXC_PLD_BLOCK0_BASE, SZ_16K, MT_DEVICE },
{ IO_ADDRESS(EXC_PLD_BLOCK1_BASE), EXC_PLD_BLOCK1_BASE, SZ_16K, MT_DEVICE },
{ IO_ADDRESS(EXC_PLD_BLOCK2_BASE), EXC_PLD_BLOCK2_BASE, SZ_16K, MT_DEVICE },
{ IO_ADDRESS(EXC_PLD_BLOCK3_BASE), EXC_PLD_BLOCK3_BASE, SZ_16K, MT_DEVICE },
{ FLASH_VADDR(EXC_EBI_BLOCK0_BASE), EXC_EBI_BLOCK0_BASE, SZ_16M, MT_DEVICE }
{
.virtual = IO_ADDRESS(EXC_REGISTERS_BASE),
.pfn = __phys_to_pfn(EXC_REGISTERS_BASE),
.length = SZ_16K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(EXC_PLD_BLOCK0_BASE),
.pfn = __phys_to_pfn(EXC_PLD_BLOCK0_BASE),
.length = SZ_16K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(EXC_PLD_BLOCK1_BASE),
.pfn =__phys_to_pfn(EXC_PLD_BLOCK1_BASE),
.length = SZ_16K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(EXC_PLD_BLOCK2_BASE),
.physical = __phys_to_pfn(EXC_PLD_BLOCK2_BASE),
.length = SZ_16K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(EXC_PLD_BLOCK3_BASE),
.pfn = __phys_to_pfn(EXC_PLD_BLOCK3_BASE),
.length = SZ_16K,
.type = MT_DEVICE
}, {
.virtual = FLASH_VADDR(EXC_EBI_BLOCK0_BASE),
.pfn = __phys_to_pfn(EXC_EBI_BLOCK0_BASE),
.length = SZ_16M,
.type = MT_DEVICE
}
};
void __init epxa10db_map_io(void)

57
arch/arm/mach-footbridge/common.c
View File

@ -130,8 +130,17 @@ void __init footbridge_init_irq(void)
* it means that we have extra bullet protection on our feet.
*/
static struct map_desc fb_common_io_desc[] __initdata = {
{ ARMCSR_BASE, DC21285_ARMCSR_BASE, ARMCSR_SIZE, MT_DEVICE },
{ XBUS_BASE, 0x40000000, XBUS_SIZE, MT_DEVICE }
{
.virtual = ARMCSR_BASE,
.pfn = DC21285_ARMCSR_BASE,
.length = ARMCSR_SIZE,
.type = MT_DEVICE
}, {
.virtual = XBUS_BASE,
.pfn = __phys_to_pfn(0x40000000),
.length = XBUS_SIZE,
.type = MT_DEVICE
}
};
/*
@ -140,11 +149,32 @@ static struct map_desc fb_common_io_desc[] __initdata = {
*/
static struct map_desc ebsa285_host_io_desc[] __initdata = {
#if defined(CONFIG_ARCH_FOOTBRIDGE) && defined(CONFIG_FOOTBRIDGE_HOST)
{ PCIMEM_BASE, DC21285_PCI_MEM, PCIMEM_SIZE, MT_DEVICE },
{ PCICFG0_BASE, DC21285_PCI_TYPE_0_CONFIG, PCICFG0_SIZE, MT_DEVICE },
{ PCICFG1_BASE, DC21285_PCI_TYPE_1_CONFIG, PCICFG1_SIZE, MT_DEVICE },
{ PCIIACK_BASE, DC21285_PCI_IACK, PCIIACK_SIZE, MT_DEVICE },
{ PCIO_BASE, DC21285_PCI_IO, PCIO_SIZE, MT_DEVICE }
{
.virtual = PCIMEM_BASE,
.pfn = __phys_to_pfn(DC21285_PCI_MEM),
.length = PCIMEM_SIZE,
.type = MT_DEVICE
}, {
.virtual = PCICFG0_BASE,
.pfn = __phys_to_pfn(DC21285_PCI_TYPE_0_CONFIG),
.length = PCICFG0_SIZE,
.type = MT_DEVICE
}, {
.virtual = PCICFG1_BASE,
.pfn = __phys_to_pfn(DC21285_PCI_TYPE_1_CONFIG),
.length = PCICFG1_SIZE,
.type = MT_DEVICE
}, {
.virtual = PCIIACK_BASE,
.pfn = __phys_to_pfn(DC21285_PCI_IACK),
.length = PCIIACK_SIZE,
.type = MT_DEVICE
}, {
.virtual = PCIO_BASE,
.pfn = __phys_to_pfn(DC21285_PCI_IO),
.length = PCIO_SIZE,
.type = MT_DEVICE
}
#endif
};
@ -153,8 +183,17 @@ static struct map_desc ebsa285_host_io_desc[] __initdata = {
*/
static struct map_desc co285_io_desc[] __initdata = {
#ifdef CONFIG_ARCH_CO285
{ PCIO_BASE, DC21285_PCI_IO, PCIO_SIZE, MT_DEVICE },
{ PCIMEM_BASE, DC21285_PCI_MEM, PCIMEM_SIZE, MT_DEVICE }
{
.virtual = PCIO_BASE,
.pfn = __phys_to_pfn(DC21285_PCI_IO),
.length = PCIO_SIZE,
.type = MT_DEVICE
}, {
.virtual = PCIMEM_BASE,
.pfn = __phys_to_pfn(DC21285_PCI_MEM),
.length = PCIMEM_SIZE,
.type = MT_DEVICE
}
#endif
};

7
arch/arm/mach-h720x/common.c
View File

@ -237,7 +237,12 @@ void __init h720x_init_irq (void)
}
static struct map_desc h720x_io_desc[] __initdata = {
{ IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE },
{
.virtual = IO_VIRT,
.pfn = __phys_to_pfn(IO_PHYS),
.length = IO_SIZE,
.type = MT_DEVICE
},
};
/* Initialize io tables */

8
arch/arm/mach-imx/generic.c
View File

@ -273,8 +273,12 @@ static struct platform_device *devices[] __initdata = {
};
static struct map_desc imx_io_desc[] __initdata = {
/* virtual physical length type */
{IMX_IO_BASE, IMX_IO_PHYS, IMX_IO_SIZE, MT_DEVICE},
{
.virtual = IMX_IO_BASE,
.pfn = __phys_to_pfn(IMX_IO_PHYS),
.length = IMX_IO_SIZE,
.type = MT_DEVICE
}
};
void __init

38
arch/arm/mach-imx/mx1ads.c
View File

@ -61,13 +61,37 @@ mx1ads_init(void)
}
static struct map_desc mx1ads_io_desc[] __initdata = {
/* virtual physical length type */
{IMX_CS0_VIRT, IMX_CS0_PHYS, IMX_CS0_SIZE, MT_DEVICE},
{IMX_CS1_VIRT, IMX_CS1_PHYS, IMX_CS1_SIZE, MT_DEVICE},
{IMX_CS2_VIRT, IMX_CS2_PHYS, IMX_CS2_SIZE, MT_DEVICE},
{IMX_CS3_VIRT, IMX_CS3_PHYS, IMX_CS3_SIZE, MT_DEVICE},
{IMX_CS4_VIRT, IMX_CS4_PHYS, IMX_CS4_SIZE, MT_DEVICE},
{IMX_CS5_VIRT, IMX_CS5_PHYS, IMX_CS5_SIZE, MT_DEVICE},
{
.virtual = IMX_CS0_VIRT,
.pfn = __phys_to_pfn(IMX_CS0_PHYS),
.length = IMX_CS0_SIZE,
.type = MT_DEVICE
}, {
.virtual = IMX_CS1_VIRT,
.pfn = __phys_to_pfn(IMX_CS1_PHYS),
.length = IMX_CS1_SIZE,
.type = MT_DEVICE
}, {
.virtual = IMX_CS2_VIRT,
.pfn = __phys_to_pfn(IMX_CS2_PHYS),
.length = IMX_CS2_SIZE,
.type = MT_DEVICE
}, {
.virtual = IMX_CS3_VIRT,
.pfn = __phys_to_pfn(IMX_CS3_PHYS),
.length = IMX_CS3_SIZE,
.type = MT_DEVICE
}, {
.virtual = IMX_CS4_VIRT,
.pfn = __phys_to_pfn(IMX_CS4_PHYS),
.length = IMX_CS4_SIZE,
.type = MT_DEVICE
}, {
.virtual = IMX_CS5_VIRT,
.pfn = __phys_to_pfn(IMX_CS5_PHYS),
.length = IMX_CS5_SIZE,
.type = MT_DEVICE
}
};
static void __init

79
arch/arm/mach-integrator/integrator_ap.c
View File

@ -75,19 +75,72 @@
*/
static struct map_desc ap_io_desc[] __initdata = {
{ IO_ADDRESS(INTEGRATOR_HDR_BASE), INTEGRATOR_HDR_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_SC_BASE), INTEGRATOR_SC_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_EBI_BASE), INTEGRATOR_EBI_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_CT_BASE), INTEGRATOR_CT_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_IC_BASE), INTEGRATOR_IC_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_UART0_BASE), INTEGRATOR_UART0_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_UART1_BASE), INTEGRATOR_UART1_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_DBG_BASE), INTEGRATOR_DBG_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_GPIO_BASE), INTEGRATOR_GPIO_BASE, SZ_4K, MT_DEVICE },
{ PCI_MEMORY_VADDR, PHYS_PCI_MEM_BASE, SZ_16M, MT_DEVICE },
{ PCI_CONFIG_VADDR, PHYS_PCI_CONFIG_BASE, SZ_16M, MT_DEVICE },
{ PCI_V3_VADDR, PHYS_PCI_V3_BASE, SZ_64K, MT_DEVICE },
{ PCI_IO_VADDR, PHYS_PCI_IO_BASE, SZ_64K, MT_DEVICE }
{
.virtual = IO_ADDRESS(INTEGRATOR_HDR_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_HDR_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(INTEGRATOR_SC_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_SC_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(INTEGRATOR_EBI_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_EBI_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(INTEGRATOR_CT_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_CT_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(INTEGRATOR_IC_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_IC_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(INTEGRATOR_UART0_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_UART0_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(INTEGRATOR_UART1_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_UART1_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(INTEGRATOR_DBG_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_DBG_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(INTEGRATOR_GPIO_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_GPIO_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = PCI_MEMORY_VADDR,
.pfn = __phys_to_pfn(PHYS_PCI_MEM_BASE),
.length = SZ_16M,
.type = MT_DEVICE
}, {
.virtual = PCI_CONFIG_VADDR,
.pfn = __phys_to_pfn(PHYS_PCI_CONFIG_BASE),
.length = SZ_16M,
.type = MT_DEVICE
}, {
.virtual = PCI_V3_VADDR,
.pfn = __phys_to_pfn(PHYS_PCI_V3_BASE),
.length = SZ_64K,
.type = MT_DEVICE
}, {
.virtual = PCI_IO_VADDR,
.pfn = __phys_to_pfn(PHYS_PCI_IO_BASE),
.length = SZ_64K,
.type = MT_DEVICE
}
};
static void __init ap_map_io(void)

67
arch/arm/mach-integrator/integrator_cp.c
View File

@ -74,17 +74,62 @@
*/
static struct map_desc intcp_io_desc[] __initdata = {
{ IO_ADDRESS(INTEGRATOR_HDR_BASE), INTEGRATOR_HDR_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_SC_BASE), INTEGRATOR_SC_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_EBI_BASE), INTEGRATOR_EBI_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_CT_BASE), INTEGRATOR_CT_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_IC_BASE), INTEGRATOR_IC_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_UART0_BASE), INTEGRATOR_UART0_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_UART1_BASE), INTEGRATOR_UART1_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_DBG_BASE), INTEGRATOR_DBG_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_GPIO_BASE), INTEGRATOR_GPIO_BASE, SZ_4K, MT_DEVICE },
{ 0xfca00000, 0xca000000, SZ_4K, MT_DEVICE },
{ 0xfcb00000, 0xcb000000, SZ_4K, MT_DEVICE },
{
.virtual = IO_ADDRESS(INTEGRATOR_HDR_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_HDR_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(INTEGRATOR_SC_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_SC_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(INTEGRATOR_EBI_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_EBI_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(INTEGRATOR_CT_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_CT_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(INTEGRATOR_IC_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_IC_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(INTEGRATOR_UART0_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_UART0_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(INTEGRATOR_UART1_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_UART1_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(INTEGRATOR_DBG_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_DBG_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(INTEGRATOR_GPIO_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_GPIO_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = 0xfca00000,
.pfn = __phys_to_pfn(0xca000000),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = 0xfcb00000,
.pfn = __phys_to_pfn(0xcb000000),
.length = SZ_4K,
.type = MT_DEVICE
}
};
static void __init intcp_map_io(void)

18
arch/arm/mach-iop3xx/iop321-setup.c
View File

@ -38,13 +38,17 @@
* Standard IO mapping for all IOP321 based systems
*/
static struct map_desc iop321_std_desc[] __initdata = {
/* virtual physical length type */
/* mem mapped registers */
{ IOP321_VIRT_MEM_BASE, IOP321_PHYS_MEM_BASE, 0x00002000, MT_DEVICE },
/* PCI IO space */
{ IOP321_PCI_LOWER_IO_VA, IOP321_PCI_LOWER_IO_PA, IOP321_PCI_IO_WINDOW_SIZE, MT_DEVICE }
{ /* mem mapped registers */
.virtual = IOP321_VIRT_MEM_BASE,
.pfn = __phys_to_pfn(IOP321_PHYS_MEM_BASE),
.length = 0x00002000,
.type = MT_DEVICE
}, { /* PCI IO space */
.virtual = IOP321_PCI_LOWER_IO_VA,
.pfn = __phys_to_pfn(IOP321_PCI_LOWER_IO_PA),
.length = IOP321_PCI_IO_WINDOW_SIZE,
.type = MT_DEVICE
}
};
#ifdef CONFIG_ARCH_IQ80321

18
arch/arm/mach-iop3xx/iop331-setup.c
View File

@ -37,13 +37,17 @@
* Standard IO mapping for all IOP331 based systems
*/
static struct map_desc iop331_std_desc[] __initdata = {
/* virtual physical length type */
/* mem mapped registers */
{ IOP331_VIRT_MEM_BASE, IOP331_PHYS_MEM_BASE, 0x00002000, MT_DEVICE },
/* PCI IO space */
{ IOP331_PCI_LOWER_IO_VA, IOP331_PCI_LOWER_IO_PA, IOP331_PCI_IO_WINDOW_SIZE, MT_DEVICE }
{ /* mem mapped registers */
.virtual = IOP331_VIRT_MEM_BASE,
.pfn = __phys_to_pfn(IOP331_PHYS_MEM_BASE),
.length = 0x00002000,
.type = MT_DEVICE
}, { /* PCI IO space */
.virtual = IOP331_PCI_LOWER_IO_VA,
.pfn = __phys_to_pfn(IOP331_PCI_LOWER_IO_PA),
.length = IOP331_PCI_IO_WINDOW_SIZE,
.type = MT_DEVICE
}
};
static struct uart_port iop331_serial_ports[] = {

10
arch/arm/mach-iop3xx/iq31244-mm.c
View File

@ -29,10 +29,12 @@
* We use RedBoot's setup for the onboard devices.
*/
static struct map_desc iq31244_io_desc[] __initdata = {
/* virtual physical length type */
/* on-board devices */
{ IQ31244_UART, IQ31244_UART, 0x00100000, MT_DEVICE }
{ /* on-board devices */
.virtual = IQ31244_UART,
.pfn = __phys_to_pfn(IQ31244_UART),
.length = 0x00100000,
.type = MT_DEVICE
}
};
void __init iq31244_map_io(void)

10
arch/arm/mach-iop3xx/iq80321-mm.c
View File

@ -29,10 +29,12 @@
* We use RedBoot's setup for the onboard devices.
*/
static struct map_desc iq80321_io_desc[] __initdata = {
/* virtual physical length type */
/* on-board devices */
{ IQ80321_UART, IQ80321_UART, 0x00100000, MT_DEVICE }
{ /* on-board devices */
.virtual = IQ80321_UART,
.pfn = __phys_to_pfn(IQ80321_UART),
.length = 0x00100000,
.type = MT_DEVICE
}
};
void __init iq80321_map_io(void)

16
arch/arm/mach-ixp2000/core.c
View File

@ -83,42 +83,42 @@ void ixp2000_release_slowport(struct slowport_cfg *old_cfg)
static struct map_desc ixp2000_io_desc[] __initdata = {
{
.virtual = IXP2000_CAP_VIRT_BASE,
.physical = IXP2000_CAP_PHYS_BASE,
.pfn = __phys_to_pfn(IXP2000_CAP_PHYS_BASE),
.length = IXP2000_CAP_SIZE,
.type = MT_DEVICE
}, {
.virtual = IXP2000_INTCTL_VIRT_BASE,
.physical = IXP2000_INTCTL_PHYS_BASE,
.pfn = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE),
.length = IXP2000_INTCTL_SIZE,
.type = MT_DEVICE
}, {
.virtual = IXP2000_PCI_CREG_VIRT_BASE,
.physical = IXP2000_PCI_CREG_PHYS_BASE,
.pfn = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE),
.length = IXP2000_PCI_CREG_SIZE,
.type = MT_DEVICE
}, {
.virtual = IXP2000_PCI_CSR_VIRT_BASE,
.physical = IXP2000_PCI_CSR_PHYS_BASE,
.pfn = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE),
.length = IXP2000_PCI_CSR_SIZE,
.type = MT_DEVICE
}, {
.virtual = IXP2000_MSF_VIRT_BASE,
.physical = IXP2000_MSF_PHYS_BASE,
.pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE),
.length = IXP2000_MSF_SIZE,
.type = MT_DEVICE
}, {
.virtual = IXP2000_PCI_IO_VIRT_BASE,
.physical = IXP2000_PCI_IO_PHYS_BASE,
.pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE),
.length = IXP2000_PCI_IO_SIZE,
.type = MT_DEVICE
}, {
.virtual = IXP2000_PCI_CFG0_VIRT_BASE,
.physical = IXP2000_PCI_CFG0_PHYS_BASE,
.pfn = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE),
.length = IXP2000_PCI_CFG0_SIZE,
.type = MT_DEVICE
}, {
.virtual = IXP2000_PCI_CFG1_VIRT_BASE,
.physical = IXP2000_PCI_CFG1_PHYS_BASE,
.pfn = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE),
.length = IXP2000_PCI_CFG1_SIZE,
.type = MT_DEVICE
}

2
arch/arm/mach-ixp2000/ixdp2x00.c
View File

@ -176,7 +176,7 @@ void ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long
*************************************************************************/
static struct map_desc ixdp2x00_io_desc __initdata = {
.virtual = IXDP2X00_VIRT_CPLD_BASE,
.physical = IXDP2X00_PHYS_CPLD_BASE,
.pfn = __phys_to_pfn(IXDP2X00_PHYS_CPLD_BASE),
.length = IXDP2X00_CPLD_SIZE,
.type = MT_DEVICE
};

2
arch/arm/mach-ixp2000/ixdp2x01.c
View File

@ -136,7 +136,7 @@ void __init ixdp2x01_init_irq(void)
*************************************************************************/
static struct map_desc ixdp2x01_io_desc __initdata = {
.virtual = IXDP2X01_VIRT_CPLD_BASE,
.physical = IXDP2X01_PHYS_CPLD_BASE,
.pfn = __phys_to_pfn(IXDP2X01_PHYS_CPLD_BASE),
.length = IXDP2X01_CPLD_REGION_SIZE,
.type = MT_DEVICE
};

8
arch/arm/mach-ixp4xx/common.c
View File

@ -44,24 +44,24 @@
static struct map_desc ixp4xx_io_desc[] __initdata = {
{ /* UART, Interrupt ctrl, GPIO, timers, NPEs, MACs, USB .... */
.virtual = IXP4XX_PERIPHERAL_BASE_VIRT,
.physical = IXP4XX_PERIPHERAL_BASE_PHYS,
.pfn = __phys_to_pfn(IXP4XX_PERIPHERAL_BASE_PHYS),
.length = IXP4XX_PERIPHERAL_REGION_SIZE,
.type = MT_DEVICE
}, { /* Expansion Bus Config Registers */
.virtual = IXP4XX_EXP_CFG_BASE_VIRT,
.physical = IXP4XX_EXP_CFG_BASE_PHYS,
.pfn = __phys_to_pfn(IXP4XX_EXP_CFG_BASE_PHYS),
.length = IXP4XX_EXP_CFG_REGION_SIZE,
.type = MT_DEVICE
}, { /* PCI Registers */
.virtual = IXP4XX_PCI_CFG_BASE_VIRT,
.physical = IXP4XX_PCI_CFG_BASE_PHYS,
.pfn = __phys_to_pfn(IXP4XX_PCI_CFG_BASE_PHYS),
.length = IXP4XX_PCI_CFG_REGION_SIZE,
.type = MT_DEVICE
},
#ifdef CONFIG_DEBUG_LL
{ /* Debug UART mapping */
.virtual = IXP4XX_DEBUG_UART_BASE_VIRT,
.physical = IXP4XX_DEBUG_UART_BASE_PHYS,
.pfn = __phys_to_pfn(IXP4XX_DEBUG_UART_BASE_PHYS),
.length = IXP4XX_DEBUG_UART_REGION_SIZE,
.type = MT_DEVICE
}

13
arch/arm/mach-lh7a40x/arch-kev7a400.c
View File

@ -26,8 +26,17 @@
/* This function calls the board specific IRQ initialization function. */
static struct map_desc kev7a400_io_desc[] __initdata = {
{ IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE },
{ CPLD_VIRT, CPLD_PHYS, CPLD_SIZE, MT_DEVICE },
{
.virtual = IO_VIRT,
.pfn = __phys_to_pfn(IO_PHYS),
.length = IO_SIZE,
.type = MT_DEVICE
}, {
.virtual = CPLD_VIRT,
.pfn = __phys_to_pfn(CPLD_PHYS),
.length = CPLD_SIZE,
.type = MT_DEVICE
}
};
void __init kev7a400_map_io(void)

86
arch/arm/mach-lh7a40x/arch-lpd7a40x.c
View File

@ -227,23 +227,79 @@ void __init lh7a40x_init_board_irq (void)
}
static struct map_desc lpd7a400_io_desc[] __initdata = {
{ IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE },
/* Mapping added to work around chip select problems */
{ IOBARRIER_VIRT, IOBARRIER_PHYS, IOBARRIER_SIZE, MT_DEVICE },
{ CF_VIRT, CF_PHYS, CF_SIZE, MT_DEVICE },
{
.virtual = IO_VIRT,
.pfn = __phys_to_pfn(IO_PHYS),
.length = IO_SIZE,
.type = MT_DEVICE
}, { /* Mapping added to work around chip select problems */
.virtual = IOBARRIER_VIRT,
.pfn = __phys_to_pfn(IOBARRIER_PHYS),
.length = IOBARRIER_SIZE,
.type = MT_DEVICE
}, {
.virtual = CF_VIRT,
.pfn = __phys_to_pfn(CF_PHYS),
.length = CF_SIZE,
.type = MT_DEVICE
}, {
.virtual = CPLD02_VIRT,
.pfn = __phys_to_pfn(CPLD02_PHYS),
.length = CPLD02_SIZE,
.type = MT_DEVICE
}, {
.virtual = CPLD06_VIRT,
.pfn = __phys_to_pfn(CPLD06_PHYS),
.length = CPLD06_SIZE,
.type = MT_DEVICE
}, {
.virtual = CPLD08_VIRT,
.pfn = __phys_to_pfn(CPLD08_PHYS),
.length = CPLD08_SIZE,
.type = MT_DEVICE
}, {
.virtual = CPLD0C_VIRT,
.pfn = __phys_to_pfn(CPLD0C_PHYS),
.length = CPLD0C_SIZE,
.type = MT_DEVICE
}, {
.virtual = CPLD0E_VIRT,
.pfn = __phys_to_pfn(CPLD0E_PHYS),
.length = CPLD0E_SIZE,
.type = MT_DEVICE
}, {
.virtual = CPLD10_VIRT,
.pfn = __phys_to_pfn(CPLD10_PHYS),
.length = CPLD10_SIZE,
.type = MT_DEVICE
}, {
.virtual = CPLD12_VIRT,
.pfn = __phys_to_pfn(CPLD12_PHYS),
.length = CPLD12_SIZE,
.type = MT_DEVICE
}, {
.virtual = CPLD14_VIRT,
.pfn = __phys_to_pfn(CPLD14_PHYS),
.length = CPLD14_SIZE,
.type = MT_DEVICE
}, {
.virtual = CPLD16_VIRT,
.pfn = __phys_to_pfn(CPLD16_PHYS),
.length = CPLD16_SIZE,
.type = MT_DEVICE
}, {
.virtual = CPLD18_VIRT,
.pfn = __phys_to_pfn(CPLD18_PHYS),
.length = CPLD18_SIZE,
.type = MT_DEVICE
}, {
.virtual = CPLD1A_VIRT,
.pfn = __phys_to_pfn(CPLD1A_PHYS),
.length = CPLD1A_SIZE,
.type = MT_DEVICE
},
/* This mapping is redundant since the smc driver performs another. */
/* { CPLD00_VIRT, CPLD00_PHYS, CPLD00_SIZE, MT_DEVICE }, */
{ CPLD02_VIRT, CPLD02_PHYS, CPLD02_SIZE, MT_DEVICE },
{ CPLD06_VIRT, CPLD06_PHYS, CPLD06_SIZE, MT_DEVICE },
{ CPLD08_VIRT, CPLD08_PHYS, CPLD08_SIZE, MT_DEVICE },
{ CPLD0C_VIRT, CPLD0C_PHYS, CPLD0C_SIZE, MT_DEVICE },
{ CPLD0E_VIRT, CPLD0E_PHYS, CPLD0E_SIZE, MT_DEVICE },
{ CPLD10_VIRT, CPLD10_PHYS, CPLD10_SIZE, MT_DEVICE },
{ CPLD12_VIRT, CPLD12_PHYS, CPLD12_SIZE, MT_DEVICE },
{ CPLD14_VIRT, CPLD14_PHYS, CPLD14_SIZE, MT_DEVICE },
{ CPLD16_VIRT, CPLD16_PHYS, CPLD16_SIZE, MT_DEVICE },
{ CPLD18_VIRT, CPLD18_PHYS, CPLD18_SIZE, MT_DEVICE },
{ CPLD1A_VIRT, CPLD1A_PHYS, CPLD1A_SIZE, MT_DEVICE },
};
void __init

8
arch/arm/mach-omap1/board-innovator.c
View File

@ -103,8 +103,12 @@ static struct platform_device innovator_flash_device = {
/* Only FPGA needs to be mapped here. All others are done with ioremap */
static struct map_desc innovator1510_io_desc[] __initdata = {
{ OMAP1510_FPGA_BASE, OMAP1510_FPGA_START, OMAP1510_FPGA_SIZE,
MT_DEVICE },
{
.virtual = OMAP1510_FPGA_BASE,
.pfn = __phys_to_pfn(OMAP1510_FPGA_START),
.length = OMAP1510_FPGA_SIZE,
.type = MT_DEVICE
}
};
static struct resource innovator1510_smc91x_resources[] = {

8
arch/arm/mach-omap1/board-perseus2.c
View File

@ -134,8 +134,12 @@ void omap_perseus2_init_irq(void)
/* Only FPGA needs to be mapped here. All others are done with ioremap */
static struct map_desc omap_perseus2_io_desc[] __initdata = {
{H2P2_DBG_FPGA_BASE, H2P2_DBG_FPGA_START, H2P2_DBG_FPGA_SIZE,
MT_DEVICE},
{
.virtual = H2P2_DBG_FPGA_BASE,
.pfn = __phys_to_pfn(H2P2_DBG_FPGA_START),
.length = H2P2_DBG_FPGA_SIZE,
.type = MT_DEVICE
}
};
static void __init omap_perseus2_map_io(void)

46
arch/arm/mach-omap1/io.c
View File

@ -26,27 +26,59 @@ extern void omap_sram_init(void);
* default mapping provided here.
*/
static struct map_desc omap_io_desc[] __initdata = {
{ IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE },
{
.virtual = IO_VIRT,
.pfn = __phys_to_pfn(IO_PHYS),
.length = IO_SIZE,
.type = MT_DEVICE
}
};
#ifdef CONFIG_ARCH_OMAP730
static struct map_desc omap730_io_desc[] __initdata = {
{ OMAP730_DSP_BASE, OMAP730_DSP_START, OMAP730_DSP_SIZE, MT_DEVICE },
{ OMAP730_DSPREG_BASE, OMAP730_DSPREG_START, OMAP730_DSPREG_SIZE, MT_DEVICE },
{
.virtual = OMAP730_DSP_BASE,
.pfn = __phys_to_pfn(OMAP730_DSP_START),
.length = OMAP730_DSP_SIZE,
.type = MT_DEVICE
}, {
.virtual = OMAP730_DSPREG_BASE,
.pfn = __phys_to_pfn(OMAP730_DSPREG_START),
.length = OMAP730_DSPREG_SIZE,
.type = MT_DEVICE
}
};
#endif
#ifdef CONFIG_ARCH_OMAP1510
static struct map_desc omap1510_io_desc[] __initdata = {
{ OMAP1510_DSP_BASE, OMAP1510_DSP_START, OMAP1510_DSP_SIZE, MT_DEVICE },
{ OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_START, OMAP1510_DSPREG_SIZE, MT_DEVICE },
{
.virtual = OMAP1510_DSP_BASE,
.pfn = __phys_to_pfn(OMAP1510_DSP_START),
.length = OMAP1510_DSP_SIZE,
.type = MT_DEVICE
}, {
.virtual = OMAP1510_DSPREG_BASE,
.pfn = __phys_to_pfn(OMAP1510_DSPREG_START),
.length = OMAP1510_DSPREG_SIZE,
.type = MT_DEVICE
}
};
#endif
#if defined(CONFIG_ARCH_OMAP16XX)
static struct map_desc omap16xx_io_desc[] __initdata = {
{ OMAP16XX_DSP_BASE, OMAP16XX_DSP_START, OMAP16XX_DSP_SIZE, MT_DEVICE },
{ OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE },
{
.virtual = OMAP16XX_DSP_BASE,
.pfn = __phys_to_pfn(OMAP16XX_DSP_START),
.length = OMAP16XX_DSP_SIZE,
.type = MT_DEVICE
}, {
.virtual = OMAP16XX_DSPREG_BASE,
.pfn = __phys_to_pfn(OMAP16XX_DSPREG_START),
.length = OMAP16XX_DSPREG_SIZE,
.type = MT_DEVICE
}
};
#endif

24
arch/arm/mach-pxa/corgi_ssp.c
View File

@ -222,24 +222,22 @@ static int corgi_ssp_remove(struct device *dev)
return 0;
}
static int corgi_ssp_suspend(struct device *dev, pm_message_t state, u32 level)
static int corgi_ssp_suspend(struct device *dev, pm_message_t state)
{
if (level == SUSPEND_POWER_DOWN) {
ssp_flush(&corgi_ssp_dev);
ssp_save_state(&corgi_ssp_dev,&corgi_ssp_state);
}
ssp_flush(&corgi_ssp_dev);
ssp_save_state(&corgi_ssp_dev,&corgi_ssp_state);
return 0;
}
static int corgi_ssp_resume(struct device *dev, u32 level)
static int corgi_ssp_resume(struct device *dev)
{
if (level == RESUME_POWER_ON) {
GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); /* High - Disable LCD Control/Timing Gen */
GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/
GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); /* High - Disable ADS7846*/
ssp_restore_state(&corgi_ssp_dev,&corgi_ssp_state);
ssp_enable(&corgi_ssp_dev);
}
GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); /* High - Disable LCD Control/Timing Gen */
GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/
GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); /* High - Disable ADS7846*/
ssp_restore_state(&corgi_ssp_dev,&corgi_ssp_state);
ssp_enable(&corgi_ssp_dev);
return 0;
}

82
arch/arm/mach-pxa/generic.c
View File

@ -34,6 +34,7 @@
#include <asm/arch/udc.h>
#include <asm/arch/pxafb.h>
#include <asm/arch/mmc.h>
#include <asm/arch/irda.h>
#include <asm/arch/i2c.h>
#include "generic.h"
@ -92,14 +93,42 @@ EXPORT_SYMBOL(pxa_set_cken);
* and cache flush area.
*/
static struct map_desc standard_io_desc[] __initdata = {
/* virtual physical length type */
{ 0xf2000000, 0x40000000, 0x02000000, MT_DEVICE }, /* Devs */
{ 0xf4000000, 0x44000000, 0x00100000, MT_DEVICE }, /* LCD */
{ 0xf6000000, 0x48000000, 0x00100000, MT_DEVICE }, /* Mem Ctl */
{ 0xf8000000, 0x4c000000, 0x00100000, MT_DEVICE }, /* USB host */
{ 0xfa000000, 0x50000000, 0x00100000, MT_DEVICE }, /* Camera */
{ 0xfe000000, 0x58000000, 0x00100000, MT_DEVICE }, /* IMem ctl */
{ 0xff000000, 0x00000000, 0x00100000, MT_DEVICE } /* UNCACHED_PHYS_0 */
{ /* Devs */
.virtual = 0xf2000000,
.pfn = __phys_to_pfn(0x40000000),
.length = 0x02000000,
.type = MT_DEVICE
}, { /* LCD */
.virtual = 0xf4000000,
.pfn = __phys_to_pfn(0x44000000),
.length = 0x00100000,
.type = MT_DEVICE
}, { /* Mem Ctl */
.virtual = 0xf6000000,
.pfn = __phys_to_pfn(0x48000000),
.length = 0x00100000,
.type = MT_DEVICE
}, { /* USB host */
.virtual = 0xf8000000,
.pfn = __phys_to_pfn(0x4c000000),
.length = 0x00100000,
.type = MT_DEVICE
}, { /* Camera */
.virtual = 0xfa000000,
.pfn = __phys_to_pfn(0x50000000),
.length = 0x00100000,
.type = MT_DEVICE
}, { /* IMem ctl */
.virtual = 0xfe000000,
.pfn = __phys_to_pfn(0x58000000),
.length = 0x00100000,
.type = MT_DEVICE
}, { /* UNCACHED_PHYS_0 */
.virtual = 0xff000000,
.pfn = __phys_to_pfn(0x00000000),
.length = 0x00100000,
.type = MT_DEVICE
}
};
void __init pxa_map_io(void)
@ -225,6 +254,10 @@ static struct platform_device stuart_device = {
.name = "pxa2xx-uart",
.id = 2,
};
static struct platform_device hwuart_device = {
.name = "pxa2xx-uart",
.id = 3,
};
static struct resource i2c_resources[] = {
{
@ -265,10 +298,26 @@ static struct resource i2s_resources[] = {
static struct platform_device i2s_device = {
.name = "pxa2xx-i2s",
.id = -1,
.resource = i2c_resources,
.resource = i2s_resources,
.num_resources = ARRAY_SIZE(i2s_resources),
};
static u64 pxaficp_dmamask = ~(u32)0;
static struct platform_device pxaficp_device = {
.name = "pxa2xx-ir",
.id = -1,
.dev = {
.dma_mask = &pxaficp_dmamask,
.coherent_dma_mask = 0xffffffff,
},
};
void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
{
pxaficp_device.dev.platform_data = info;
}
static struct platform_device *devices[] __initdata = {
&pxamci_device,
&udc_device,
@ -276,13 +325,26 @@ static struct platform_device *devices[] __initdata = {
&ffuart_device,
&btuart_device,
&stuart_device,
&pxaficp_device,
&i2c_device,
&i2s_device,
};
static int __init pxa_init(void)
{
return platform_add_devices(devices, ARRAY_SIZE(devices));
int cpuid, ret;
ret = platform_add_devices(devices, ARRAY_SIZE(devices));
if (ret)
return ret;
/* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
cpuid = read_cpuid(CPUID_ID);
if (((cpuid >> 4) & 0xfff) == 0x2d0 ||
((cpuid >> 4) & 0xfff) == 0x290)
ret = platform_device_register(&hwuart_device);
return ret;
}
subsys_initcall(pxa_init);

21
arch/arm/mach-pxa/idp.c
View File

@ -152,16 +152,17 @@ static void __init idp_init_irq(void)
}
static struct map_desc idp_io_desc[] __initdata = {
/* virtual physical length type */
{ IDP_COREVOLT_VIRT,
IDP_COREVOLT_PHYS,
IDP_COREVOLT_SIZE,
MT_DEVICE },
{ IDP_CPLD_VIRT,
IDP_CPLD_PHYS,
IDP_CPLD_SIZE,
MT_DEVICE }
{
.virtual = IDP_COREVOLT_VIRT,
.pfn = __phys_to_pfn(IDP_COREVOLT_PHYS),
.length = IDP_COREVOLT_SIZE,
.type = MT_DEVICE
}, {
.virtual = IDP_CPLD_VIRT,
.pfn = __phys_to_pfn(IDP_CPLD_PHYS),
.length = IDP_CPLD_SIZE,
.type = MT_DEVICE
}
};
static void __init idp_map_io(void)

27
arch/arm/mach-pxa/lubbock.c
View File

@ -35,6 +35,7 @@
#include <asm/arch/pxa-regs.h>
#include <asm/arch/lubbock.h>
#include <asm/arch/udc.h>
#include <asm/arch/irda.h>
#include <asm/arch/pxafb.h>
#include <asm/arch/mmc.h>
@ -237,16 +238,40 @@ static struct pxamci_platform_data lubbock_mci_platform_data = {
.init = lubbock_mci_init,
};
static void lubbock_irda_transceiver_mode(struct device *dev, int mode)
{
unsigned long flags;
local_irq_save(flags);
if (mode & IR_SIRMODE) {
LUB_MISC_WR &= ~(1 << 4);
} else if (mode & IR_FIRMODE) {
LUB_MISC_WR |= 1 << 4;
}
local_irq_restore(flags);
}
static struct pxaficp_platform_data lubbock_ficp_platform_data = {
.transceiver_cap = IR_SIRMODE | IR_FIRMODE,
.transceiver_mode = lubbock_irda_transceiver_mode,
};
static void __init lubbock_init(void)
{
pxa_set_udc_info(&udc_info);
set_pxa_fb_info(&sharp_lm8v31);
pxa_set_mci_info(&lubbock_mci_platform_data);
pxa_set_ficp_info(&lubbock_ficp_platform_data);
(void) platform_add_devices(devices, ARRAY_SIZE(devices));
}
static struct map_desc lubbock_io_desc[] __initdata = {
{ LUBBOCK_FPGA_VIRT, LUBBOCK_FPGA_PHYS, 0x00100000, MT_DEVICE }, /* CPLD */
{ /* CPLD */
.virtual = LUBBOCK_FPGA_VIRT,
.pfn = __phys_to_pfn(LUBBOCK_FPGA_PHYS),
.length = 0x00100000,
.type = MT_DEVICE
}
};
static void __init lubbock_map_io(void)

32
arch/arm/mach-pxa/mainstone.c
View File

@ -37,6 +37,7 @@
#include <asm/arch/audio.h>
#include <asm/arch/pxafb.h>
#include <asm/arch/mmc.h>
#include <asm/arch/irda.h>
#include "generic.h"
@ -294,6 +295,29 @@ static struct pxamci_platform_data mainstone_mci_platform_data = {
.exit = mainstone_mci_exit,
};
static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
{
unsigned long flags;
local_irq_save(flags);
if (mode & IR_SIRMODE) {
MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
} else if (mode & IR_FIRMODE) {
MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
}
if (mode & IR_OFF) {
MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
} else {
MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
}
local_irq_restore(flags);
}
static struct pxaficp_platform_data mainstone_ficp_platform_data = {
.transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
.transceiver_mode = mainstone_irda_transceiver_mode,
};
static void __init mainstone_init(void)
{
/*
@ -313,11 +337,17 @@ static void __init mainstone_init(void)
set_pxa_fb_info(&toshiba_ltm035a776c);
pxa_set_mci_info(&mainstone_mci_platform_data);
pxa_set_ficp_info(&mainstone_ficp_platform_data);
}
static struct map_desc mainstone_io_desc[] __initdata = {
{ MST_FPGA_VIRT, MST_FPGA_PHYS, 0x00100000, MT_DEVICE }, /* CPLD */
{ /* CPLD */
.virtual = MST_FPGA_VIRT,
.pfn = __phys_to_pfn(MST_FPGA_PHYS),
.length = 0x00100000,
.type = MT_DEVICE
}
};
static void __init mainstone_map_io(void)

2
arch/arm/mach-pxa/pxa25x.c
View File

@ -129,7 +129,7 @@ void pxa_cpu_pm_enter(suspend_state_t state)
case PM_SUSPEND_MEM:
/* set resume return address */
PSPR = virt_to_phys(pxa_cpu_resume);
pxa_cpu_suspend(3);
pxa_cpu_suspend(PWRMODE_SLEEP);
break;
}
}

2
arch/arm/mach-pxa/pxa27x.c
View File

@ -157,7 +157,7 @@ void pxa_cpu_pm_enter(suspend_state_t state)
case PM_SUSPEND_MEM:
/* set resume return address */
PSPR = virt_to_phys(pxa_cpu_resume);
pxa_cpu_suspend(3);
pxa_cpu_suspend(PWRMODE_SLEEP);
break;
}
}

7
arch/arm/mach-pxa/sleep.S
View File

@ -28,7 +28,9 @@
/*
* pxa_cpu_suspend()
*
* Forces CPU into sleep state
* Forces CPU into sleep state.
*
* r0 = value for PWRMODE M field for desired sleep state
*/
ENTRY(pxa_cpu_suspend)
@ -53,6 +55,7 @@ ENTRY(pxa_cpu_suspend)
mov r10, sp
stmfd sp!, {r3 - r10}
mov r5, r0 @ save sleep mode
@ preserve phys address of stack
mov r0, sp
bl sleep_phys_sp
@ -66,7 +69,7 @@ ENTRY(pxa_cpu_suspend)
@ (also workaround for sighting 28071)
@ prepare value for sleep mode
mov r1, #3 @ sleep mode
mov r1, r5 @ sleep mode
@ prepare pointer to physical address 0 (virtual mapping in generic.c)
mov r2, #UNCACHED_PHYS_0

2
arch/arm/mach-pxa/standby.S
View File

@ -21,7 +21,7 @@
ENTRY(pxa_cpu_standby)
ldr r0, =PSSR
mov r1, #(PSSR_PH | PSSR_STS)
mov r2, #2
mov r2, #PWRMODE_STANDBY
mov r3, #UNCACHED_PHYS_0 @ Read mem context in.
ldr ip, [r3]
b 1f

19
arch/arm/mach-rpc/riscpc.c
View File

@ -61,9 +61,22 @@ static int __init parse_tag_acorn(const struct tag *tag)
__tagtable(ATAG_ACORN, parse_tag_acorn);
static struct map_desc rpc_io_desc[] __initdata = {
{ SCREEN_BASE, SCREEN_START, 2*1048576, MT_DEVICE }, /* VRAM */
{ (u32)IO_BASE, IO_START, IO_SIZE , MT_DEVICE }, /* IO space */
{ EASI_BASE, EASI_START, EASI_SIZE, MT_DEVICE } /* EASI space */
{ /* VRAM */
.virtual = SCREEN_BASE,
.pfn = __phys_to_pfn(SCREEN_START),
.length = 2*1048576,
.type = MT_DEVICE
}, { /* IO space */
.virtual = (u32)IO_BASE,
.pfn = __phys_to_pfn(IO_START),
.length = IO_SIZE ,
.type = MT_DEVICE
}, { /* EASI space */
.virtual = EASI_BASE,
.pfn = __phys_to_pfn(EASI_START),
.length = EASI_SIZE,
.type = MT_DEVICE
}
};
static void __init rpc_map_io(void)

2
arch/arm/mach-s3c2410/cpu.h
View File

@ -21,7 +21,7 @@
/* todo - fix when rmk changes iodescs to use `void __iomem *` */
#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, S3C2410_PA_##x, S3C24XX_SZ_##x, MT_DEVICE }
#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C2410_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
#ifndef MHZ
#define MHZ (1000*1000)

36
arch/arm/mach-s3c2410/devs.c
View File

@ -47,7 +47,7 @@ struct platform_device *s3c24xx_uart_devs[3];
static struct resource s3c_usb_resource[] = {
[0] = {
.start = S3C2410_PA_USBHOST,
.end = S3C2410_PA_USBHOST + S3C24XX_SZ_USBHOST,
.end = S3C2410_PA_USBHOST + S3C24XX_SZ_USBHOST - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@ -77,7 +77,7 @@ EXPORT_SYMBOL(s3c_device_usb);
static struct resource s3c_lcd_resource[] = {
[0] = {
.start = S3C2410_PA_LCD,
.end = S3C2410_PA_LCD + S3C24XX_SZ_LCD,
.end = S3C2410_PA_LCD + S3C24XX_SZ_LCD - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@ -103,21 +103,25 @@ struct platform_device s3c_device_lcd = {
EXPORT_SYMBOL(s3c_device_lcd);
static struct s3c2410fb_mach_info s3c2410fb_info;
void __init set_s3c2410fb_info(struct s3c2410fb_mach_info *hard_s3c2410fb_info)
void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
{
memcpy(&s3c2410fb_info,hard_s3c2410fb_info,sizeof(struct s3c2410fb_mach_info));
s3c_device_lcd.dev.platform_data = &s3c2410fb_info;
struct s3c2410fb_mach_info *npd;
npd = kmalloc(sizeof(*npd), GFP_KERNEL);
if (npd) {
memcpy(npd, pd, sizeof(*npd));
s3c_device_lcd.dev.platform_data = npd;
} else {
printk(KERN_ERR "no memory for LCD platform data\n");
}
}
EXPORT_SYMBOL(set_s3c2410fb_info);
/* NAND Controller */
static struct resource s3c_nand_resource[] = {
[0] = {
.start = S3C2410_PA_NAND,
.end = S3C2410_PA_NAND + S3C24XX_SZ_NAND,
.end = S3C2410_PA_NAND + S3C24XX_SZ_NAND - 1,
.flags = IORESOURCE_MEM,
}
};
@ -136,7 +140,7 @@ EXPORT_SYMBOL(s3c_device_nand);
static struct resource s3c_usbgadget_resource[] = {
[0] = {
.start = S3C2410_PA_USBDEV,
.end = S3C2410_PA_USBDEV + S3C24XX_SZ_USBDEV,
.end = S3C2410_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@ -161,7 +165,7 @@ EXPORT_SYMBOL(s3c_device_usbgadget);
static struct resource s3c_wdt_resource[] = {
[0] = {
.start = S3C2410_PA_WATCHDOG,
.end = S3C2410_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG,
.end = S3C2410_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@ -186,7 +190,7 @@ EXPORT_SYMBOL(s3c_device_wdt);
static struct resource s3c_i2c_resource[] = {
[0] = {
.start = S3C2410_PA_IIC,
.end = S3C2410_PA_IIC + S3C24XX_SZ_IIC,
.end = S3C2410_PA_IIC + S3C24XX_SZ_IIC - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@ -211,7 +215,7 @@ EXPORT_SYMBOL(s3c_device_i2c);
static struct resource s3c_iis_resource[] = {
[0] = {
.start = S3C2410_PA_IIS,
.end = S3C2410_PA_IIS + S3C24XX_SZ_IIS,
.end = S3C2410_PA_IIS + S3C24XX_SZ_IIS -1,
.flags = IORESOURCE_MEM,
}
};
@ -265,7 +269,7 @@ EXPORT_SYMBOL(s3c_device_rtc);
static struct resource s3c_adc_resource[] = {
[0] = {
.start = S3C2410_PA_ADC,
.end = S3C2410_PA_ADC + S3C24XX_SZ_ADC,
.end = S3C2410_PA_ADC + S3C24XX_SZ_ADC - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@ -288,7 +292,7 @@ struct platform_device s3c_device_adc = {
static struct resource s3c_sdi_resource[] = {
[0] = {
.start = S3C2410_PA_SDI,
.end = S3C2410_PA_SDI + S3C24XX_SZ_SDI,
.end = S3C2410_PA_SDI + S3C24XX_SZ_SDI - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
@ -465,7 +469,7 @@ EXPORT_SYMBOL(s3c_device_timer3);
static struct resource s3c_camif_resource[] = {
[0] = {
.start = S3C2440_PA_CAMIF,
.end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF,
.end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
.flags = IORESOURCE_MEM,
},
[1] = {

22
arch/arm/mach-s3c2410/gpio.c
View File

@ -30,6 +30,7 @@
* 04-Oct-2004 BJD Added irq filter controls for GPIO
* 05-Nov-2004 BJD EXPORT_SYMBOL() added for all code
* 13-Mar-2005 BJD Updates for __iomem
* 26-Oct-2005 BJD Added generic configuration types
*/
@ -58,6 +59,27 @@ void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function)
mask = 3 << S3C2410_GPIO_OFFSET(pin)*2;
}
switch (function) {
case S3C2410_GPIO_LEAVE:
mask = 0;
function = 0;
break;
case S3C2410_GPIO_INPUT:
case S3C2410_GPIO_OUTPUT:
case S3C2410_GPIO_SFN2:
case S3C2410_GPIO_SFN3:
if (pin < S3C2410_GPIO_BANKB) {
function &= 1;
function <<= S3C2410_GPIO_OFFSET(pin);
} else {
function &= 3;
function <<= S3C2410_GPIO_OFFSET(pin)*2;
}
}
/* modify the specified register wwith IRQs off */
local_irq_save(flags);
con = __raw_readl(base + 0x00);

40
arch/arm/mach-s3c2410/mach-bast.c
View File

@ -32,6 +32,7 @@
* 25-Jul-2005 BJD Removed ASIX static mappings
* 27-Jul-2005 BJD Ensure maximum frequency of i2c bus
* 20-Sep-2005 BJD Added static to non-exported items
* 26-Oct-2005 BJD Added FB platform data
*/
#include <linux/kernel.h>
@ -61,8 +62,10 @@
#include <asm/arch/regs-gpio.h>
#include <asm/arch/regs-mem.h>
#include <asm/arch/regs-lcd.h>
#include <asm/arch/nand.h>
#include <asm/arch/iic.h>
#include <asm/arch/fb.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
@ -399,6 +402,38 @@ static struct s3c2410_platform_i2c bast_i2c_info = {
.max_freq = 130*1000,
};
static struct s3c2410fb_mach_info __initdata bast_lcd_info = {
.width = 640,
.height = 480,
.xres = {
.min = 320,
.max = 1024,
.defval = 640,
},
.yres = {
.min = 240,
.max = 600,
.defval = 480,
},
.bpp = {
.min = 4,
.max = 16,
.defval = 8,
},
.regs = {
.lcdcon1 = 0x00000176,
.lcdcon2 = 0x1d77c7c2,
.lcdcon3 = 0x013a7f13,
.lcdcon4 = 0x00000057,
.lcdcon5 = 0x00014b02,
}
};
/* Standard BAST devices */
static struct platform_device *bast_devices[] __initdata = {
@ -454,6 +489,10 @@ static void __init bast_map_io(void)
usb_simtec_init();
}
static void __init bast_init(void)
{
s3c24xx_fb_set_platdata(&bast_lcd_info);
}
MACHINE_START(BAST, "Simtec-BAST")
/* Maintainer: Ben Dooks <ben@simtec.co.uk> */
@ -463,5 +502,6 @@ MACHINE_START(BAST, "Simtec-BAST")
.boot_params = S3C2410_SDRAM_PA + 0x100,
.map_io = bast_map_io,
.init_irq = s3c24xx_init_irq,
.init_machine = bast_init,
.timer = &s3c24xx_timer,
MACHINE_END

3
arch/arm/mach-s3c2410/mach-h1940.c
View File

@ -25,6 +25,7 @@
* 14-Jan-2005 BJD Added clock init
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
* 20-Sep-2005 BJD Added static to non-exported items
* 26-Oct-2005 BJD Changed name of fb init call
*/
#include <linux/kernel.h>
@ -164,7 +165,7 @@ static void __init h1940_init_irq(void)
static void __init h1940_init(void)
{
set_s3c2410fb_info(&h1940_lcdcfg);
s3c24xx_fb_set_platdata(&h1940_lcdcfg);
}
MACHINE_START(H1940, "IPAQ-H1940")

70
arch/arm/mach-s3c2410/mach-smdk2440.c
View File

@ -19,6 +19,7 @@
* 10-Mar-2005 LCVR Replaced S3C2410_VA by S3C24XX_VA
* 14-Mar-2005 BJD void __iomem fixes
* 20-Sep-2005 BJD Added static to non-exported items
* 26-Oct-2005 BJD Added framebuffer data
*/
#include <linux/kernel.h>
@ -41,7 +42,10 @@
//#include <asm/debug-ll.h>
#include <asm/arch/regs-serial.h>
#include <asm/arch/regs-gpio.h>
#include <asm/arch/regs-lcd.h>
#include <asm/arch/idle.h>
#include <asm/arch/fb.h>
#include "s3c2410.h"
#include "s3c2440.h"
@ -86,6 +90,70 @@ static struct s3c2410_uartcfg smdk2440_uartcfgs[] = {
}
};
/* LCD driver info */
static struct s3c2410fb_mach_info smdk2440_lcd_cfg __initdata = {
.regs = {
.lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
S3C2410_LCDCON1_TFT |
S3C2410_LCDCON1_CLKVAL(0x04),
.lcdcon2 = S3C2410_LCDCON2_VBPD(7) |
S3C2410_LCDCON2_LINEVAL(319) |
S3C2410_LCDCON2_VFPD(6) |
S3C2410_LCDCON2_VSPW(3),
.lcdcon3 = S3C2410_LCDCON3_HBPD(19) |
S3C2410_LCDCON3_HOZVAL(239) |
S3C2410_LCDCON3_HFPD(7),
.lcdcon4 = S3C2410_LCDCON4_MVAL(0) |
S3C2410_LCDCON4_HSPW(3),
.lcdcon5 = S3C2410_LCDCON5_FRM565 |
S3C2410_LCDCON5_INVVLINE |
S3C2410_LCDCON5_INVVFRAME |
S3C2410_LCDCON5_PWREN |
S3C2410_LCDCON5_HWSWP,
},
#if 0
/* currently setup by downloader */
.gpccon = 0xaa940659,
.gpccon_mask = 0xffffffff,
.gpcup = 0x0000ffff,
.gpcup_mask = 0xffffffff,
.gpdcon = 0xaa84aaa0,
.gpdcon_mask = 0xffffffff,
.gpdup = 0x0000faff,
.gpdup_mask = 0xffffffff,
#endif
.lpcsel = ((0xCE6) & ~7) | 1<<4,
.width = 240,
.height = 320,
.xres = {
.min = 240,
.max = 240,
.defval = 240,
},
.yres = {
.min = 320,
.max = 320,
.defval = 320,
},
.bpp = {
.min = 16,
.max = 16,
.defval = 16,
},
};
static struct platform_device *smdk2440_devices[] __initdata = {
&s3c_device_usb,
&s3c_device_lcd,
@ -121,6 +189,8 @@ static void __init smdk2440_machine_init(void)
s3c2410_gpio_setpin(S3C2410_GPF6, 0);
s3c2410_gpio_setpin(S3C2410_GPF7, 0);
s3c24xx_fb_set_platdata(&smdk2440_lcd_cfg);
s3c2410_pm_init();
}

14
arch/arm/mach-sa1100/assabet.c
View File

@ -388,9 +388,17 @@ static struct sa1100_port_fns assabet_port_fns __initdata = {
};
static struct map_desc assabet_io_desc[] __initdata = {
/* virtual physical length type */
{ 0xf1000000, 0x12000000, 0x00100000, MT_DEVICE }, /* Board Control Register */
{ 0xf2800000, 0x4b800000, 0x00800000, MT_DEVICE } /* MQ200 */
{ /* Board Control Register */
.virtual = 0xf1000000,
.pfn = __phys_to_pfn(0x12000000),
.length = 0x00100000,
.type = MT_DEVICE
}, { /* MQ200 */
.virtual = 0xf2800000,
.pfn = __phys_to_pfn(0x4b800000),
.length = 0x00800000,
.type = MT_DEVICE
}
};
static void __init assabet_map_io(void)

20
arch/arm/mach-sa1100/badge4.c
View File

@ -254,10 +254,22 @@ EXPORT_SYMBOL(badge4_set_5V);
static struct map_desc badge4_io_desc[] __initdata = {
/* virtual physical length type */
{0xf1000000, 0x08000000, 0x00100000, MT_DEVICE },/* SRAM bank 1 */
{0xf2000000, 0x10000000, 0x00100000, MT_DEVICE },/* SRAM bank 2 */
{0xf4000000, 0x48000000, 0x00100000, MT_DEVICE } /* SA-1111 */
{ /* SRAM bank 1 */
.virtual = 0xf1000000,
.pfn = __phys_to_pfn(0x08000000),
.length = 0x00100000,
.type = MT_DEVICE
}, { /* SRAM bank 2 */
.virtual = 0xf2000000,
.pfn = __phys_to_pfn(0x10000000),
.length = 0x00100000,
.type = MT_DEVICE
}, { /* SA-1111 */
.virtual = 0xf4000000,
.pfn = __phys_to_pfn(0x48000000),
.length = 0x00100000,
.type = MT_DEVICE
}
};
static void

8
arch/arm/mach-sa1100/cerf.c
View File

@ -100,8 +100,12 @@ static void __init cerf_init_irq(void)
}
static struct map_desc cerf_io_desc[] __initdata = {
/* virtual physical length type */
{ 0xf0000000, 0x08000000, 0x00100000, MT_DEVICE } /* Crystal Ethernet Chip */
{ /* Crystal Ethernet Chip */
.virtual = 0xf0000000,
.pfn = __phys_to_pfn(0x08000000),
.length = 0x00100000,
.type = MT_DEVICE
}
};
static void __init cerf_map_io(void)

14
arch/arm/mach-sa1100/collie.c
View File

@ -171,9 +171,17 @@ static void __init collie_init(void)
}
static struct map_desc collie_io_desc[] __initdata = {
/* virtual physical length type */
{0xe8000000, 0x00000000, 0x02000000, MT_DEVICE}, /* 32M main flash (cs0) */
{0xea000000, 0x08000000, 0x02000000, MT_DEVICE}, /* 32M boot flash (cs1) */
{ /* 32M main flash (cs0) */
.virtual = 0xe8000000,
.pfn = __phys_to_pfn(0x00000000),
.length = 0x02000000,
.type = MT_DEVICE
}, { /* 32M boot flash (cs1) */
.virtual = 0xea000000,
.pfn = __phys_to_pfn(0x08000000),
.length = 0x02000000,
.type = MT_DEVICE
}
};
static void __init collie_map_io(void)

26
arch/arm/mach-sa1100/generic.c
View File

@ -369,11 +369,27 @@ EXPORT_SYMBOL(sa1100fb_lcd_power);
*/
static struct map_desc standard_io_desc[] __initdata = {
/* virtual physical length type */
{ 0xf8000000, 0x80000000, 0x00100000, MT_DEVICE }, /* PCM */
{ 0xfa000000, 0x90000000, 0x00100000, MT_DEVICE }, /* SCM */
{ 0xfc000000, 0xa0000000, 0x00100000, MT_DEVICE }, /* MER */
{ 0xfe000000, 0xb0000000, 0x00200000, MT_DEVICE } /* LCD + DMA */
{ /* PCM */
.virtual = 0xf8000000,
.pfn = __phys_to_pfn(0x80000000),
.length = 0x00100000,
.type = MT_DEVICE
}, { /* SCM */
.virtual = 0xfa000000,
.pfn = __phys_to_pfn(0x90000000),
.length = 0x00100000,
.type = MT_DEVICE
}, { /* MER */
.virtual = 0xfc000000,
.pfn = __phys_to_pfn(0xa0000000),
.length = 0x00100000,
.type = MT_DEVICE
}, { /* LCD + DMA */
.virtual = 0xfe000000,
.pfn = __phys_to_pfn(0xb0000000),
.length = 0x00200000,
.type = MT_DEVICE
},
};
void __init sa1100_map_io(void)

20
arch/arm/mach-sa1100/h3600.c
View File

@ -223,10 +223,22 @@ static void h3xxx_lcd_power(int enable)
}
static struct map_desc h3600_io_desc[] __initdata = {
/* virtual physical length type */
{ H3600_BANK_2_VIRT, SA1100_CS2_PHYS, 0x02800000, MT_DEVICE }, /* static memory bank 2 CS#2 */
{ H3600_BANK_4_VIRT, SA1100_CS4_PHYS, 0x00800000, MT_DEVICE }, /* static memory bank 4 CS#4 */
{ H3600_EGPIO_VIRT, H3600_EGPIO_PHYS, 0x01000000, MT_DEVICE }, /* EGPIO 0 CS#5 */
{ /* static memory bank 2 CS#2 */
.virtual = H3600_BANK_2_VIRT,
.pfn = __phys_to_pfn(SA1100_CS2_PHYS),
.length = 0x02800000,
.type = MT_DEVICE
}, { /* static memory bank 4 CS#4 */
.virtual = H3600_BANK_4_VIRT,
.pfn = __phys_to_pfn(SA1100_CS4_PHYS),
.length = 0x00800000,
.type = MT_DEVICE
}, { /* EGPIO 0 CS#5 */
.virtual = H3600_EGPIO_VIRT,
.pfn = __phys_to_pfn(H3600_EGPIO_PHYS),
.length = 0x01000000,
.type = MT_DEVICE
}
};
/*

8
arch/arm/mach-sa1100/hackkit.c
View File

@ -57,8 +57,12 @@ static void hackkit_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
*/
static struct map_desc hackkit_io_desc[] __initdata = {
/* virtual physical length type */
{ 0xe8000000, 0x00000000, 0x01000000, MT_DEVICE } /* Flash bank 0 */
{ /* Flash bank 0 */
.virtual = 0xe8000000,
.pfn = __phys_to_pfn(0x00000000),
.length = 0x01000000,
.type = MT_DEVICE
},
};
static struct sa1100_port_fns hackkit_port_fns __initdata = {

20
arch/arm/mach-sa1100/jornada720.c
View File

@ -81,10 +81,22 @@ static int __init jornada720_init(void)
arch_initcall(jornada720_init);
static struct map_desc jornada720_io_desc[] __initdata = {
/* virtual physical length type */
{ 0xf0000000, 0x48000000, 0x00100000, MT_DEVICE }, /* Epson registers */
{ 0xf1000000, 0x48200000, 0x00100000, MT_DEVICE }, /* Epson frame buffer */
{ 0xf4000000, 0x40000000, 0x00100000, MT_DEVICE } /* SA-1111 */
{ /* Epson registers */
.virtual = 0xf0000000,
.pfn = __phys_to_pfn(0x48000000),
.length = 0x00100000,
.type = MT_DEVICE
}, { /* Epson frame buffer */
.virtual = 0xf1000000,
.pfn = __phys_to_pfn(0x48200000),
.length = 0x00100000,
.type = MT_DEVICE
}, { /* SA-1111 */
.virtual = 0xf4000000,
.pfn = __phys_to_pfn(0x40000000),
.length = 0x00100000,
.type = MT_DEVICE
}
};
static void __init jornada720_map_io(void)

14
arch/arm/mach-sa1100/lart.c
View File

@ -31,9 +31,17 @@ static void __init lart_init(void)
}
static struct map_desc lart_io_desc[] __initdata = {
/* virtual physical length type */
{ 0xe8000000, 0x00000000, 0x00400000, MT_DEVICE }, /* main flash memory */
{ 0xec000000, 0x08000000, 0x00400000, MT_DEVICE } /* main flash, alternative location */
{ /* main flash memory */
.virtual = 0xe8000000,
.pfn = __phys_to_pfn(0x00000000),
.length = 0x00400000,
.type = MT_DEVICE
}, { /* main flash, alternative location */
.virtual = 0xec000000,
.pfn = __phys_to_pfn(0x08000000),
.length = 0x00400000,
.type = MT_DEVICE
}
};
static void __init lart_map_io(void)

42
arch/arm/mach-sa1100/neponset.c
View File

@ -178,33 +178,27 @@ static int neponset_probe(struct device *dev)
/*
* LDM power management.
*/
static int neponset_suspend(struct device *dev, pm_message_t state, u32 level)
static int neponset_suspend(struct device *dev, pm_message_t state)
{
/*
* Save state.
*/
if (level == SUSPEND_SAVE_STATE ||
level == SUSPEND_DISABLE ||
level == SUSPEND_POWER_DOWN) {
if (!dev->power.saved_state)
dev->power.saved_state = kmalloc(sizeof(unsigned int), GFP_KERNEL);
if (!dev->power.saved_state)
return -ENOMEM;
if (!dev->power.saved_state)
dev->power.saved_state = kmalloc(sizeof(unsigned int), GFP_KERNEL);
if (!dev->power.saved_state)
return -ENOMEM;
*(unsigned int *)dev->power.saved_state = NCR_0;
}
*(unsigned int *)dev->power.saved_state = NCR_0;
return 0;
}
static int neponset_resume(struct device *dev, u32 level)
static int neponset_resume(struct device *dev)
{
if (level == RESUME_RESTORE_STATE || level == RESUME_ENABLE) {
if (dev->power.saved_state) {
NCR_0 = *(unsigned int *)dev->power.saved_state;
kfree(dev->power.saved_state);
dev->power.saved_state = NULL;
}
if (dev->power.saved_state) {
NCR_0 = *(unsigned int *)dev->power.saved_state;
kfree(dev->power.saved_state);
dev->power.saved_state = NULL;
}
return 0;
@ -331,9 +325,17 @@ static int __init neponset_init(void)
subsys_initcall(neponset_init);
static struct map_desc neponset_io_desc[] __initdata = {
/* virtual physical length type */
{ 0xf3000000, 0x10000000, SZ_1M, MT_DEVICE }, /* System Registers */
{ 0xf4000000, 0x40000000, SZ_1M, MT_DEVICE } /* SA-1111 */
{ /* System Registers */
.virtual = 0xf3000000,
.pfn = __phys_to_pfn(0x10000000),
.length = SZ_1M,
.type = MT_DEVICE
}, { /* SA-1111 */
.virtual = 0xf4000000,
.pfn = __phys_to_pfn(0x40000000),
.length = SZ_1M,
.type = MT_DEVICE
}
};
void __init neponset_map_io(void)

16
arch/arm/mach-sa1100/simpad.c
View File

@ -60,11 +60,17 @@ EXPORT_SYMBOL(set_cs3_bit);
EXPORT_SYMBOL(clear_cs3_bit);
static struct map_desc simpad_io_desc[] __initdata = {
/* virtual physical length type */
/* MQ200 */
{ 0xf2800000, 0x4b800000, 0x00800000, MT_DEVICE },
/* Paules CS3, write only */
{ 0xf1000000, 0x18000000, 0x00100000, MT_DEVICE },
{ /* MQ200 */
.virtual = 0xf2800000,
.pfn = __phys_to_pfn(0x4b800000),
.length = 0x00800000,
.type = MT_DEVICE
}, { /* Paules CS3, write only */
.virtual = 0xf1000000,
.pfn = __phys_to_pfn(0x18000000),
.length = 0x00100000,
.type = MT_DEVICE
},
};

7
arch/arm/mach-shark/core.c
View File

@ -62,7 +62,12 @@ arch_initcall(shark_init);
extern void shark_init_irq(void);
static struct map_desc shark_io_desc[] __initdata = {
{ IO_BASE , IO_START , IO_SIZE , MT_DEVICE }
{
.virtual = IO_BASE,
.pfn = __phys_to_pfn(IO_START),
.length = IO_SIZE,
.type = MT_DEVICE
}
};
static void __init shark_map_io(void)

83
arch/arm/mach-versatile/core.c
View File

@ -186,25 +186,82 @@ void __init versatile_init_irq(void)
}
static struct map_desc versatile_io_desc[] __initdata = {
{ IO_ADDRESS(VERSATILE_SYS_BASE), VERSATILE_SYS_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(VERSATILE_SIC_BASE), VERSATILE_SIC_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(VERSATILE_VIC_BASE), VERSATILE_VIC_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(VERSATILE_SCTL_BASE), VERSATILE_SCTL_BASE, SZ_4K * 9, MT_DEVICE },
{
.virtual = IO_ADDRESS(VERSATILE_SYS_BASE),
.pfn = __phys_to_pfn(VERSATILE_SYS_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(VERSATILE_SIC_BASE),
.pfn = __phys_to_pfn(VERSATILE_SIC_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(VERSATILE_VIC_BASE),
.pfn = __phys_to_pfn(VERSATILE_VIC_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(VERSATILE_SCTL_BASE),
.pfn = __phys_to_pfn(VERSATILE_SCTL_BASE),
.length = SZ_4K * 9,
.type = MT_DEVICE
},
#ifdef CONFIG_MACH_VERSATILE_AB
{ IO_ADDRESS(VERSATILE_GPIO0_BASE), VERSATILE_GPIO0_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(VERSATILE_IB2_BASE), VERSATILE_IB2_BASE, SZ_64M, MT_DEVICE },
{
.virtual = IO_ADDRESS(VERSATILE_GPIO0_BASE),
.pfn = __phys_to_pfn(VERSATILE_GPIO0_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = IO_ADDRESS(VERSATILE_IB2_BASE),
.pfn = __phys_to_pfn(VERSATILE_IB2_BASE),
.length = SZ_64M,
.type = MT_DEVICE
},
#endif
#ifdef CONFIG_DEBUG_LL
{ IO_ADDRESS(VERSATILE_UART0_BASE), VERSATILE_UART0_BASE, SZ_4K, MT_DEVICE },
{
.virtual = IO_ADDRESS(VERSATILE_UART0_BASE),
.pfn = __phys_to_pfn(VERSATILE_UART0_BASE),
.length = SZ_4K,
.type = MT_DEVICE
},
#endif
#ifdef CONFIG_PCI
{ IO_ADDRESS(VERSATILE_PCI_CORE_BASE), VERSATILE_PCI_CORE_BASE, SZ_4K, MT_DEVICE },
{ VERSATILE_PCI_VIRT_BASE, VERSATILE_PCI_BASE, VERSATILE_PCI_BASE_SIZE, MT_DEVICE },
{ VERSATILE_PCI_CFG_VIRT_BASE, VERSATILE_PCI_CFG_BASE, VERSATILE_PCI_CFG_BASE_SIZE, MT_DEVICE },
{
.virtual = IO_ADDRESS(VERSATILE_PCI_CORE_BASE),
.pfn = __phys_to_pfn(VERSATILE_PCI_CORE_BASE),
.length = SZ_4K,
.type = MT_DEVICE
}, {
.virtual = VERSATILE_PCI_VIRT_BASE,
.pfn = __phys_to_pfn(VERSATILE_PCI_BASE),
.length = VERSATILE_PCI_BASE_SIZE,
.type = MT_DEVICE
}, {
.virtual = VERSATILE_PCI_CFG_VIRT_BASE,
.pfn = __phys_to_pfn(VERSATILE_PCI_CFG_BASE),
.length = VERSATILE_PCI_CFG_BASE_SIZE,
.type = MT_DEVICE
},
#if 0
{ VERSATILE_PCI_VIRT_MEM_BASE0, VERSATILE_PCI_MEM_BASE0, SZ_16M, MT_DEVICE },
{ VERSATILE_PCI_VIRT_MEM_BASE1, VERSATILE_PCI_MEM_BASE1, SZ_16M, MT_DEVICE },
{ VERSATILE_PCI_VIRT_MEM_BASE2, VERSATILE_PCI_MEM_BASE2, SZ_16M, MT_DEVICE },
{
.virtual = VERSATILE_PCI_VIRT_MEM_BASE0,
.pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE0),
.length = SZ_16M,
.type = MT_DEVICE
}, {
.virtual = VERSATILE_PCI_VIRT_MEM_BASE1,
.pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE1),
.length = SZ_16M,
.type = MT_DEVICE
}, {
.virtual = VERSATILE_PCI_VIRT_MEM_BASE2,
.pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE2),
.length = SZ_16M,
.type = MT_DEVICE
},
#endif
#endif
};

508
arch/arm/mm/init.c
View File

@ -1,7 +1,7 @@
/*
* linux/arch/arm/mm/init.c
*
* Copyright (C) 1995-2002 Russell King
* Copyright (C) 1995-2005 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@ -86,14 +86,19 @@ void show_mem(void)
printk("%d pages swap cached\n", cached);
}
struct node_info {
unsigned int start;
unsigned int end;
int bootmap_pages;
};
static inline pmd_t *pmd_off(pgd_t *pgd, unsigned long virt)
{
return pmd_offset(pgd, virt);
}
#define O_PFN_DOWN(x) ((x) >> PAGE_SHIFT)
#define O_PFN_UP(x) (PAGE_ALIGN(x) >> PAGE_SHIFT)
static inline pmd_t *pmd_off_k(unsigned long virt)
{
return pmd_off(pgd_offset_k(virt), virt);
}
#define for_each_nodebank(iter,mi,no) \
for (iter = 0; iter < mi->nr_banks; iter++) \
if (mi->bank[iter].node == no)
/*
* FIXME: We really want to avoid allocating the bootmap bitmap
@ -106,15 +111,12 @@ find_bootmap_pfn(int node, struct meminfo *mi, unsigned int bootmap_pages)
{
unsigned int start_pfn, bank, bootmap_pfn;
start_pfn = O_PFN_UP(__pa(&_end));
start_pfn = PAGE_ALIGN(__pa(&_end)) >> PAGE_SHIFT;
bootmap_pfn = 0;
for (bank = 0; bank < mi->nr_banks; bank ++) {
for_each_nodebank(bank, mi, node) {
unsigned int start, end;
if (mi->bank[bank].node != node)
continue;
start = mi->bank[bank].start >> PAGE_SHIFT;
end = (mi->bank[bank].size +
mi->bank[bank].start) >> PAGE_SHIFT;
@ -140,92 +142,6 @@ find_bootmap_pfn(int node, struct meminfo *mi, unsigned int bootmap_pages)
return bootmap_pfn;
}
/*
* Scan the memory info structure and pull out:
* - the end of memory
* - the number of nodes
* - the pfn range of each node
* - the number of bootmem bitmap pages
*/
static unsigned int __init
find_memend_and_nodes(struct meminfo *mi, struct node_info *np)
{
unsigned int i, bootmem_pages = 0, memend_pfn = 0;
for (i = 0; i < MAX_NUMNODES; i++) {
np[i].start = -1U;
np[i].end = 0;
np[i].bootmap_pages = 0;
}
for (i = 0; i < mi->nr_banks; i++) {
unsigned long start, end;
int node;
if (mi->bank[i].size == 0) {
/*
* Mark this bank with an invalid node number
*/
mi->bank[i].node = -1;
continue;
}
node = mi->bank[i].node;
/*
* Make sure we haven't exceeded the maximum number of nodes
* that we have in this configuration. If we have, we're in
* trouble. (maybe we ought to limit, instead of bugging?)
*/
if (node >= MAX_NUMNODES)
BUG();
node_set_online(node);
/*
* Get the start and end pfns for this bank
*/
start = mi->bank[i].start >> PAGE_SHIFT;
end = (mi->bank[i].start + mi->bank[i].size) >> PAGE_SHIFT;
if (np[node].start > start)
np[node].start = start;
if (np[node].end < end)
np[node].end = end;
if (memend_pfn < end)
memend_pfn = end;
}
/*
* Calculate the number of pages we require to
* store the bootmem bitmaps.
*/
for_each_online_node(i) {
if (np[i].end == 0)
continue;
np[i].bootmap_pages = bootmem_bootmap_pages(np[i].end -
np[i].start);
bootmem_pages += np[i].bootmap_pages;
}
high_memory = __va(memend_pfn << PAGE_SHIFT);
/*
* This doesn't seem to be used by the Linux memory
* manager any more. If we can get rid of it, we
* also get rid of some of the stuff above as well.
*
* Note: max_low_pfn and max_pfn reflect the number
* of _pages_ in the system, not the maximum PFN.
*/
max_low_pfn = memend_pfn - O_PFN_DOWN(PHYS_OFFSET);
max_pfn = memend_pfn - O_PFN_DOWN(PHYS_OFFSET);
return bootmem_pages;
}
static int __init check_initrd(struct meminfo *mi)
{
int initrd_node = -2;
@ -266,9 +182,8 @@ static int __init check_initrd(struct meminfo *mi)
/*
* Reserve the various regions of node 0
*/
static __init void reserve_node_zero(unsigned int bootmap_pfn, unsigned int bootmap_pages)
static __init void reserve_node_zero(pg_data_t *pgdat)
{
pg_data_t *pgdat = NODE_DATA(0);
unsigned long res_size = 0;
/*
@ -288,13 +203,6 @@ static __init void reserve_node_zero(unsigned int bootmap_pfn, unsigned int boot
reserve_bootmem_node(pgdat, __pa(swapper_pg_dir),
PTRS_PER_PGD * sizeof(pgd_t));
/*
* And don't forget to reserve the allocator bitmap,
* which will be freed later.
*/
reserve_bootmem_node(pgdat, bootmap_pfn << PAGE_SHIFT,
bootmap_pages << PAGE_SHIFT);
/*
* Hmm... This should go elsewhere, but we really really need to
* stop things allocating the low memory; ideally we need a better
@ -324,93 +232,256 @@ static __init void reserve_node_zero(unsigned int bootmap_pfn, unsigned int boot
reserve_bootmem_node(pgdat, PHYS_OFFSET, res_size);
}
/*
* Register all available RAM in this node with the bootmem allocator.
*/
static inline void free_bootmem_node_bank(int node, struct meminfo *mi)
void __init build_mem_type_table(void);
void __init create_mapping(struct map_desc *md);
static unsigned long __init
bootmem_init_node(int node, int initrd_node, struct meminfo *mi)
{
pg_data_t *pgdat = NODE_DATA(node);
int bank;
unsigned long zone_size[MAX_NR_ZONES], zhole_size[MAX_NR_ZONES];
unsigned long start_pfn, end_pfn, boot_pfn;
unsigned int boot_pages;
pg_data_t *pgdat;
int i;
for (bank = 0; bank < mi->nr_banks; bank++)
if (mi->bank[bank].node == node)
free_bootmem_node(pgdat, mi->bank[bank].start,
mi->bank[bank].size);
}
/*
* Initialise the bootmem allocator for all nodes. This is called
* early during the architecture specific initialisation.
*/
static void __init bootmem_init(struct meminfo *mi)
{
struct node_info node_info[MAX_NUMNODES], *np = node_info;
unsigned int bootmap_pages, bootmap_pfn, map_pg;
int node, initrd_node;
bootmap_pages = find_memend_and_nodes(mi, np);
bootmap_pfn = find_bootmap_pfn(0, mi, bootmap_pages);
initrd_node = check_initrd(mi);
map_pg = bootmap_pfn;
start_pfn = -1UL;
end_pfn = 0;
/*
* Initialise the bootmem nodes.
*
* What we really want to do is:
*
* unmap_all_regions_except_kernel();
* for_each_node_in_reverse_order(node) {
* map_node(node);
* allocate_bootmem_map(node);
* init_bootmem_node(node);
* free_bootmem_node(node);
* }
*
* but this is a 2.5-type change. For now, we just set
* the nodes up in reverse order.
*
* (we could also do with rolling bootmem_init and paging_init
* into one generic "memory_init" type function).
* Calculate the pfn range, and map the memory banks for this node.
*/
np += num_online_nodes() - 1;
for (node = num_online_nodes() - 1; node >= 0; node--, np--) {
/*
* If there are no pages in this node, ignore it.
* Note that node 0 must always have some pages.
*/
if (np->end == 0 || !node_online(node)) {
if (node == 0)
BUG();
continue;
}
for_each_nodebank(i, mi, node) {
unsigned long start, end;
struct map_desc map;
/*
* Initialise the bootmem allocator.
*/
init_bootmem_node(NODE_DATA(node), map_pg, np->start, np->end);
free_bootmem_node_bank(node, mi);
map_pg += np->bootmap_pages;
start = mi->bank[i].start >> PAGE_SHIFT;
end = (mi->bank[i].start + mi->bank[i].size) >> PAGE_SHIFT;
/*
* If this is node 0, we need to reserve some areas ASAP -
* we may use bootmem on node 0 to setup the other nodes.
*/
if (node == 0)
reserve_node_zero(bootmap_pfn, bootmap_pages);
if (start_pfn > start)
start_pfn = start;
if (end_pfn < end)
end_pfn = end;
map.pfn = __phys_to_pfn(mi->bank[i].start);
map.virtual = __phys_to_virt(mi->bank[i].start);
map.length = mi->bank[i].size;
map.type = MT_MEMORY;
create_mapping(&map);
}
/*
* If there is no memory in this node, ignore it.
*/
if (end_pfn == 0)
return end_pfn;
/*
* Allocate the bootmem bitmap page.
*/
boot_pages = bootmem_bootmap_pages(end_pfn - start_pfn);
boot_pfn = find_bootmap_pfn(node, mi, boot_pages);
/*
* Initialise the bootmem allocator for this node, handing the
* memory banks over to bootmem.
*/
node_set_online(node);
pgdat = NODE_DATA(node);
init_bootmem_node(pgdat, boot_pfn, start_pfn, end_pfn);
for_each_nodebank(i, mi, node)
free_bootmem_node(pgdat, mi->bank[i].start, mi->bank[i].size);
/*
* Reserve the bootmem bitmap for this node.
*/
reserve_bootmem_node(pgdat, boot_pfn << PAGE_SHIFT,
boot_pages << PAGE_SHIFT);
#ifdef CONFIG_BLK_DEV_INITRD
if (phys_initrd_size && initrd_node >= 0) {
reserve_bootmem_node(NODE_DATA(initrd_node), phys_initrd_start,
/*
* If the initrd is in this node, reserve its memory.
*/
if (node == initrd_node) {
reserve_bootmem_node(pgdat, phys_initrd_start,
phys_initrd_size);
initrd_start = __phys_to_virt(phys_initrd_start);
initrd_end = initrd_start + phys_initrd_size;
}
#endif
BUG_ON(map_pg != bootmap_pfn + bootmap_pages);
/*
* Finally, reserve any node zero regions.
*/
if (node == 0)
reserve_node_zero(pgdat);
/*
* initialise the zones within this node.
*/
memset(zone_size, 0, sizeof(zone_size));
memset(zhole_size, 0, sizeof(zhole_size));
/*
* The size of this node has already been determined. If we need
* to do anything fancy with the allocation of this memory to the
* zones, now is the time to do it.
*/
zone_size[0] = end_pfn - start_pfn;
/*
* For each bank in this node, calculate the size of the holes.
* holes = node_size - sum(bank_sizes_in_node)
*/
zhole_size[0] = zone_size[0];
for_each_nodebank(i, mi, node)
zhole_size[0] -= mi->bank[i].size >> PAGE_SHIFT;
/*
* Adjust the sizes according to any special requirements for
* this machine type.
*/
arch_adjust_zones(node, zone_size, zhole_size);
free_area_init_node(node, pgdat, zone_size, start_pfn, zhole_size);
return end_pfn;
}
static void __init bootmem_init(struct meminfo *mi)
{
unsigned long addr, memend_pfn = 0;
int node, initrd_node, i;
/*
* Invalidate the node number for empty or invalid memory banks
*/
for (i = 0; i < mi->nr_banks; i++)
if (mi->bank[i].size == 0 || mi->bank[i].node >= MAX_NUMNODES)
mi->bank[i].node = -1;
memcpy(&meminfo, mi, sizeof(meminfo));
#ifdef CONFIG_XIP_KERNEL
#error needs fixing
p->pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & PMD_MASK);
p->virtual = (unsigned long)&_stext & PMD_MASK;
p->length = ((unsigned long)&_etext - p->virtual + ~PMD_MASK) & PMD_MASK;
p->type = MT_ROM;
p ++;
#endif
/*
* Clear out all the mappings below the kernel image.
* FIXME: what about XIP?
*/
for (addr = 0; addr < PAGE_OFFSET; addr += PGDIR_SIZE)
pmd_clear(pmd_off_k(addr));
/*
* Clear out all the kernel space mappings, except for the first
* memory bank, up to the end of the vmalloc region.
*/
for (addr = __phys_to_virt(mi->bank[0].start + mi->bank[0].size);
addr < VMALLOC_END; addr += PGDIR_SIZE)
pmd_clear(pmd_off_k(addr));
/*
* Locate which node contains the ramdisk image, if any.
*/
initrd_node = check_initrd(mi);
/*
* Run through each node initialising the bootmem allocator.
*/
for_each_node(node) {
unsigned long end_pfn;
end_pfn = bootmem_init_node(node, initrd_node, mi);
/*
* Remember the highest memory PFN.
*/
if (end_pfn > memend_pfn)
memend_pfn = end_pfn;
}
high_memory = __va(memend_pfn << PAGE_SHIFT);
/*
* This doesn't seem to be used by the Linux memory manager any
* more, but is used by ll_rw_block. If we can get rid of it, we
* also get rid of some of the stuff above as well.
*
* Note: max_low_pfn and max_pfn reflect the number of _pages_ in
* the system, not the maximum PFN.
*/
max_pfn = max_low_pfn = memend_pfn - PHYS_PFN_OFFSET;
}
/*
* Set up device the mappings. Since we clear out the page tables for all
* mappings above VMALLOC_END, we will remove any debug device mappings.
* This means you have to be careful how you debug this function, or any
* called function. (Do it by code inspection!)
*/
static void __init devicemaps_init(struct machine_desc *mdesc)
{
struct map_desc map;
unsigned long addr;
void *vectors;
for (addr = VMALLOC_END; addr; addr += PGDIR_SIZE)
pmd_clear(pmd_off_k(addr));
/*
* Map the cache flushing regions.
*/
#ifdef FLUSH_BASE
map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS);
map.virtual = FLUSH_BASE;
map.length = PGDIR_SIZE;
map.type = MT_CACHECLEAN;
create_mapping(&map);
#endif
#ifdef FLUSH_BASE_MINICACHE
map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS + PGDIR_SIZE);
map.virtual = FLUSH_BASE_MINICACHE;
map.length = PGDIR_SIZE;
map.type = MT_MINICLEAN;
create_mapping(&map);
#endif
flush_cache_all();
local_flush_tlb_all();
vectors = alloc_bootmem_low_pages(PAGE_SIZE);
BUG_ON(!vectors);
/*
* Create a mapping for the machine vectors at the high-vectors
* location (0xffff0000). If we aren't using high-vectors, also
* create a mapping at the low-vectors virtual address.
*/
map.pfn = __phys_to_pfn(virt_to_phys(vectors));
map.virtual = 0xffff0000;
map.length = PAGE_SIZE;
map.type = MT_HIGH_VECTORS;
create_mapping(&map);
if (!vectors_high()) {
map.virtual = 0;
map.type = MT_LOW_VECTORS;
create_mapping(&map);
}
/*
* Ask the machine support to map in the statically mapped devices.
* After this point, we can start to touch devices again.
*/
if (mdesc->map_io)
mdesc->map_io();
}
/*
@ -420,87 +491,17 @@ static void __init bootmem_init(struct meminfo *mi)
void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc)
{
void *zero_page;
int node;
build_mem_type_table();
bootmem_init(mi);
devicemaps_init(mdesc);
memcpy(&meminfo, mi, sizeof(meminfo));
top_pmd = pmd_off_k(0xffff0000);
/*
* allocate the zero page. Note that we count on this going ok.
*/
zero_page = alloc_bootmem_low_pages(PAGE_SIZE);
/*
* initialise the page tables.
*/
memtable_init(mi);
if (mdesc->map_io)
mdesc->map_io();
local_flush_tlb_all();
/*
* initialise the zones within each node
*/
for_each_online_node(node) {
unsigned long zone_size[MAX_NR_ZONES];
unsigned long zhole_size[MAX_NR_ZONES];
struct bootmem_data *bdata;
pg_data_t *pgdat;
int i;
/*
* Initialise the zone size information.
*/
for (i = 0; i < MAX_NR_ZONES; i++) {
zone_size[i] = 0;
zhole_size[i] = 0;
}
pgdat = NODE_DATA(node);
bdata = pgdat->bdata;
/*
* The size of this node has already been determined.
* If we need to do anything fancy with the allocation
* of this memory to the zones, now is the time to do
* it.
*/
zone_size[0] = bdata->node_low_pfn -
(bdata->node_boot_start >> PAGE_SHIFT);
/*
* If this zone has zero size, skip it.
*/
if (!zone_size[0])
continue;
/*
* For each bank in this node, calculate the size of the
* holes. holes = node_size - sum(bank_sizes_in_node)
*/
zhole_size[0] = zone_size[0];
for (i = 0; i < mi->nr_banks; i++) {
if (mi->bank[i].node != node)
continue;
zhole_size[0] -= mi->bank[i].size >> PAGE_SHIFT;
}
/*
* Adjust the sizes according to any special
* requirements for this machine type.
*/
arch_adjust_zones(node, zone_size, zhole_size);
free_area_init_node(node, pgdat, zone_size,
bdata->node_boot_start >> PAGE_SHIFT, zhole_size);
}
/*
* finish off the bad pages once
* the mem_map is initialised
*/
memzero(zero_page, PAGE_SIZE);
empty_zero_page = virt_to_page(zero_page);
flush_dcache_page(empty_zero_page);
@ -562,10 +563,7 @@ static void __init free_unused_memmap_node(int node, struct meminfo *mi)
* may not be the case, especially if the user has provided the
* information on the command line.
*/
for (i = 0; i < mi->nr_banks; i++) {
if (mi->bank[i].size == 0 || mi->bank[i].node != node)
continue;
for_each_nodebank(i, mi, node) {
bank_start = mi->bank[i].start >> PAGE_SHIFT;
if (bank_start < prev_bank_end) {
printk(KERN_ERR "MEM: unordered memory banks. "

1
arch/arm/mm/ioremap.c
View File

@ -26,6 +26,7 @@
#include <linux/vmalloc.h>
#include <asm/cacheflush.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/tlbflush.h>

Some files were not shown because too many files have changed in this diff Show More