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mtd: spi-nor: micron-st: sort flash_info database

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The flash ID is the new primary key into our database. Sort the entry by
it. Keep the most specific ones first, because there might be ID
collisions between shorter and longer ones.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-36-e60548861b10@kernel.org
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
This commit is contained in:
Michael Walle 2023-09-08 12:16:54 +02:00 committed by Tudor Ambarus
parent b0eea634d0
commit 9df3c9ac6e
No known key found for this signature in database
GPG Key ID: 4B554F47A58D14E9
1 changed files with 174 additions and 174 deletions
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348
drivers/mtd/spi-nor/micron-st.c
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@ -182,133 +182,35 @@ static const struct flash_info micron_nor_parts[] = {
static const struct flash_info st_nor_parts[] = {
{
.id = SNOR_ID(0x20, 0xbb, 0x15),
.name = "n25q016a",
.name = "m25p05-nonjedec",
.sector_size = SZ_32K,
.size = SZ_64K,
}, {
.name = "m25p10-nonjedec",
.sector_size = SZ_32K,
.size = SZ_128K,
}, {
.name = "m25p20-nonjedec",
.size = SZ_256K,
}, {
.name = "m25p40-nonjedec",
.size = SZ_512K,
}, {
.name = "m25p80-nonjedec",
.size = SZ_1M,
}, {
.name = "m25p16-nonjedec",
.size = SZ_2M,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
}, {
.id = SNOR_ID(0x20, 0xba, 0x16),
.name = "n25q032",
.name = "m25p32-nonjedec",
.size = SZ_4M,
.no_sfdp_flags = SPI_NOR_QUAD_READ,
}, {
.id = SNOR_ID(0x20, 0xbb, 0x16),
.name = "n25q032a",
.size = SZ_4M,
.no_sfdp_flags = SPI_NOR_QUAD_READ,
}, {
.id = SNOR_ID(0x20, 0xba, 0x17),
.name = "n25q064",
.name = "m25p64-nonjedec",
.size = SZ_8M,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
}, {
.id = SNOR_ID(0x20, 0xbb, 0x17),
.name = "n25q064a",
.size = SZ_8M,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
}, {
.id = SNOR_ID(0x20, 0xbb, 0x18),
.name = "n25q128a11",
.name = "m25p128-nonjedec",
.sector_size = SZ_256K,
.size = SZ_16M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
SPI_NOR_BP3_SR_BIT6,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xba, 0x18),
.name = "n25q128a13",
.size = SZ_16M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
SPI_NOR_BP3_SR_BIT6,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xba, 0x19, 0x10, 0x44, 0x00),
.name = "mt25ql256a",
.size = SZ_32M,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.fixup_flags = SPI_NOR_4B_OPCODES,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xba, 0x19),
.name = "n25q256a",
.size = SZ_32M,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xbb, 0x19, 0x10, 0x44, 0x00),
.name = "mt25qu256a",
.size = SZ_32M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
SPI_NOR_BP3_SR_BIT6,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.fixup_flags = SPI_NOR_4B_OPCODES,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xbb, 0x19),
.name = "n25q256ax1",
.size = SZ_32M,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xba, 0x20, 0x10, 0x44, 0x00),
.name = "mt25ql512a",
.size = SZ_64M,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.fixup_flags = SPI_NOR_4B_OPCODES,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xba, 0x20),
.name = "n25q512ax3",
.size = SZ_64M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
SPI_NOR_BP3_SR_BIT6,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xbb, 0x20, 0x10, 0x44, 0x00),
.name = "mt25qu512a",
.size = SZ_64M,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.fixup_flags = SPI_NOR_4B_OPCODES,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xbb, 0x20),
.name = "n25q512a",
.size = SZ_64M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
SPI_NOR_BP3_SR_BIT6,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xba, 0x21),
.name = "n25q00",
.size = SZ_128M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
SPI_NOR_BP3_SR_BIT6 | NO_CHIP_ERASE,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xbb, 0x21),
.name = "n25q00a",
.size = SZ_128M,
.flags = NO_CHIP_ERASE,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xba, 0x22),
.name = "mt25ql02g",
.size = SZ_256M,
.flags = NO_CHIP_ERASE,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xbb, 0x22),
.name = "mt25qu02g",
.size = SZ_256M,
.flags = NO_CHIP_ERASE,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0x20, 0x10),
.name = "m25p05",
@ -348,36 +250,6 @@ static const struct flash_info st_nor_parts[] = {
.name = "m25p128",
.sector_size = SZ_256K,
.size = SZ_16M,
}, {
.name = "m25p05-nonjedec",
.sector_size = SZ_32K,
.size = SZ_64K,
}, {
.name = "m25p10-nonjedec",
.sector_size = SZ_32K,
.size = SZ_128K,
}, {
.name = "m25p20-nonjedec",
.size = SZ_256K,
}, {
.name = "m25p40-nonjedec",
.size = SZ_512K,
}, {
.name = "m25p80-nonjedec",
.size = SZ_1M,
}, {
.name = "m25p16-nonjedec",
.size = SZ_2M,
}, {
.name = "m25p32-nonjedec",
.size = SZ_4M,
}, {
.name = "m25p64-nonjedec",
.size = SZ_8M,
}, {
.name = "m25p128-nonjedec",
.sector_size = SZ_256K,
.size = SZ_16M,
}, {
.id = SNOR_ID(0x20, 0x40, 0x11),
.name = "m45pe10",
@ -390,6 +262,34 @@ static const struct flash_info st_nor_parts[] = {
.id = SNOR_ID(0x20, 0x40, 0x15),
.name = "m45pe16",
.size = SZ_2M,
}, {
.id = SNOR_ID(0x20, 0x63, 0x16),
.name = "m25px32-s1",
.size = SZ_4M,
.no_sfdp_flags = SECT_4K,
}, {
.id = SNOR_ID(0x20, 0x71, 0x14),
.name = "m25px80",
.size = SZ_1M,
}, {
.id = SNOR_ID(0x20, 0x71, 0x15),
.name = "m25px16",
.size = SZ_2M,
.no_sfdp_flags = SECT_4K,
}, {
.id = SNOR_ID(0x20, 0x71, 0x16),
.name = "m25px32",
.size = SZ_4M,
.no_sfdp_flags = SECT_4K,
}, {
.id = SNOR_ID(0x20, 0x71, 0x17),
.name = "m25px64",
.size = SZ_8M,
}, {
.id = SNOR_ID(0x20, 0x73, 0x16),
.name = "m25px32-s0",
.size = SZ_4M,
.no_sfdp_flags = SECT_4K,
}, {
.id = SNOR_ID(0x20, 0x80, 0x12),
.name = "m25pe20",
@ -404,34 +304,134 @@ static const struct flash_info st_nor_parts[] = {
.size = SZ_2M,
.no_sfdp_flags = SECT_4K,
}, {
.id = SNOR_ID(0x20, 0x71, 0x15),
.name = "m25px16",
.size = SZ_2M,
.no_sfdp_flags = SECT_4K,
}, {
.id = SNOR_ID(0x20, 0x71, 0x16),
.name = "m25px32",
.id = SNOR_ID(0x20, 0xba, 0x16),
.name = "n25q032",
.size = SZ_4M,
.no_sfdp_flags = SECT_4K,
.no_sfdp_flags = SPI_NOR_QUAD_READ,
}, {
.id = SNOR_ID(0x20, 0x73, 0x16),
.name = "m25px32-s0",
.size = SZ_4M,
.no_sfdp_flags = SECT_4K,
}, {
.id = SNOR_ID(0x20, 0x63, 0x16),
.name = "m25px32-s1",
.size = SZ_4M,
.no_sfdp_flags = SECT_4K,
}, {
.id = SNOR_ID(0x20, 0x71, 0x17),
.name = "m25px64",
.id = SNOR_ID(0x20, 0xba, 0x17),
.name = "n25q064",
.size = SZ_8M,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
}, {
.id = SNOR_ID(0x20, 0x71, 0x14),
.name = "m25px80",
.size = SZ_1M,
},
.id = SNOR_ID(0x20, 0xba, 0x18),
.name = "n25q128a13",
.size = SZ_16M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
SPI_NOR_BP3_SR_BIT6,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xba, 0x19, 0x10, 0x44, 0x00),
.name = "mt25ql256a",
.size = SZ_32M,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.fixup_flags = SPI_NOR_4B_OPCODES,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xba, 0x19),
.name = "n25q256a",
.size = SZ_32M,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xba, 0x20, 0x10, 0x44, 0x00),
.name = "mt25ql512a",
.size = SZ_64M,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.fixup_flags = SPI_NOR_4B_OPCODES,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xba, 0x20),
.name = "n25q512ax3",
.size = SZ_64M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
SPI_NOR_BP3_SR_BIT6,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xba, 0x21),
.name = "n25q00",
.size = SZ_128M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
SPI_NOR_BP3_SR_BIT6 | NO_CHIP_ERASE,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xba, 0x22),
.name = "mt25ql02g",
.size = SZ_256M,
.flags = NO_CHIP_ERASE,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xbb, 0x15),
.name = "n25q016a",
.size = SZ_2M,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
}, {
.id = SNOR_ID(0x20, 0xbb, 0x16),
.name = "n25q032a",
.size = SZ_4M,
.no_sfdp_flags = SPI_NOR_QUAD_READ,
}, {
.id = SNOR_ID(0x20, 0xbb, 0x17),
.name = "n25q064a",
.size = SZ_8M,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
}, {
.id = SNOR_ID(0x20, 0xbb, 0x18),
.name = "n25q128a11",
.size = SZ_16M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
SPI_NOR_BP3_SR_BIT6,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xbb, 0x19, 0x10, 0x44, 0x00),
.name = "mt25qu256a",
.size = SZ_32M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
SPI_NOR_BP3_SR_BIT6,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.fixup_flags = SPI_NOR_4B_OPCODES,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xbb, 0x19),
.name = "n25q256ax1",
.size = SZ_32M,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xbb, 0x20, 0x10, 0x44, 0x00),
.name = "mt25qu512a",
.size = SZ_64M,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.fixup_flags = SPI_NOR_4B_OPCODES,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xbb, 0x20),
.name = "n25q512a",
.size = SZ_64M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
SPI_NOR_BP3_SR_BIT6,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xbb, 0x21),
.name = "n25q00a",
.size = SZ_128M,
.flags = NO_CHIP_ERASE,
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
.mfr_flags = USE_FSR,
}, {
.id = SNOR_ID(0x20, 0xbb, 0x22),
.name = "mt25qu02g",
.size = SZ_256M,
.flags = NO_CHIP_ERASE,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
.mfr_flags = USE_FSR,
}
};
/**