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staging: cxt1e1: Fix line over 80 characters.

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Fix checkpatch.pl issues with line over 80
characters in comet.c

Signed-off-by: Gulsah Kose <gulsah.1004@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Gulsah Kose 2014-03-09 15:49:09 +02:00 committed by Greg Kroah-Hartman
parent 3661cdf16d
commit 9d9c1c2452
1 changed files with 24 additions and 11 deletions
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35
drivers/staging/cxt1e1/comet.c
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@ -29,8 +29,11 @@ extern int cxt1e1_log_level;
/* forward references */ /* forward references */
static void SetPwrLevel(struct s_comet_reg *comet); static void SetPwrLevel(struct s_comet_reg *comet);
static void WrtRcvEqualizerTbl(ci_t *ci, struct s_comet_reg *comet, u_int32_t *table); static void WrtRcvEqualizerTbl(ci_t *ci, struct s_comet_reg *comet,
static void WrtXmtWaveformTbl(ci_t *ci, struct s_comet_reg *comet, u_int8_t table[COMET_NUM_SAMPLES][COMET_NUM_UNITS]); u_int32_t *table);
static void WrtXmtWaveformTbl(ci_t *ci, struct s_comet_reg *comet,
u_int8_t table[COMET_NUM_SAMPLES]
[COMET_NUM_UNITS]);
static void *TWV_table[12] = { static void *TWV_table[12] = {
@ -50,6 +53,7 @@ lbo_tbl_lkup(int t1, int lbo) {
if (t1) if (t1)
/* default T1 waveform table */ /* default T1 waveform table */
lbo = CFG_LBO_LH0; lbo = CFG_LBO_LH0;
else else
/* default E1 waveform table */ /* default E1 waveform table */
lbo = CFG_LBO_E120; lbo = CFG_LBO_E120;
@ -58,8 +62,8 @@ lbo_tbl_lkup(int t1, int lbo) {
return lbo - 1; return lbo - 1;
} }
void init_comet(void *ci, struct s_comet_reg *comet, u_int32_t port_mode, int clockmaster, void init_comet(void *ci, struct s_comet_reg *comet, u_int32_t port_mode,
u_int8_t moreParams) int clockmaster, u_int8_t moreParams)
{ {
u_int8_t isT1mode; u_int8_t isT1mode;
/* T1 default */ /* T1 default */
@ -146,7 +150,9 @@ void init_comet(void *ci, struct s_comet_reg *comet, u_int32_t port_mode, int cl
/* t1RBOC enable(BOC:BitOriented Code) */ /* t1RBOC enable(BOC:BitOriented Code) */
pci_write_32((u_int32_t *) &comet->t1_rboc_ena, 0x00); pci_write_32((u_int32_t *) &comet->t1_rboc_ena, 0x00);
if (isT1mode) { if (isT1mode) {
/* IBCD cfg: aka Inband Code Detection ** loopback code length set to */ /* IBCD cfg: aka Inband Code Detection ** loopback code length
* set to
*/
/* 6 bit down, 5 bit up (assert) */ /* 6 bit down, 5 bit up (assert) */
pci_write_32((u_int32_t *) &comet->ibcd_cfg, 0x04); pci_write_32((u_int32_t *) &comet->ibcd_cfg, 0x04);
/* line loopback activate pattern */ /* line loopback activate pattern */
@ -286,7 +292,9 @@ void init_comet(void *ci, struct s_comet_reg *comet, u_int32_t port_mode, int cl
/* 0x30: "BRIF cfg"; 0x20 is 'CMODE', 0x03 is (bit) rate */ /* 0x30: "BRIF cfg"; 0x20 is 'CMODE', 0x03 is (bit) rate */
/* note "rate bits can only be set once after reset" */ /* note "rate bits can only be set once after reset" */
if (clockmaster) { if (clockmaster) {
/* CMODE == clockMode, 0=clock master (so all 3 others should be slave) */ /* CMODE == clockMode, 0=clock master
* (so all 3 others should be slave)
*/
/* rate = 1.544 Mb/s */ /* rate = 1.544 Mb/s */
if (isT1mode) if (isT1mode)
/* Comet 0 Master Mode(CMODE=0) */ /* Comet 0 Master Mode(CMODE=0) */
@ -398,7 +406,8 @@ void init_comet(void *ci, struct s_comet_reg *comet, u_int32_t port_mode, int cl
** Returns: Nothing ** Returns: Nothing
*/ */
static void static void
WrtXmtWaveform(ci_t *ci, struct s_comet_reg *comet, u_int32_t sample, u_int32_t unit, u_int8_t data) WrtXmtWaveform(ci_t *ci, struct s_comet_reg *comet, u_int32_t sample,
u_int32_t unit, u_int8_t data)
{ {
u_int8_t WaveformAddr; u_int8_t WaveformAddr;
@ -561,13 +570,17 @@ SetCometOps(struct s_comet_reg *comet)
if (comet == mConfig.C4Func1Base + (COMET0_OFFSET >> 2)) { if (comet == mConfig.C4Func1Base + (COMET0_OFFSET >> 2)) {
/* read the BRIF Configuration */ /* read the BRIF Configuration */
rd_value = (u_int8_t) pci_read_32((u_int32_t *) &comet->brif_cfg); rd_value = (u_int8_t) pci_read_32((u_int32_t *)
&comet->brif_cfg);
rd_value &= ~0x20; rd_value &= ~0x20;
pci_write_32((u_int32_t *) &comet->brif_cfg, (u_int32_t) rd_value); pci_write_32((u_int32_t *) &comet->brif_cfg,
(u_int32_t) rd_value);
/* read the BRIF Frame Pulse Configuration */ /* read the BRIF Frame Pulse Configuration */
rd_value = (u_int8_t) pci_read_32((u_int32_t *) &comet->brif_fpcfg); rd_value = (u_int8_t) pci_read_32((u_int32_t *)
&comet->brif_fpcfg);
rd_value &= ~0x20; rd_value &= ~0x20;
pci_write_32((u_int32_t *) &comet->brif_fpcfg, (u_int8_t) rd_value); pci_write_32((u_int32_t *) &comet->brif_fpcfg,
(u_int8_t) rd_value);
} else { } else {
/* read the BRIF Configuration */ /* read the BRIF Configuration */
rd_value = (u_int8_t) pci_read_32((u_int32_t *) &comet->brif_cfg); rd_value = (u_int8_t) pci_read_32((u_int32_t *) &comet->brif_cfg);