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drm/nouveau/nouveau/hmm: fix migrate zero page to GPU
When calling OpenCL clEnqueueSVMMigrateMem() on a region of memory that is backed by pte_none() or zero pages, migrate_vma_setup() will fill the source PFN array with an entry indicating the source page is zero. Use this to optimize migration to device private memory by allocating GPU memory and zero filling it instead of failing to migrate the page. Signed-off-by: Ralph Campbell <rcampbell@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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@ -56,6 +56,8 @@ enum nouveau_aper {
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typedef int (*nouveau_migrate_copy_t)(struct nouveau_drm *drm, u64 npages,
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enum nouveau_aper, u64 dst_addr,
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enum nouveau_aper, u64 src_addr);
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typedef int (*nouveau_clear_page_t)(struct nouveau_drm *drm, u32 length,
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enum nouveau_aper, u64 dst_addr);
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struct nouveau_dmem_chunk {
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struct list_head list;
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@ -67,6 +69,7 @@ struct nouveau_dmem_chunk {
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struct nouveau_dmem_migrate {
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nouveau_migrate_copy_t copy_func;
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nouveau_clear_page_t clear_func;
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struct nouveau_channel *chan;
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};
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@ -436,6 +439,52 @@ nvc0b5_migrate_copy(struct nouveau_drm *drm, u64 npages,
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return 0;
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}
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static int
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nvc0b5_migrate_clear(struct nouveau_drm *drm, u32 length,
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enum nouveau_aper dst_aper, u64 dst_addr)
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{
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struct nouveau_channel *chan = drm->dmem->migrate.chan;
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u32 launch_dma = (1 << 10) /* REMAP_ENABLE_TRUE */ |
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(1 << 8) /* DST_MEMORY_LAYOUT_PITCH. */ |
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(1 << 7) /* SRC_MEMORY_LAYOUT_PITCH. */ |
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(1 << 2) /* FLUSH_ENABLE_TRUE. */ |
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(2 << 0) /* DATA_TRANSFER_TYPE_NON_PIPELINED. */;
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u32 remap = (4 << 0) /* DST_X_CONST_A */ |
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(5 << 4) /* DST_Y_CONST_B */ |
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(3 << 16) /* COMPONENT_SIZE_FOUR */ |
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(1 << 24) /* NUM_DST_COMPONENTS_TWO */;
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int ret;
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ret = RING_SPACE(chan, 12);
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if (ret)
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return ret;
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switch (dst_aper) {
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case NOUVEAU_APER_VRAM:
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BEGIN_IMC0(chan, NvSubCopy, 0x0264, 0);
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break;
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case NOUVEAU_APER_HOST:
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BEGIN_IMC0(chan, NvSubCopy, 0x0264, 1);
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break;
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default:
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return -EINVAL;
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}
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launch_dma |= 0x00002000; /* DST_TYPE_PHYSICAL. */
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BEGIN_NVC0(chan, NvSubCopy, 0x0700, 3);
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OUT_RING(chan, 0);
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OUT_RING(chan, 0);
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OUT_RING(chan, remap);
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BEGIN_NVC0(chan, NvSubCopy, 0x0408, 2);
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OUT_RING(chan, upper_32_bits(dst_addr));
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OUT_RING(chan, lower_32_bits(dst_addr));
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BEGIN_NVC0(chan, NvSubCopy, 0x0418, 1);
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OUT_RING(chan, length >> 3);
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BEGIN_NVC0(chan, NvSubCopy, 0x0300, 1);
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OUT_RING(chan, launch_dma);
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return 0;
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}
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static int
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nouveau_dmem_migrate_init(struct nouveau_drm *drm)
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{
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@ -445,6 +494,7 @@ nouveau_dmem_migrate_init(struct nouveau_drm *drm)
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case VOLTA_DMA_COPY_A:
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case TURING_DMA_COPY_A:
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drm->dmem->migrate.copy_func = nvc0b5_migrate_copy;
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drm->dmem->migrate.clear_func = nvc0b5_migrate_clear;
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drm->dmem->migrate.chan = drm->ttm.chan;
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return 0;
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default:
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@ -487,21 +537,28 @@ static unsigned long nouveau_dmem_migrate_copy_one(struct nouveau_drm *drm,
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unsigned long paddr;
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spage = migrate_pfn_to_page(src);
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if (!spage || !(src & MIGRATE_PFN_MIGRATE))
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if (!(src & MIGRATE_PFN_MIGRATE))
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goto out;
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dpage = nouveau_dmem_page_alloc_locked(drm);
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if (!dpage)
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goto out;
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*dma_addr = dma_map_page(dev, spage, 0, PAGE_SIZE, DMA_BIDIRECTIONAL);
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paddr = nouveau_dmem_page_addr(dpage);
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if (spage) {
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*dma_addr = dma_map_page(dev, spage, 0, page_size(spage),
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DMA_BIDIRECTIONAL);
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if (dma_mapping_error(dev, *dma_addr))
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goto out_free_page;
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paddr = nouveau_dmem_page_addr(dpage);
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if (drm->dmem->migrate.copy_func(drm, 1, NOUVEAU_APER_VRAM,
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paddr, NOUVEAU_APER_HOST, *dma_addr))
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if (drm->dmem->migrate.copy_func(drm, page_size(spage),
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NOUVEAU_APER_VRAM, paddr, NOUVEAU_APER_HOST, *dma_addr))
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goto out_dma_unmap;
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} else {
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*dma_addr = DMA_MAPPING_ERROR;
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if (drm->dmem->migrate.clear_func(drm, page_size(dpage),
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NOUVEAU_APER_VRAM, paddr))
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goto out_free_page;
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}
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*pfn = NVIF_VMM_PFNMAP_V0_V | NVIF_VMM_PFNMAP_V0_VRAM |
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((paddr >> PAGE_SHIFT) << NVIF_VMM_PFNMAP_V0_ADDR_SHIFT);
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@ -528,7 +585,7 @@ static void nouveau_dmem_migrate_chunk(struct nouveau_drm *drm,
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for (i = 0; addr < args->end; i++) {
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args->dst[i] = nouveau_dmem_migrate_copy_one(drm, args->src[i],
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dma_addrs + nr_dma, pfns + i);
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if (args->dst[i])
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if (!dma_mapping_error(drm->dev->dev, dma_addrs[nr_dma]))
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nr_dma++;
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addr += PAGE_SIZE;
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}
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