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cxgb4: Add PTP Hardware Clock (PHC) support
Add PTP IEEE-1588 support and make it accessible via PHC subsystem. The functionality is enabled for T5/T6 adapters. Driver interfaces with Firmware to program and adjust the clock offset. Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Atul Gupta <atul.gupta@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Atul Gupta
David S. Miller
parent
a456950445
commit
9c33e4208b
@ -5202,6 +5202,9 @@ static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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mutex_unlock(&uld_mutex);
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mutex_unlock(&uld_mutex);
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}
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}
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if (!is_t4(adapter->params.chip))
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cxgb4_ptp_init(adapter);
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print_adapter_info(adapter);
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print_adapter_info(adapter);
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setup_fw_sge_queues(adapter);
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setup_fw_sge_queues(adapter);
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return 0;
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return 0;
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@ -5311,6 +5314,9 @@ static void remove_one(struct pci_dev *pdev)
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debugfs_remove_recursive(adapter->debugfs_root);
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debugfs_remove_recursive(adapter->debugfs_root);
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if (!is_t4(adapter->params.chip))
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cxgb4_ptp_stop(adapter);
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/* If we allocated filters, free up state associated with any
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/* If we allocated filters, free up state associated with any
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* valid filters ...
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* valid filters ...
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*/
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*/
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@ -192,3 +192,284 @@ int cxgb4_ptp_redirect_rx_packet(struct adapter *adapter, struct port_info *pi)
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"PTP: %s error %d\n", __func__, -err);
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"PTP: %s error %d\n", __func__, -err);
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return err;
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return err;
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}
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}
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/**
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* @ptp: ptp clock structure
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* @ppb: Desired frequency change in parts per billion
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*
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* Adjust the frequency of the PHC cycle counter by the indicated ppb from
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* the base frequency.
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*/
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static int cxgb4_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
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{
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struct adapter *adapter = (struct adapter *)container_of(ptp,
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struct adapter, ptp_clock_info);
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struct fw_ptp_cmd c;
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int err;
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memset(&c, 0, sizeof(c));
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c.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD) |
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FW_CMD_REQUEST_F |
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FW_CMD_WRITE_F |
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FW_PTP_CMD_PORTID_V(0));
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c.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(sizeof(c) / 16));
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c.u.ts.sc = FW_PTP_SC_ADJ_FREQ;
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c.u.ts.sign = (ppb < 0) ? 1 : 0;
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if (ppb < 0)
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ppb = -ppb;
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c.u.ts.ppb = cpu_to_be32(ppb);
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err = t4_wr_mbox(adapter, adapter->mbox, &c, sizeof(c), NULL);
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if (err < 0)
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dev_err(adapter->pdev_dev,
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"PTP: %s error %d\n", __func__, -err);
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return err;
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}
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/**
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* cxgb4_ptp_fineadjtime - Shift the time of the hardware clock
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* @ptp: ptp clock structure
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* @delta: Desired change in nanoseconds
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*
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* Adjust the timer by resetting the timecounter structure.
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*/
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static int cxgb4_ptp_fineadjtime(struct adapter *adapter, s64 delta)
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{
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struct fw_ptp_cmd c;
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int err;
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memset(&c, 0, sizeof(c));
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c.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD) |
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FW_CMD_REQUEST_F |
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FW_CMD_WRITE_F |
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FW_PTP_CMD_PORTID_V(0));
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c.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(sizeof(c) / 16));
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c.u.ts.sc = FW_PTP_SC_ADJ_FTIME;
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c.u.ts.tm = cpu_to_be64(delta);
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err = t4_wr_mbox(adapter, adapter->mbox, &c, sizeof(c), NULL);
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if (err < 0)
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dev_err(adapter->pdev_dev,
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"PTP: %s error %d\n", __func__, -err);
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return err;
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}
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/**
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* cxgb4_ptp_adjtime - Shift the time of the hardware clock
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* @ptp: ptp clock structure
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* @delta: Desired change in nanoseconds
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*
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* Adjust the timer by resetting the timecounter structure.
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*/
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static int cxgb4_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
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{
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struct adapter *adapter =
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(struct adapter *)container_of(ptp, struct adapter,
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ptp_clock_info);
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struct fw_ptp_cmd c;
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s64 sign = 1;
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int err;
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if (delta < 0)
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sign = -1;
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if (delta * sign > PTP_CLOCK_MAX_ADJTIME) {
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memset(&c, 0, sizeof(c));
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c.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD) |
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FW_CMD_REQUEST_F |
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FW_CMD_WRITE_F |
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FW_PTP_CMD_PORTID_V(0));
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c.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(sizeof(c) / 16));
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c.u.ts.sc = FW_PTP_SC_ADJ_TIME;
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c.u.ts.sign = (delta < 0) ? 1 : 0;
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if (delta < 0)
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delta = -delta;
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c.u.ts.tm = cpu_to_be64(delta);
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err = t4_wr_mbox(adapter, adapter->mbox, &c, sizeof(c), NULL);
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if (err < 0)
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dev_err(adapter->pdev_dev,
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"PTP: %s error %d\n", __func__, -err);
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} else {
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err = cxgb4_ptp_fineadjtime(adapter, delta);
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}
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return err;
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}
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/**
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* cxgb4_ptp_gettime - Reads the current time from the hardware clock
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* @ptp: ptp clock structure
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* @ts: timespec structure to hold the current time value
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*
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* Read the timecounter and return the correct value in ns after converting
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* it into a struct timespec.
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*/
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static int cxgb4_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
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{
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struct adapter *adapter = (struct adapter *)container_of(ptp,
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struct adapter, ptp_clock_info);
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struct fw_ptp_cmd c;
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u64 ns;
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int err;
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memset(&c, 0, sizeof(c));
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c.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD) |
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FW_CMD_REQUEST_F |
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FW_CMD_READ_F |
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FW_PTP_CMD_PORTID_V(0));
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c.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(sizeof(c) / 16));
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c.u.ts.sc = FW_PTP_SC_GET_TIME;
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err = t4_wr_mbox(adapter, adapter->mbox, &c, sizeof(c), &c);
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if (err < 0) {
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dev_err(adapter->pdev_dev,
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"PTP: %s error %d\n", __func__, -err);
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return err;
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}
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/* convert to timespec*/
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ns = be64_to_cpu(c.u.ts.tm);
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*ts = ns_to_timespec64(ns);
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return err;
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}
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/**
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* cxgb4_ptp_settime - Set the current time on the hardware clock
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* @ptp: ptp clock structure
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* @ts: timespec containing the new time for the cycle counter
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*
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* Reset value to new base value instead of the kernel
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* wall timer value.
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*/
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static int cxgb4_ptp_settime(struct ptp_clock_info *ptp,
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const struct timespec64 *ts)
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{
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struct adapter *adapter = (struct adapter *)container_of(ptp,
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struct adapter, ptp_clock_info);
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struct fw_ptp_cmd c;
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u64 ns;
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int err;
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memset(&c, 0, sizeof(c));
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c.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD) |
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FW_CMD_REQUEST_F |
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FW_CMD_WRITE_F |
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FW_PTP_CMD_PORTID_V(0));
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c.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(sizeof(c) / 16));
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c.u.ts.sc = FW_PTP_SC_SET_TIME;
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ns = timespec64_to_ns(ts);
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c.u.ts.tm = cpu_to_be64(ns);
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err = t4_wr_mbox(adapter, adapter->mbox, &c, sizeof(c), NULL);
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if (err < 0)
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dev_err(adapter->pdev_dev,
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"PTP: %s error %d\n", __func__, -err);
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return err;
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}
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static void cxgb4_init_ptp_timer(struct adapter *adapter)
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{
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struct fw_ptp_cmd c;
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int err;
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memset(&c, 0, sizeof(c));
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c.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD) |
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FW_CMD_REQUEST_F |
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FW_CMD_WRITE_F |
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FW_PTP_CMD_PORTID_V(0));
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c.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(sizeof(c) / 16));
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c.u.scmd.sc = FW_PTP_SC_INIT_TIMER;
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err = t4_wr_mbox(adapter, adapter->mbox, &c, sizeof(c), NULL);
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if (err < 0)
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dev_err(adapter->pdev_dev,
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"PTP: %s error %d\n", __func__, -err);
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}
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/**
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* cxgb4_ptp_enable - enable or disable an ancillary feature
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* @ptp: ptp clock structure
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* @request: Desired resource to enable or disable
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* @on: Caller passes one to enable or zero to disable
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*
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* Enable (or disable) ancillary features of the PHC subsystem.
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* Currently, no ancillary features are supported.
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*/
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static int cxgb4_ptp_enable(struct ptp_clock_info __always_unused *ptp,
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struct ptp_clock_request __always_unused *request,
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int __always_unused on)
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{
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return -ENOTSUPP;
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}
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static const struct ptp_clock_info cxgb4_ptp_clock_info = {
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.owner = THIS_MODULE,
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.name = "cxgb4_clock",
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.max_adj = MAX_PTP_FREQ_ADJ,
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.n_alarm = 0,
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.n_ext_ts = 0,
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.n_per_out = 0,
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.pps = 0,
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.adjfreq = cxgb4_ptp_adjfreq,
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.adjtime = cxgb4_ptp_adjtime,
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.gettime64 = cxgb4_ptp_gettime,
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.settime64 = cxgb4_ptp_settime,
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.enable = cxgb4_ptp_enable,
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};
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/**
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* cxgb4_ptp_init - initialize PTP for devices which support it
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* @adapter: board private structure
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*
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* This function performs the required steps for enabling PTP support.
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*/
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void cxgb4_ptp_init(struct adapter *adapter)
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{
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struct timespec64 now;
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/* no need to create a clock device if we already have one */
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if (!IS_ERR_OR_NULL(adapter->ptp_clock))
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return;
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adapter->ptp_tx_skb = NULL;
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adapter->ptp_clock_info = cxgb4_ptp_clock_info;
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spin_lock_init(&adapter->ptp_lock);
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adapter->ptp_clock = ptp_clock_register(&adapter->ptp_clock_info,
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&adapter->pdev->dev);
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if (!adapter->ptp_clock) {
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dev_err(adapter->pdev_dev,
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"PTP %s Clock registration has failed\n", __func__);
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return;
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}
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now = ktime_to_timespec64(ktime_get_real());
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cxgb4_init_ptp_timer(adapter);
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if (cxgb4_ptp_settime(&adapter->ptp_clock_info, &now) < 0) {
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ptp_clock_unregister(adapter->ptp_clock);
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adapter->ptp_clock = NULL;
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}
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}
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/**
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* cxgb4_ptp_remove - disable PTP device and stop the overflow check
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* @adapter: board private structure
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*
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* Stop the PTP support.
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*/
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void cxgb4_ptp_stop(struct adapter *adapter)
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{
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if (adapter->ptp_tx_skb) {
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dev_kfree_skb_any(adapter->ptp_tx_skb);
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adapter->ptp_tx_skb = NULL;
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}
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if (adapter->ptp_clock) {
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ptp_clock_unregister(adapter->ptp_clock);
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adapter->ptp_clock = NULL;
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}
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}
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Reference in New Issue
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