mirror of
https://github.com/torvalds/linux.git
synced 2024-12-23 03:11:46 +00:00
MIPS/OCTEON: Override default address space layout.
OCTEON II cannot execute code in the default CAC_BASE space, so we supply a value (0x8000000000000000) that does work. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5457/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
parent
b72d9a4ef3
commit
9b1f812acb
24
arch/mips/include/asm/mach-cavium-octeon/spaces.h
Normal file
24
arch/mips/include/asm/mach-cavium-octeon/spaces.h
Normal file
@ -0,0 +1,24 @@
|
|||||||
|
/*
|
||||||
|
* This file is subject to the terms and conditions of the GNU General Public
|
||||||
|
* License. See the file "COPYING" in the main directory of this archive
|
||||||
|
* for more details.
|
||||||
|
*
|
||||||
|
* Copyright (C) 2012 Cavium, Inc.
|
||||||
|
*/
|
||||||
|
#ifndef _ASM_MACH_CAVIUM_OCTEON_SPACES_H
|
||||||
|
#define _ASM_MACH_CAVIUM_OCTEON_SPACES_H
|
||||||
|
|
||||||
|
#include <linux/const.h>
|
||||||
|
|
||||||
|
#ifdef CONFIG_64BIT
|
||||||
|
/* They are all the same and some OCTEON II cores cannot handle 0xa8.. */
|
||||||
|
#define CAC_BASE _AC(0x8000000000000000, UL)
|
||||||
|
#define UNCAC_BASE _AC(0x8000000000000000, UL)
|
||||||
|
#define IO_BASE _AC(0x8000000000000000, UL)
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* CONFIG_64BIT */
|
||||||
|
|
||||||
|
#include <asm/mach-generic/spaces.h>
|
||||||
|
|
||||||
|
#endif /* _ASM_MACH_CAVIUM_OCTEON_SPACES_H */
|
Loading…
Reference in New Issue
Block a user