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drm/nouveau/nvif: give every object a human-readable identifier

Browse Source 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
This commit is contained in:
Ben Skeggs 2020-03-30 09:51:33 +10:00
parent 6db25fb13a
commit 9ac596a4e8
28 changed files with 115 additions and 105 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/gpu/drm/nouveau/dispnv50/corec37d.c
View File

@ -92,8 +92,8 @@ int corec37d_caps_init(struct nouveau_drm *drm, struct nv50_disp *disp)
{
int ret;
ret = nvif_object_init(&disp->disp->object, 0, GV100_DISP_CAPS,
NULL, 0, &disp->caps);
ret = nvif_object_ctor(&disp->disp->object, "dispCaps", 0,
GV100_DISP_CAPS, NULL, 0, &disp->caps);
if (ret) {
NV_ERROR(drm,
"Failed to init notifier caps region: %d\n",

4
drivers/gpu/drm/nouveau/dispnv50/crc.c
View File

@ -514,7 +514,7 @@ nv50_crc_ctx_init(struct nv50_head *head, struct nvif_mmu *mmu,
if (ret)
return ret;
ret = nvif_object_init(&core->chan.base.user,
ret = nvif_object_ctor(&core->chan.base.user, "kmsCrcNtfyCtxDma",
NV50_DISP_HANDLE_CRC_CTX(head, idx),
NV_DMA_IN_MEMORY,
&(struct nv_dma_v0) {
@ -538,7 +538,7 @@ fail_fini:
static inline void
nv50_crc_ctx_fini(struct nv50_crc_notifier_ctx *ctx)
{
nvif_object_fini(&ctx->ntfy);
nvif_object_dtor(&ctx->ntfy);
nvif_mem_fini(&ctx->mem);
}

4
drivers/gpu/drm/nouveau/dispnv50/curs507a.c
View File

@ -138,8 +138,8 @@ curs507a_new_(const struct nv50_wimm_func *func, struct nouveau_drm *drm,
if (*pwndw = wndw, ret)
return ret;
ret = nvif_object_init(&disp->disp->object, 0, oclass, &args,
sizeof(args), &wndw->wimm.base.user);
ret = nvif_object_ctor(&disp->disp->object, "kmsCurs", 0, oclass,
&args, sizeof(args), &wndw->wimm.base.user);
if (ret) {
NV_ERROR(drm, "curs%04x allocation failed: %d\n", oclass, ret);
return ret;

17
drivers/gpu/drm/nouveau/dispnv50/disp.c
View File

@ -79,8 +79,9 @@ nv50_chan_create(struct nvif_device *device, struct nvif_object *disp,
while (oclass[0]) {
for (i = 0; i < n; i++) {
if (sclass[i].oclass == oclass[0]) {
ret = nvif_object_init(disp, 0, oclass[0],
data, size, &chan->user);
ret = nvif_object_ctor(disp, "kmsChan", 0,
oclass[0], data, size,
&chan->user);
if (ret == 0)
nvif_object_map(&chan->user, NULL, 0);
nvif_object_sclass_put(&sclass);
@ -97,7 +98,7 @@ nv50_chan_create(struct nvif_device *device, struct nvif_object *disp,
static void
nv50_chan_destroy(struct nv50_chan *chan)
{
nvif_object_fini(&chan->user);
nvif_object_dtor(&chan->user);
}
/******************************************************************************
@ -107,8 +108,8 @@ nv50_chan_destroy(struct nv50_chan *chan)
void
nv50_dmac_destroy(struct nv50_dmac *dmac)
{
nvif_object_fini(&dmac->vram);
nvif_object_fini(&dmac->sync);
nvif_object_dtor(&dmac->vram);
nvif_object_dtor(&dmac->sync);
nv50_chan_destroy(&dmac->base);
@ -155,7 +156,7 @@ nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
if (!syncbuf)
return 0;
ret = nvif_object_init(&dmac->base.user, NV50_DISP_HANDLE_SYNCBUF,
ret = nvif_object_ctor(&dmac->base.user, "kmsSyncCtxDma", NV50_DISP_HANDLE_SYNCBUF,
NV_DMA_IN_MEMORY,
&(struct nv_dma_v0) {
.target = NV_DMA_V0_TARGET_VRAM,
@ -167,7 +168,7 @@ nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
if (ret)
return ret;
ret = nvif_object_init(&dmac->base.user, NV50_DISP_HANDLE_VRAM,
ret = nvif_object_ctor(&dmac->base.user, "kmsVramCtxDma", NV50_DISP_HANDLE_VRAM,
NV_DMA_IN_MEMORY,
&(struct nv_dma_v0) {
.target = NV_DMA_V0_TARGET_VRAM,
@ -2465,7 +2466,7 @@ nv50_display_destroy(struct drm_device *dev)
nv50_audio_component_fini(nouveau_drm(dev));
nvif_object_unmap(&disp->caps);
nvif_object_fini(&disp->caps);
nvif_object_dtor(&disp->caps);
nv50_core_del(&disp->core);
nouveau_bo_unmap(disp->sync);

4
drivers/gpu/drm/nouveau/dispnv50/oimm507b.c
View File

@ -33,8 +33,8 @@ oimm507b_init_(const struct nv50_wimm_func *func, struct nouveau_drm *drm,
struct nv50_disp *disp = nv50_disp(drm->dev);
int ret;
ret = nvif_object_init(&disp->disp->object, 0, oclass, &args,
sizeof(args), &wndw->wimm.base.user);
ret = nvif_object_ctor(&disp->disp->object, "kmsOvim", 0, oclass,
&args, sizeof(args), &wndw->wimm.base.user);
if (ret) {
NV_ERROR(drm, "oimm%04x allocation failed: %d\n", oclass, ret);
return ret;

6
drivers/gpu/drm/nouveau/dispnv50/wndw.c
View File

@ -35,7 +35,7 @@
static void
nv50_wndw_ctxdma_del(struct nv50_wndw_ctxdma *ctxdma)
{
nvif_object_fini(&ctxdma->object);
nvif_object_dtor(&ctxdma->object);
list_del(&ctxdma->head);
kfree(ctxdma);
}
@ -94,8 +94,8 @@ nv50_wndw_ctxdma_new(struct nv50_wndw *wndw, struct drm_framebuffer *fb)
argc += sizeof(args.gf119);
}
ret = nvif_object_init(wndw->ctxdma.parent, handle, NV_DMA_IN_MEMORY,
&args, argc, &ctxdma->object);
ret = nvif_object_ctor(wndw->ctxdma.parent, "kmsFbCtxDma", handle,
NV_DMA_IN_MEMORY, &args, argc, &ctxdma->object);
if (ret) {
nv50_wndw_ctxdma_del(ctxdma);
return ERR_PTR(ret);

8
drivers/gpu/drm/nouveau/include/nvif/object.h
View File

@ -1,7 +1,6 @@
/* SPDX-License-Identifier: MIT */
#ifndef __NVIF_OBJECT_H__
#define __NVIF_OBJECT_H__
#include <nvif/os.h>
struct nvif_sclass {
@ -12,6 +11,7 @@ struct nvif_sclass {
struct nvif_object {
struct nvif_client *client;
const char *name;
u32 handle;
s32 oclass;
void *priv; /*XXX: hack */
@ -21,9 +21,9 @@ struct nvif_object {
} map;
};
int nvif_object_init(struct nvif_object *, u32 handle, s32 oclass, void *, u32,
struct nvif_object *);
void nvif_object_fini(struct nvif_object *);
int nvif_object_ctor(struct nvif_object *, const char *name, u32 handle,
s32 oclass, void *, u32, struct nvif_object *);
void nvif_object_dtor(struct nvif_object *);
int nvif_object_ioctl(struct nvif_object *, void *, u32, void **);
int nvif_object_sclass_get(struct nvif_object *, struct nvif_sclass **);
void nvif_object_sclass_put(struct nvif_sclass **);

8
drivers/gpu/drm/nouveau/nouveau_abi16.c
View File

@ -114,7 +114,7 @@ static void
nouveau_abi16_ntfy_fini(struct nouveau_abi16_chan *chan,
struct nouveau_abi16_ntfy *ntfy)
{
nvif_object_fini(&ntfy->object);
nvif_object_dtor(&ntfy->object);
nvkm_mm_free(&chan->heap, &ntfy->node);
list_del(&ntfy->head);
kfree(ntfy);
@ -502,8 +502,8 @@ nouveau_abi16_ioctl_grobj_alloc(ABI16_IOCTL_ARGS)
list_add(&ntfy->head, &chan->notifiers);
client->route = NVDRM_OBJECT_ABI16;
ret = nvif_object_init(&chan->chan->user, init->handle, oclass,
NULL, 0, &ntfy->object);
ret = nvif_object_ctor(&chan->chan->user, "abi16EngObj", init->handle,
oclass, NULL, 0, &ntfy->object);
client->route = NVDRM_OBJECT_NVIF;
if (ret)
@ -569,7 +569,7 @@ nouveau_abi16_ioctl_notifierobj_alloc(ABI16_IOCTL_ARGS)
client->route = NVDRM_OBJECT_ABI16;
client->super = true;
ret = nvif_object_init(&chan->chan->user, info->handle,
ret = nvif_object_ctor(&chan->chan->user, "abi16Ntfy", info->handle,
NV_DMA_IN_MEMORY, &args, sizeof(args),
&ntfy->object);
client->super = false;

4
drivers/gpu/drm/nouveau/nouveau_bo.c
View File

@ -1197,14 +1197,14 @@ nouveau_bo_move_init(struct nouveau_drm *drm)
if (chan == NULL)
continue;
ret = nvif_object_init(&chan->user,
ret = nvif_object_ctor(&chan->user, "ttmBoMove",
mthd->oclass | (mthd->engine << 16),
mthd->oclass, NULL, 0,
&drm->ttm.copy);
if (ret == 0) {
ret = mthd->init(chan, drm->ttm.copy.handle);
if (ret) {
nvif_object_fini(&drm->ttm.copy);
nvif_object_dtor(&drm->ttm.copy);
continue;
}

36
drivers/gpu/drm/nouveau/nouveau_chan.c
View File

@ -102,12 +102,12 @@ nouveau_channel_del(struct nouveau_channel **pchan)
if (cli)
nouveau_svmm_part(chan->vmm->svmm, chan->inst);
nvif_object_fini(&chan->nvsw);
nvif_object_fini(&chan->gart);
nvif_object_fini(&chan->vram);
nvif_object_dtor(&chan->nvsw);
nvif_object_dtor(&chan->gart);
nvif_object_dtor(&chan->vram);
nvif_notify_fini(&chan->kill);
nvif_object_fini(&chan->user);
nvif_object_fini(&chan->push.ctxdma);
nvif_object_dtor(&chan->user);
nvif_object_dtor(&chan->push.ctxdma);
nouveau_vma_del(&chan->push.vma);
nouveau_bo_unmap(chan->push.buffer);
if (chan->push.buffer && chan->push.buffer->pin_refcnt)
@ -214,8 +214,9 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device,
}
}
ret = nvif_object_init(&device->object, 0, NV_DMA_FROM_MEMORY,
&args, sizeof(args), &chan->push.ctxdma);
ret = nvif_object_ctor(&device->object, "abi16PushCtxDma", 0,
NV_DMA_FROM_MEMORY, &args, sizeof(args),
&chan->push.ctxdma);
if (ret) {
nouveau_channel_del(pchan);
return ret;
@ -290,8 +291,8 @@ nouveau_channel_ind(struct nouveau_drm *drm, struct nvif_device *device,
size = sizeof(args.nv50);
}
ret = nvif_object_init(&device->object, 0, *oclass++,
&args, size, &chan->user);
ret = nvif_object_ctor(&device->object, "abi16ChanUser", 0,
*oclass++, &args, size, &chan->user);
if (ret == 0) {
if (chan->user.oclass >= VOLTA_CHANNEL_GPFIFO_A) {
chan->chid = args.volta.chid;
@ -341,8 +342,9 @@ nouveau_channel_dma(struct nouveau_drm *drm, struct nvif_device *device,
args.offset = chan->push.addr;
do {
ret = nvif_object_init(&device->object, 0, *oclass++,
&args, sizeof(args), &chan->user);
ret = nvif_object_ctor(&device->object, "abi16ChanUser", 0,
*oclass++, &args, sizeof(args),
&chan->user);
if (ret == 0) {
chan->chid = args.chid;
return ret;
@ -390,8 +392,9 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
args.limit = device->info.ram_user - 1;
}
ret = nvif_object_init(&chan->user, vram, NV_DMA_IN_MEMORY,
&args, sizeof(args), &chan->vram);
ret = nvif_object_ctor(&chan->user, "abi16ChanVramCtxDma", vram,
NV_DMA_IN_MEMORY, &args, sizeof(args),
&chan->vram);
if (ret)
return ret;
@ -414,8 +417,9 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
args.limit = chan->vmm->vmm.limit - 1;
}
ret = nvif_object_init(&chan->user, gart, NV_DMA_IN_MEMORY,
&args, sizeof(args), &chan->gart);
ret = nvif_object_ctor(&chan->user, "abi16ChanGartCtxDma", gart,
NV_DMA_IN_MEMORY, &args, sizeof(args),
&chan->gart);
if (ret)
return ret;
}
@ -453,7 +457,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
/* allocate software object class (used for fences on <= nv05) */
if (device->info.family < NV_DEVICE_INFO_V0_CELSIUS) {
ret = nvif_object_init(&chan->user, 0x006e,
ret = nvif_object_ctor(&chan->user, "abi16NvswFence", 0x006e,
NVIF_CLASS_SW_NV04,
NULL, 0, &chan->nvsw);
if (ret)

4
drivers/gpu/drm/nouveau/nouveau_debugfs.c
View File

@ -260,7 +260,7 @@ nouveau_debugfs_init(struct nouveau_drm *drm)
if (!drm->debugfs)
return -ENOMEM;
ret = nvif_object_init(&drm->client.device.object, 0,
ret = nvif_object_ctor(&drm->client.device.object, "debugfsCtrl", 0,
NVIF_CLASS_CONTROL, NULL, 0,
&drm->debugfs->ctrl);
if (ret)
@ -273,7 +273,7 @@ void
nouveau_debugfs_fini(struct nouveau_drm *drm)
{
if (drm->debugfs && drm->debugfs->ctrl.priv)
nvif_object_fini(&drm->debugfs->ctrl);
nvif_object_dtor(&drm->debugfs->ctrl);
kfree(drm->debugfs);
drm->debugfs = NULL;

16
drivers/gpu/drm/nouveau/nouveau_drm.c
View File

@ -290,7 +290,7 @@ static void
nouveau_accel_ce_fini(struct nouveau_drm *drm)
{
nouveau_channel_idle(drm->cechan);
nvif_object_fini(&drm->ttm.copy);
nvif_object_dtor(&drm->ttm.copy);
nouveau_channel_del(&drm->cechan);
}
@ -328,9 +328,9 @@ static void
nouveau_accel_gr_fini(struct nouveau_drm *drm)
{
nouveau_channel_idle(drm->channel);
nvif_object_fini(&drm->ntfy);
nvif_object_dtor(&drm->ntfy);
nvkm_gpuobj_del(&drm->notify);
nvif_object_fini(&drm->nvsw);
nvif_object_dtor(&drm->nvsw);
nouveau_channel_del(&drm->channel);
}
@ -363,9 +363,9 @@ nouveau_accel_gr_init(struct nouveau_drm *drm)
* on TNT/TNT2 HW that lacks any kind of support in host.
*/
if (device->info.family < NV_DEVICE_INFO_V0_TESLA) {
ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
nouveau_abi16_swclass(drm), NULL, 0,
&drm->nvsw);
ret = nvif_object_ctor(&drm->channel->user, "drmNvsw",
NVDRM_NVSW, nouveau_abi16_swclass(drm),
NULL, 0, &drm->nvsw);
if (ret == 0) {
ret = RING_SPACE(drm->channel, 2);
if (ret == 0) {
@ -394,8 +394,8 @@ nouveau_accel_gr_init(struct nouveau_drm *drm)
return;
}
ret = nvif_object_init(&drm->channel->user, NvNotify0,
NV_DMA_IN_MEMORY,
ret = nvif_object_ctor(&drm->channel->user, "drmM2mfNtfy",
NvNotify0, NV_DMA_IN_MEMORY,
&(struct nv_dma_v0) {
.target = NV_DMA_V0_TARGET_VRAM,
.access = NV_DMA_V0_ACCESS_RDWR,

14
drivers/gpu/drm/nouveau/nouveau_fbcon.c
View File

@ -256,13 +256,13 @@ nouveau_fbcon_accel_fini(struct drm_device *dev)
fbcon->helper.fbdev->flags |= FBINFO_HWACCEL_DISABLED;
console_unlock();
nouveau_channel_idle(drm->channel);
nvif_object_fini(&fbcon->twod);
nvif_object_fini(&fbcon->blit);
nvif_object_fini(&fbcon->gdi);
nvif_object_fini(&fbcon->patt);
nvif_object_fini(&fbcon->rop);
nvif_object_fini(&fbcon->clip);
nvif_object_fini(&fbcon->surf2d);
nvif_object_dtor(&fbcon->twod);
nvif_object_dtor(&fbcon->blit);
nvif_object_dtor(&fbcon->gdi);
nvif_object_dtor(&fbcon->patt);
nvif_object_dtor(&fbcon->rop);
nvif_object_dtor(&fbcon->clip);
nvif_object_dtor(&fbcon->surf2d);
}
}

6
drivers/gpu/drm/nouveau/nouveau_svm.c
View File

@ -905,7 +905,7 @@ nouveau_svm_fault_buffer_dtor(struct nouveau_svm *svm, int id)
nouveau_svm_fault_buffer_fini(svm, id);
nvif_notify_fini(&buffer->notify);
nvif_object_fini(&buffer->object);
nvif_object_dtor(&buffer->object);
}
static int
@ -919,8 +919,8 @@ nouveau_svm_fault_buffer_ctor(struct nouveau_svm *svm, s32 oclass, int id)
buffer->id = id;
ret = nvif_object_init(device, 0, oclass, &args, sizeof(args),
&buffer->object);
ret = nvif_object_ctor(device, "svmFaultBuffer", 0, oclass, &args,
sizeof(args), &buffer->object);
if (ret < 0) {
SVM_ERR(svm, "Fault buffer allocation failed: %d", ret);
return ret;

20
drivers/gpu/drm/nouveau/nv04_fbcon.c
View File

@ -168,33 +168,33 @@ nv04_fbcon_accel_init(struct fb_info *info)
return -EINVAL;
}
ret = nvif_object_init(&chan->user, 0x0062,
ret = nvif_object_ctor(&chan->user, "fbconCtxSurf2d", 0x0062,
device->info.family >= NV_DEVICE_INFO_V0_CELSIUS ?
0x0062 : 0x0042, NULL, 0, &nfbdev->surf2d);
if (ret)
return ret;
ret = nvif_object_init(&chan->user, 0x0019, 0x0019, NULL, 0,
&nfbdev->clip);
ret = nvif_object_ctor(&chan->user, "fbconCtxClip", 0x0019, 0x0019,
NULL, 0, &nfbdev->clip);
if (ret)
return ret;
ret = nvif_object_init(&chan->user, 0x0043, 0x0043, NULL, 0,
&nfbdev->rop);
ret = nvif_object_ctor(&chan->user, "fbconCtxRop", 0x0043, 0x0043,
NULL, 0, &nfbdev->rop);
if (ret)
return ret;
ret = nvif_object_init(&chan->user, 0x0044, 0x0044, NULL, 0,
&nfbdev->patt);
ret = nvif_object_ctor(&chan->user, "fbconCtxPatt", 0x0044, 0x0044,
NULL, 0, &nfbdev->patt);
if (ret)
return ret;
ret = nvif_object_init(&chan->user, 0x004a, 0x004a, NULL, 0,
&nfbdev->gdi);
ret = nvif_object_ctor(&chan->user, "fbconGdiRectText", 0x004a, 0x004a,
NULL, 0, &nfbdev->gdi);
if (ret)
return ret;
ret = nvif_object_init(&chan->user, 0x005f,
ret = nvif_object_ctor(&chan->user, "fbconImageBlit", 0x005f,
device->info.chipset >= 0x11 ? 0x009f : 0x005f,
NULL, 0, &nfbdev->blit);
if (ret)

2
drivers/gpu/drm/nouveau/nv10_fence.c
View File

@ -58,7 +58,7 @@ nv10_fence_context_del(struct nouveau_channel *chan)
{
struct nv10_fence_chan *fctx = chan->fence;
nouveau_fence_context_del(&fctx->base);
nvif_object_fini(&fctx->sema);
nvif_object_dtor(&fctx->sema);
chan->fence = NULL;
nouveau_fence_context_free(&fctx->base);
}

3
drivers/gpu/drm/nouveau/nv17_fence.c
View File

@ -90,7 +90,8 @@ nv17_fence_context_new(struct nouveau_channel *chan)
fctx->base.read = nv10_fence_read;
fctx->base.sync = nv17_fence_sync;
ret = nvif_object_init(&chan->user, NvSema, NV_DMA_FROM_MEMORY,
ret = nvif_object_ctor(&chan->user, "fenceCtxDma", NvSema,
NV_DMA_FROM_MEMORY,
&(struct nv_dma_v0) {
.target = NV_DMA_V0_TARGET_VRAM,
.access = NV_DMA_V0_ACCESS_RDWR,

4
drivers/gpu/drm/nouveau/nv50_fbcon.c
View File

@ -181,8 +181,8 @@ nv50_fbcon_accel_init(struct fb_info *info)
return -EINVAL;
}
ret = nvif_object_init(&chan->user, 0x502d, 0x502d, NULL, 0,
&nfbdev->twod);
ret = nvif_object_ctor(&chan->user, "fbconTwoD", 0x502d, 0x502d,
NULL, 0, &nfbdev->twod);
if (ret)
return ret;

3
drivers/gpu/drm/nouveau/nv50_fence.c
View File

@ -51,7 +51,8 @@ nv50_fence_context_new(struct nouveau_channel *chan)
fctx->base.read = nv10_fence_read;
fctx->base.sync = nv17_fence_sync;
ret = nvif_object_init(&chan->user, NvSema, NV_DMA_IN_MEMORY,
ret = nvif_object_ctor(&chan->user, "fenceCtxDma", NvSema,
NV_DMA_IN_MEMORY,
&(struct nv_dma_v0) {
.target = NV_DMA_V0_TARGET_VRAM,
.access = NV_DMA_V0_ACCESS_RDWR,

4
drivers/gpu/drm/nouveau/nvc0_fbcon.c
View File

@ -154,8 +154,8 @@ nvc0_fbcon_accel_init(struct fb_info *info)
struct nouveau_channel *chan = drm->channel;
int ret, format;
ret = nvif_object_init(&chan->user, 0x902d, 0x902d, NULL, 0,
&nfbdev->twod);
ret = nvif_object_ctor(&chan->user, "fbconTwoD", 0x902d, 0x902d,
NULL, 0, &nfbdev->twod);
if (ret)
return ret;

7
drivers/gpu/drm/nouveau/nvif/client.c
View File

@ -50,7 +50,7 @@ nvif_client_resume(struct nvif_client *client)
void
nvif_client_dtor(struct nvif_client *client)
{
nvif_object_fini(&client->object);
nvif_object_dtor(&client->object);
if (client->driver) {
if (client->driver->fini)
client->driver->fini(client->object.priv);
@ -70,8 +70,9 @@ nvif_client_ctor(struct nvif_client *parent, const char *name, u64 device,
int ret;
strncpy(args.name, name, sizeof(args.name));
ret = nvif_object_init(parent != client ? &parent->object : NULL,
0, NVIF_CLASS_CLIENT, &args, sizeof(args),
ret = nvif_object_ctor(parent != client ? &parent->object : NULL,
name ? name : "nvifClient", 0,
NVIF_CLASS_CLIENT, &args, sizeof(args),
&client->object);
if (ret)
return ret;

6
drivers/gpu/drm/nouveau/nvif/device.c
View File

@ -44,15 +44,15 @@ nvif_device_fini(struct nvif_device *device)
nvif_user_fini(device);
kfree(device->runlist);
device->runlist = NULL;
nvif_object_fini(&device->object);
nvif_object_dtor(&device->object);
}
int
nvif_device_init(struct nvif_object *parent, u32 handle, s32 oclass,
void *data, u32 size, struct nvif_device *device)
{
int ret = nvif_object_init(parent, handle, oclass, data, size,
&device->object);
int ret = nvif_object_ctor(parent, "nvifDevice", handle,
oclass, data, size, &device->object);
device->runlist = NULL;
device->user.func = NULL;
if (ret == 0) {

6
drivers/gpu/drm/nouveau/nvif/disp.c
View File

@ -27,7 +27,7 @@
void
nvif_disp_dtor(struct nvif_disp *disp)
{
nvif_object_fini(&disp->object);
nvif_object_dtor(&disp->object);
}
int
@ -56,6 +56,6 @@ nvif_disp_ctor(struct nvif_device *device, s32 oclass, struct nvif_disp *disp)
if (cid < 0)
return cid;
return nvif_object_init(&device->object, 0, disps[cid].oclass,
NULL, 0, &disp->object);
return nvif_object_ctor(&device->object, "nvifDisp", 0,
disps[cid].oclass, NULL, 0, &disp->object);
}

4
drivers/gpu/drm/nouveau/nvif/mem.c
View File

@ -40,7 +40,7 @@ nvif_mem_init_map(struct nvif_mmu *mmu, u8 type, u64 size, struct nvif_mem *mem)
void
nvif_mem_fini(struct nvif_mem *mem)
{
nvif_object_fini(&mem->object);
nvif_object_dtor(&mem->object);
}
int
@ -67,7 +67,7 @@ nvif_mem_init_type(struct nvif_mmu *mmu, s32 oclass, int type, u8 page,
args->size = size;
memcpy(args->data, argv, argc);
ret = nvif_object_init(&mmu->object, 0, oclass, args,
ret = nvif_object_ctor(&mmu->object, "nvifMem", 0, oclass, args,
sizeof(*args) + argc, &mem->object);
if (ret == 0) {
mem->type = mmu->type[type].type;

6
drivers/gpu/drm/nouveau/nvif/mmu.c
View File

@ -30,7 +30,7 @@ nvif_mmu_fini(struct nvif_mmu *mmu)
kfree(mmu->kind);
kfree(mmu->type);
kfree(mmu->heap);
nvif_object_fini(&mmu->object);
nvif_object_dtor(&mmu->object);
}
int
@ -50,8 +50,8 @@ nvif_mmu_init(struct nvif_object *parent, s32 oclass, struct nvif_mmu *mmu)
mmu->type = NULL;
mmu->kind = NULL;
ret = nvif_object_init(parent, 0, oclass, &args, sizeof(args),
&mmu->object);
ret = nvif_object_ctor(parent, "nvifMmu", 0, oclass, &args,
sizeof(args), &mmu->object);
if (ret)
goto done;

11
drivers/gpu/drm/nouveau/nvif/object.c
View File

@ -242,7 +242,7 @@ nvif_object_map(struct nvif_object *object, void *argv, u32 argc)
}
void
nvif_object_fini(struct nvif_object *object)
nvif_object_dtor(struct nvif_object *object)
{
struct {
struct nvif_ioctl_v0 ioctl;
@ -260,8 +260,8 @@ nvif_object_fini(struct nvif_object *object)
}
int
nvif_object_init(struct nvif_object *parent, u32 handle, s32 oclass,
void *data, u32 size, struct nvif_object *object)
nvif_object_ctor(struct nvif_object *parent, const char *name, u32 handle,
s32 oclass, void *data, u32 size, struct nvif_object *object)
{
struct {
struct nvif_ioctl_v0 ioctl;
@ -270,6 +270,7 @@ nvif_object_init(struct nvif_object *parent, u32 handle, s32 oclass,
int ret = 0;
object->client = NULL;
object->name = name ? name : "nvifObject";
object->handle = handle;
object->oclass = oclass;
object->map.ptr = NULL;
@ -277,7 +278,7 @@ nvif_object_init(struct nvif_object *parent, u32 handle, s32 oclass,
if (parent) {
if (!(args = kmalloc(sizeof(*args) + size, GFP_KERNEL))) {
nvif_object_fini(object);
nvif_object_dtor(object);
return -ENOMEM;
}
@ -300,6 +301,6 @@ nvif_object_init(struct nvif_object *parent, u32 handle, s32 oclass,
}
if (ret)
nvif_object_fini(object);
nvif_object_dtor(object);
return ret;
}

5
drivers/gpu/drm/nouveau/nvif/user.c
View File

@ -28,7 +28,7 @@ void
nvif_user_fini(struct nvif_device *device)
{
if (device->user.func) {
nvif_object_fini(&device->user.object);
nvif_object_dtor(&device->user.object);
device->user.func = NULL;
}
}
@ -53,7 +53,8 @@ nvif_user_init(struct nvif_device *device)
if (cid < 0)
return cid;
ret = nvif_object_init(&device->object, 0, users[cid].oclass, NULL, 0,
ret = nvif_object_ctor(&device->object, "nvifUsermode",
0, users[cid].oclass, NULL, 0,
&device->user.object);
if (ret)
return ret;

4
drivers/gpu/drm/nouveau/nvif/vmm.c
View File

@ -108,7 +108,7 @@ void
nvif_vmm_fini(struct nvif_vmm *vmm)
{
kfree(vmm->page);
nvif_object_fini(&vmm->object);
nvif_object_dtor(&vmm->object);
}
int
@ -130,7 +130,7 @@ nvif_vmm_init(struct nvif_mmu *mmu, s32 oclass, bool managed, u64 addr,
args->size = size;
memcpy(args->data, argv, argc);
ret = nvif_object_init(&mmu->object, 0, oclass, args, argn,
ret = nvif_object_ctor(&mmu->object, "nvifVmm", 0, oclass, args, argn,
&vmm->object);
if (ret)
goto done;