ath9k: remove dead code

Clean up some orphaned code lines containing
* unused variables (not referenced / write-only)
* non-implemented function prototypes

Signed-off-by: Zefir Kurtisi <zefir.kurtisi@neratec.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Zefir Kurtisi 2012-04-10 13:18:04 +02:00 committed by John W. Linville
parent 35bcd59113
commit 997002785e
6 changed files with 0 additions and 16 deletions

View File

@ -245,7 +245,6 @@ static int ar5008_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
REG_WRITE(ah, AR_PHY(0x37), reg32);
ah->curchan = chan;
ah->curchan_rad_index = -1;
return 0;
}

View File

@ -152,7 +152,6 @@ static int ar9002_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
REG_WRITE(ah, AR_PHY_SYNTH_CONTROL, reg32);
ah->curchan = chan;
ah->curchan_rad_index = -1;
return 0;
}

View File

@ -5060,8 +5060,6 @@ static void ath9k_hw_ar9300_set_txpower(struct ath_hw *ah,
i, targetPowerValT2[i]);
}
ah->txpower_limit = regulatory->max_power_level;
/* Write target power array to registers */
ar9003_hw_tx_power_regwrite(ah, targetPowerValT2);
ar9003_hw_calibration_apply(ah, chan->channel);

View File

@ -152,7 +152,6 @@ static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
REG_WRITE(ah, AR_PHY_65NM_CH0_SYNTH7, reg32);
ah->curchan = chan;
ah->curchan_rad_index = -1;
return 0;
}

View File

@ -445,7 +445,6 @@ static void ath9k_hw_init_defaults(struct ath_hw *ah)
AR_STA_ID1_MCAST_KSRCH;
if (AR_SREV_9100(ah))
ah->sta_id1_defaults |= AR_STA_ID1_AR9100_BA_FIX;
ah->enable_32kHz_clock = DONT_USE_32KHZ;
ah->slottime = ATH9K_SLOT_TIME_9;
ah->globaltxtimeout = (u32) -1;
ah->power_mode = ATH9K_PM_UNDEFINED;

View File

@ -708,7 +708,6 @@ struct ath_hw {
struct ar5416Stats stats;
struct ath9k_tx_queue_info txq[ATH9K_NUM_TX_QUEUES];
int16_t curchan_rad_index;
enum ath9k_int imask;
u32 imrs2_reg;
u32 txok_interrupt_mask;
@ -762,11 +761,6 @@ struct ath_hw {
u32 sta_id1_defaults;
u32 misc_mode;
enum {
AUTO_32KHZ,
USE_32KHZ,
DONT_USE_32KHZ,
} enable_32kHz_clock;
/* Private to hardware code */
struct ath_hw_private_ops private_ops;
@ -783,7 +777,6 @@ struct ath_hw {
u32 *analogBank7Data;
u32 *bank6Temp;
u8 txpower_limit;
int coverage_class;
u32 slottime;
u32 globaltxtimeout;
@ -848,7 +841,6 @@ struct ath_hw {
struct ath_gen_timer_table hw_gen_timers;
struct ar9003_txs *ts_ring;
void *ts_start;
u32 ts_paddr_start;
u32 ts_paddr_end;
u16 ts_tail;
@ -915,7 +907,6 @@ static inline u8 get_streams(int mask)
}
/* Initialization, Detach, Reset */
const char *ath9k_hw_probe(u16 vendorid, u16 devid);
void ath9k_hw_deinit(struct ath_hw *ah);
int ath9k_hw_init(struct ath_hw *ah);
int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
@ -1011,7 +1002,6 @@ int ar9003_paprd_create_curve(struct ath_hw *ah,
int ar9003_paprd_setup_gain_table(struct ath_hw *ah, int chain);
int ar9003_paprd_init_table(struct ath_hw *ah);
bool ar9003_paprd_is_done(struct ath_hw *ah);
void ar9003_hw_set_paprd_txdesc(struct ath_hw *ah, void *ds, u8 chains);
/* Hardware family op attach helpers */
void ar5008_hw_attach_phy_ops(struct ath_hw *ah);