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Merge tag 'drm-intel-fixes-2024-08-29' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-fixes
- Fix #11195: The external display connect via USB type-C dock stays blank after re-connect the dock - Make DSI backlight work for 2G version of Lenovo Yoga Tab 3 X90F . Move ARL GuC firmware to correct version - Signed-off-by: Dave Airlie <airlied@redhat.com> From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ZtAd8WTw1xiSu_TS@jlahtine-mobl.ger.corp.intel.com
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commit
9941b5bcfe
@ -5935,6 +5935,18 @@ intel_dp_detect(struct drm_connector *connector,
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else
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status = connector_status_disconnected;
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if (status != connector_status_disconnected &&
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!intel_dp_mst_verify_dpcd_state(intel_dp))
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/*
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* This requires retrying detection for instance to re-enable
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* the MST mode that got reset via a long HPD pulse. The retry
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* will happen either via the hotplug handler's retry logic,
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* ensured by setting the connector here to SST/disconnected,
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* or via a userspace connector probing in response to the
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* hotplug uevent sent when removing the MST connectors.
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*/
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status = connector_status_disconnected;
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if (status == connector_status_disconnected) {
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memset(&intel_dp->compliance, 0, sizeof(intel_dp->compliance));
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memset(intel_connector->dp.dsc_dpcd, 0, sizeof(intel_connector->dp.dsc_dpcd));
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@ -1998,3 +1998,43 @@ bool intel_dp_mst_crtc_needs_modeset(struct intel_atomic_state *state,
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return false;
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}
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/*
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* intel_dp_mst_verify_dpcd_state - verify the MST SW enabled state wrt. the DPCD
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* @intel_dp: DP port object
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*
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* Verify if @intel_dp's MST enabled SW state matches the corresponding DPCD
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* state. A long HPD pulse - not long enough to be detected as a disconnected
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* state - could've reset the DPCD state, which requires tearing
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* down/recreating the MST topology.
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*
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* Returns %true if the SW MST enabled and DPCD states match, %false
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* otherwise.
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*/
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bool intel_dp_mst_verify_dpcd_state(struct intel_dp *intel_dp)
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{
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struct intel_display *display = to_intel_display(intel_dp);
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struct intel_connector *connector = intel_dp->attached_connector;
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struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
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struct intel_encoder *encoder = &dig_port->base;
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int ret;
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u8 val;
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if (!intel_dp->is_mst)
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return true;
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ret = drm_dp_dpcd_readb(intel_dp->mst_mgr.aux, DP_MSTM_CTRL, &val);
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/* Adjust the expected register value for SST + SideBand. */
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if (ret < 0 || val != (DP_MST_EN | DP_UP_REQ_EN | DP_UPSTREAM_IS_SRC)) {
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drm_dbg_kms(display->drm,
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"[CONNECTOR:%d:%s][ENCODER:%d:%s] MST mode got reset, removing topology (ret=%d, ctrl=0x%02x)\n",
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connector->base.base.id, connector->base.name,
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encoder->base.base.id, encoder->base.name,
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ret, val);
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return false;
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}
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return true;
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}
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@ -27,5 +27,6 @@ int intel_dp_mst_atomic_check_link(struct intel_atomic_state *state,
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struct intel_link_bw_limits *limits);
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bool intel_dp_mst_crtc_needs_modeset(struct intel_atomic_state *state,
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struct intel_crtc *crtc);
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bool intel_dp_mst_verify_dpcd_state(struct intel_dp *intel_dp);
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#endif /* __INTEL_DP_MST_H__ */
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@ -1870,7 +1870,6 @@ static const struct dmi_system_id vlv_dsi_dmi_quirk_table[] = {
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/* Lenovo Yoga Tab 3 Pro YT3-X90F */
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Intel Corporation"),
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DMI_MATCH(DMI_PRODUCT_NAME, "CHERRYVIEW D1 PLATFORM"),
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DMI_MATCH(DMI_PRODUCT_VERSION, "Blade3-10A-001"),
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},
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.driver_data = (void *)vlv_dsi_lenovo_yoga_tab3_backlight_fixup,
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@ -212,6 +212,37 @@ int intel_gsc_fw_get_binary_info(struct intel_uc_fw *gsc_fw, const void *data, s
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}
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}
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if (IS_ARROWLAKE(gt->i915)) {
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bool too_old = false;
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/*
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* ARL requires a newer firmware than MTL did (102.0.10.1878) but the
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* firmware is actually common. So, need to do an explicit version check
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* here rather than using a separate table entry. And if the older
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* MTL-only version is found, then just don't use GSC rather than aborting
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* the driver load.
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*/
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if (gsc->release.major < 102) {
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too_old = true;
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} else if (gsc->release.major == 102) {
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if (gsc->release.minor == 0) {
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if (gsc->release.patch < 10) {
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too_old = true;
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} else if (gsc->release.patch == 10) {
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if (gsc->release.build < 1878)
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too_old = true;
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}
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}
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}
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if (too_old) {
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gt_info(gt, "GSC firmware too old for ARL, got %d.%d.%d.%d but need at least 102.0.10.1878",
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gsc->release.major, gsc->release.minor,
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gsc->release.patch, gsc->release.build);
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return -EINVAL;
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}
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}
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return 0;
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}
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@ -698,12 +698,18 @@ static int check_gsc_manifest(struct intel_gt *gt,
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const struct firmware *fw,
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struct intel_uc_fw *uc_fw)
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{
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int ret;
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switch (uc_fw->type) {
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case INTEL_UC_FW_TYPE_HUC:
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intel_huc_fw_get_binary_info(uc_fw, fw->data, fw->size);
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ret = intel_huc_fw_get_binary_info(uc_fw, fw->data, fw->size);
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if (ret)
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return ret;
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break;
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case INTEL_UC_FW_TYPE_GSC:
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intel_gsc_fw_get_binary_info(uc_fw, fw->data, fw->size);
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ret = intel_gsc_fw_get_binary_info(uc_fw, fw->data, fw->size);
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if (ret)
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return ret;
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break;
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default:
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MISSING_CASE(uc_fw->type);
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@ -546,6 +546,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
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#define IS_LUNARLAKE(i915) (0 && i915)
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#define IS_BATTLEMAGE(i915) (0 && i915)
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#define IS_ARROWLAKE(i915) \
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IS_SUBPLATFORM(i915, INTEL_METEORLAKE, INTEL_SUBPLATFORM_ARL)
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#define IS_DG2_G10(i915) \
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IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G10)
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#define IS_DG2_G11(i915) \
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@ -203,6 +203,10 @@ static const u16 subplatform_g12_ids[] = {
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INTEL_DG2_G12_IDS(ID),
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};
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static const u16 subplatform_arl_ids[] = {
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INTEL_ARL_IDS(ID),
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};
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static bool find_devid(u16 id, const u16 *p, unsigned int num)
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{
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for (; num; num--, p++) {
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@ -260,6 +264,9 @@ static void intel_device_info_subplatform_init(struct drm_i915_private *i915)
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} else if (find_devid(devid, subplatform_g12_ids,
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ARRAY_SIZE(subplatform_g12_ids))) {
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mask = BIT(INTEL_SUBPLATFORM_G12);
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} else if (find_devid(devid, subplatform_arl_ids,
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ARRAY_SIZE(subplatform_arl_ids))) {
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mask = BIT(INTEL_SUBPLATFORM_ARL);
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}
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GEM_BUG_ON(mask & ~INTEL_SUBPLATFORM_MASK);
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@ -127,6 +127,9 @@ enum intel_platform {
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#define INTEL_SUBPLATFORM_N 1
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#define INTEL_SUBPLATFORM_RPLU 2
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/* MTL */
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#define INTEL_SUBPLATFORM_ARL 0
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enum intel_ppgtt_type {
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INTEL_PPGTT_NONE = I915_GEM_PPGTT_NONE,
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INTEL_PPGTT_ALIASING = I915_GEM_PPGTT_ALIASING,
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@ -772,15 +772,18 @@
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INTEL_ATS_M75_IDS(MACRO__, ## __VA_ARGS__)
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/* MTL */
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#define INTEL_MTL_IDS(MACRO__, ...) \
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MACRO__(0x7D40, ## __VA_ARGS__), \
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#define INTEL_ARL_IDS(MACRO__, ...) \
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MACRO__(0x7D41, ## __VA_ARGS__), \
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MACRO__(0x7D45, ## __VA_ARGS__), \
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MACRO__(0x7D51, ## __VA_ARGS__), \
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MACRO__(0x7D67, ## __VA_ARGS__), \
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MACRO__(0x7DD1, ## __VA_ARGS__)
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#define INTEL_MTL_IDS(MACRO__, ...) \
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INTEL_ARL_IDS(MACRO__, ## __VA_ARGS__), \
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MACRO__(0x7D40, ## __VA_ARGS__), \
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MACRO__(0x7D45, ## __VA_ARGS__), \
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MACRO__(0x7D55, ## __VA_ARGS__), \
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MACRO__(0x7D60, ## __VA_ARGS__), \
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MACRO__(0x7D67, ## __VA_ARGS__), \
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MACRO__(0x7DD1, ## __VA_ARGS__), \
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MACRO__(0x7DD5, ## __VA_ARGS__)
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/* LNL */
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