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Merge branch 'x86-irq-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-irq-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, acpi/irq: Define gsi_end when X86_IO_APIC is undefined x86, irq: Kill io_apic_renumber_irq x86, acpi/irq: Handle isa irqs that are not identity mapped to gsi's. x86, ioapic: Simplify probe_nr_irqs_gsi. x86, ioapic: Optimize pin_2_irq x86, ioapic: Move nr_ioapic_registers calculation to mp_register_ioapic. x86, ioapic: In mpparse use mp_register_ioapic x86, ioapic: Teach mp_register_ioapic to compute a global gsi_end x86, ioapic: Fix the types of gsi values x86, ioapic: Fix io_apic_redir_entries to return the number of entries. x86, ioapic: Only export mp_find_ioapic and mp_find_ioapic_pin in io_apic.h x86, acpi/irq: Generalize mp_config_acpi_legacy_irqs x86, acpi/irq: Fix acpi_sci_ioapic_setup so it has both bus_irq and gsi x86, acpi/irq: pci device dev->irq is an isa irq not a gsi x86, acpi/irq: Teach acpi_get_override_irq to take a gsi not an isa_irq x86, acpi/irq: Introduce apci_isa_irq_to_gsi
This commit is contained in:
Linus Torvalds
commit
98f01720cb
@ -785,6 +785,14 @@ int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
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return 0;
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}
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int acpi_isa_irq_to_gsi(unsigned isa_irq, u32 *gsi)
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{
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if (isa_irq >= 16)
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return -1;
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*gsi = isa_irq;
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return 0;
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}
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/*
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* ACPI based hotplug CPU support
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*/
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@ -159,7 +159,6 @@ struct io_apic_irq_attr;
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extern int io_apic_set_pci_routing(struct device *dev, int irq,
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struct io_apic_irq_attr *irq_attr);
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void setup_IO_APIC_irq_extra(u32 gsi);
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extern int (*ioapic_renumber_irq)(int ioapic, int irq);
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extern void ioapic_init_mappings(void);
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extern void ioapic_insert_resources(void);
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@ -180,12 +179,13 @@ extern void ioapic_write_entry(int apic, int pin,
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extern void setup_ioapic_ids_from_mpc(void);
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struct mp_ioapic_gsi{
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int gsi_base;
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int gsi_end;
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u32 gsi_base;
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u32 gsi_end;
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};
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extern struct mp_ioapic_gsi mp_gsi_routing[];
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int mp_find_ioapic(int gsi);
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int mp_find_ioapic_pin(int ioapic, int gsi);
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extern u32 gsi_end;
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int mp_find_ioapic(u32 gsi);
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int mp_find_ioapic_pin(int ioapic, u32 gsi);
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void __init mp_register_ioapic(int id, u32 address, u32 gsi_base);
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extern void __init pre_init_apic_IRQ0(void);
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@ -197,7 +197,8 @@ static const int timer_through_8259 = 0;
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static inline void ioapic_init_mappings(void) { }
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static inline void ioapic_insert_resources(void) { }
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static inline void probe_nr_irqs_gsi(void) { }
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static inline int mp_find_ioapic(int gsi) { return 0; }
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#define gsi_end (NR_IRQS_LEGACY - 1)
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static inline int mp_find_ioapic(u32 gsi) { return 0; }
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struct io_apic_irq_attr;
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static inline int io_apic_set_pci_routing(struct device *dev, int irq,
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@ -105,16 +105,6 @@ extern void mp_config_acpi_legacy_irqs(void);
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struct device;
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extern int mp_register_gsi(struct device *dev, u32 gsi, int edge_level,
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int active_high_low);
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extern int acpi_probe_gsi(void);
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#ifdef CONFIG_X86_IO_APIC
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extern int mp_find_ioapic(int gsi);
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extern int mp_find_ioapic_pin(int ioapic, int gsi);
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#endif
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#else /* !CONFIG_ACPI: */
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static inline int acpi_probe_gsi(void)
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{
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return 0;
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}
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#endif /* CONFIG_ACPI */
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#define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS)
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@ -93,6 +93,53 @@ static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE;
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enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC;
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/*
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* ISA irqs by default are the first 16 gsis but can be
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* any gsi as specified by an interrupt source override.
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*/
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static u32 isa_irq_to_gsi[NR_IRQS_LEGACY] __read_mostly = {
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0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
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};
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static unsigned int gsi_to_irq(unsigned int gsi)
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{
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unsigned int irq = gsi + NR_IRQS_LEGACY;
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unsigned int i;
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for (i = 0; i < NR_IRQS_LEGACY; i++) {
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if (isa_irq_to_gsi[i] == gsi) {
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return i;
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}
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}
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/* Provide an identity mapping of gsi == irq
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* except on truly weird platforms that have
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* non isa irqs in the first 16 gsis.
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*/
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if (gsi >= NR_IRQS_LEGACY)
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irq = gsi;
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else
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irq = gsi_end + 1 + gsi;
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return irq;
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}
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static u32 irq_to_gsi(int irq)
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{
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unsigned int gsi;
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if (irq < NR_IRQS_LEGACY)
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gsi = isa_irq_to_gsi[irq];
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else if (irq <= gsi_end)
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gsi = irq;
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else if (irq <= (gsi_end + NR_IRQS_LEGACY))
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gsi = irq - gsi_end;
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else
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gsi = 0xffffffff;
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return gsi;
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}
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/*
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* Temporarily use the virtual area starting from FIX_IO_APIC_BASE_END,
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* to map the target physical address. The problem is that set_fixmap()
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@ -313,7 +360,7 @@ acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end)
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/*
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* Parse Interrupt Source Override for the ACPI SCI
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*/
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static void __init acpi_sci_ioapic_setup(u32 gsi, u16 polarity, u16 trigger)
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static void __init acpi_sci_ioapic_setup(u8 bus_irq, u16 polarity, u16 trigger, u32 gsi)
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{
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if (trigger == 0) /* compatible SCI trigger is level */
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trigger = 3;
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@ -333,7 +380,7 @@ static void __init acpi_sci_ioapic_setup(u32 gsi, u16 polarity, u16 trigger)
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* If GSI is < 16, this will update its flags,
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* else it will create a new mp_irqs[] entry.
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*/
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mp_override_legacy_irq(gsi, polarity, trigger, gsi);
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mp_override_legacy_irq(bus_irq, polarity, trigger, gsi);
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/*
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* stash over-ride to indicate we've been here
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@ -357,9 +404,10 @@ acpi_parse_int_src_ovr(struct acpi_subtable_header * header,
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acpi_table_print_madt_entry(header);
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if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) {
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acpi_sci_ioapic_setup(intsrc->global_irq,
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acpi_sci_ioapic_setup(intsrc->source_irq,
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intsrc->inti_flags & ACPI_MADT_POLARITY_MASK,
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(intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2);
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(intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2,
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intsrc->global_irq);
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return 0;
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}
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@ -448,7 +496,7 @@ void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger)
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int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
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{
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*irq = gsi;
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*irq = gsi_to_irq(gsi);
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#ifdef CONFIG_X86_IO_APIC
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if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC)
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@ -458,6 +506,14 @@ int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
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return 0;
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}
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int acpi_isa_irq_to_gsi(unsigned isa_irq, u32 *gsi)
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{
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if (isa_irq >= 16)
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return -1;
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*gsi = irq_to_gsi(isa_irq);
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return 0;
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}
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/*
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* success: return IRQ number (>=0)
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* failure: return < 0
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@ -482,7 +538,7 @@ int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
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plat_gsi = mp_register_gsi(dev, gsi, trigger, polarity);
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}
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#endif
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irq = plat_gsi;
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irq = gsi_to_irq(plat_gsi);
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return irq;
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}
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@ -867,29 +923,6 @@ static int __init acpi_parse_madt_lapic_entries(void)
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extern int es7000_plat;
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#endif
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int __init acpi_probe_gsi(void)
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{
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int idx;
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int gsi;
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int max_gsi = 0;
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if (acpi_disabled)
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return 0;
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if (!acpi_ioapic)
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return 0;
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max_gsi = 0;
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for (idx = 0; idx < nr_ioapics; idx++) {
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gsi = mp_gsi_routing[idx].gsi_end;
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if (gsi > max_gsi)
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max_gsi = gsi;
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}
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return max_gsi + 1;
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}
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static void assign_to_mp_irq(struct mpc_intsrc *m,
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struct mpc_intsrc *mp_irq)
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{
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@ -947,13 +980,13 @@ void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
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mp_irq.dstirq = pin; /* INTIN# */
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save_mp_irq(&mp_irq);
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isa_irq_to_gsi[bus_irq] = gsi;
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}
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void __init mp_config_acpi_legacy_irqs(void)
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{
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int i;
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int ioapic;
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unsigned int dstapic;
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struct mpc_intsrc mp_irq;
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#if defined (CONFIG_MCA) || defined (CONFIG_EISA)
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@ -973,20 +1006,28 @@ void __init mp_config_acpi_legacy_irqs(void)
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return;
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#endif
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/*
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* Locate the IOAPIC that manages the ISA IRQs (0-15).
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*/
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ioapic = mp_find_ioapic(0);
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if (ioapic < 0)
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return;
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dstapic = mp_ioapics[ioapic].apicid;
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/*
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* Use the default configuration for the IRQs 0-15. Unless
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* overridden by (MADT) interrupt source override entries.
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*/
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for (i = 0; i < 16; i++) {
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int ioapic, pin;
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unsigned int dstapic;
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int idx;
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u32 gsi;
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/* Locate the gsi that irq i maps to. */
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if (acpi_isa_irq_to_gsi(i, &gsi))
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continue;
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/*
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* Locate the IOAPIC that manages the ISA IRQ.
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*/
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ioapic = mp_find_ioapic(gsi);
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if (ioapic < 0)
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continue;
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pin = mp_find_ioapic_pin(ioapic, gsi);
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dstapic = mp_ioapics[ioapic].apicid;
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for (idx = 0; idx < mp_irq_entries; idx++) {
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struct mpc_intsrc *irq = mp_irqs + idx;
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@ -996,7 +1037,7 @@ void __init mp_config_acpi_legacy_irqs(void)
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break;
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/* Do we already have a mapping for this IOAPIC pin */
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if (irq->dstapic == dstapic && irq->dstirq == i)
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if (irq->dstapic == dstapic && irq->dstirq == pin)
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break;
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}
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@ -1011,7 +1052,7 @@ void __init mp_config_acpi_legacy_irqs(void)
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mp_irq.dstapic = dstapic;
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mp_irq.irqtype = mp_INT;
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mp_irq.srcbusirq = i; /* Identity mapped */
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mp_irq.dstirq = i;
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mp_irq.dstirq = pin;
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save_mp_irq(&mp_irq);
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}
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@ -1076,11 +1117,6 @@ int mp_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
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ioapic_pin = mp_find_ioapic_pin(ioapic, gsi);
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#ifdef CONFIG_X86_32
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if (ioapic_renumber_irq)
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gsi = ioapic_renumber_irq(ioapic, gsi);
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#endif
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if (ioapic_pin > MP_MAX_IOAPIC_PIN) {
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printk(KERN_ERR "Invalid reference to IOAPIC pin "
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"%d-%d\n", mp_ioapics[ioapic].apicid,
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@ -1094,7 +1130,7 @@ int mp_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
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set_io_apic_irq_attr(&irq_attr, ioapic, ioapic_pin,
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trigger == ACPI_EDGE_SENSITIVE ? 0 : 1,
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polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
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io_apic_set_pci_routing(dev, gsi, &irq_attr);
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io_apic_set_pci_routing(dev, gsi_to_irq(gsi), &irq_attr);
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return gsi;
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}
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@ -1154,7 +1190,8 @@ static int __init acpi_parse_madt_ioapic_entries(void)
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* pretend we got one so we can set the SCI flags.
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*/
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if (!acpi_sci_override_gsi)
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acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0);
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acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0,
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acpi_gbl_FADT.sci_interrupt);
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/* Fill in identity legacy mappings where no override */
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mp_config_acpi_legacy_irqs();
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@ -131,24 +131,6 @@ int es7000_plat;
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static unsigned int base;
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static int
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es7000_rename_gsi(int ioapic, int gsi)
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{
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if (es7000_plat == ES7000_ZORRO)
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return gsi;
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if (!base) {
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int i;
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for (i = 0; i < nr_ioapics; i++)
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base += nr_ioapic_registers[i];
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}
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if (!ioapic && (gsi < 16))
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gsi += base;
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return gsi;
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}
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static int __cpuinit wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip)
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{
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unsigned long vect = 0, psaival = 0;
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@ -190,7 +172,6 @@ static void setup_unisys(void)
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es7000_plat = ES7000_ZORRO;
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else
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es7000_plat = ES7000_CLASSIC;
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ioapic_renumber_irq = es7000_rename_gsi;
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}
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/*
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@ -89,6 +89,9 @@ int nr_ioapics;
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/* IO APIC gsi routing info */
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struct mp_ioapic_gsi mp_gsi_routing[MAX_IO_APICS];
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/* The last gsi number used */
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u32 gsi_end;
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/* MP IRQ source entries */
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struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES];
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@ -1013,10 +1016,9 @@ static inline int irq_trigger(int idx)
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return MPBIOS_trigger(idx);
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}
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int (*ioapic_renumber_irq)(int ioapic, int irq);
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static int pin_2_irq(int idx, int apic, int pin)
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{
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int irq, i;
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int irq;
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int bus = mp_irqs[idx].srcbus;
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/*
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@ -1028,18 +1030,12 @@ static int pin_2_irq(int idx, int apic, int pin)
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if (test_bit(bus, mp_bus_not_pci)) {
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irq = mp_irqs[idx].srcbusirq;
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} else {
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/*
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* PCI IRQs are mapped in order
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*/
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i = irq = 0;
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while (i < apic)
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irq += nr_ioapic_registers[i++];
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irq += pin;
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/*
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* For MPS mode, so far only needed by ES7000 platform
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*/
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if (ioapic_renumber_irq)
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irq = ioapic_renumber_irq(apic, irq);
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u32 gsi = mp_gsi_routing[apic].gsi_base + pin;
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if (gsi >= NR_IRQS_LEGACY)
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irq = gsi;
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else
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irq = gsi_end + 1 + gsi;
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}
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#ifdef CONFIG_X86_32
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@ -1950,20 +1946,8 @@ static struct { int pin, apic; } ioapic_i8259 = { -1, -1 };
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|
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void __init enable_IO_APIC(void)
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{
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union IO_APIC_reg_01 reg_01;
|
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int i8259_apic, i8259_pin;
|
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int apic;
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unsigned long flags;
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/*
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* The number of IO-APIC IRQ registers (== #pins):
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*/
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for (apic = 0; apic < nr_ioapics; apic++) {
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raw_spin_lock_irqsave(&ioapic_lock, flags);
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reg_01.raw = io_apic_read(apic, 1);
|
||||
raw_spin_unlock_irqrestore(&ioapic_lock, flags);
|
||||
nr_ioapic_registers[apic] = reg_01.bits.entries+1;
|
||||
}
|
||||
|
||||
if (!legacy_pic->nr_legacy_irqs)
|
||||
return;
|
||||
@ -3858,27 +3842,20 @@ int __init io_apic_get_redir_entries (int ioapic)
|
||||
reg_01.raw = io_apic_read(ioapic, 1);
|
||||
raw_spin_unlock_irqrestore(&ioapic_lock, flags);
|
||||
|
||||
return reg_01.bits.entries;
|
||||
/* The register returns the maximum index redir index
|
||||
* supported, which is one less than the total number of redir
|
||||
* entries.
|
||||
*/
|
||||
return reg_01.bits.entries + 1;
|
||||
}
|
||||
|
||||
void __init probe_nr_irqs_gsi(void)
|
||||
{
|
||||
int nr = 0;
|
||||
int nr;
|
||||
|
||||
nr = acpi_probe_gsi();
|
||||
if (nr > nr_irqs_gsi) {
|
||||
nr = gsi_end + 1 + NR_IRQS_LEGACY;
|
||||
if (nr > nr_irqs_gsi)
|
||||
nr_irqs_gsi = nr;
|
||||
} else {
|
||||
/* for acpi=off or acpi is not compiled in */
|
||||
int idx;
|
||||
|
||||
nr = 0;
|
||||
for (idx = 0; idx < nr_ioapics; idx++)
|
||||
nr += io_apic_get_redir_entries(idx) + 1;
|
||||
|
||||
if (nr > nr_irqs_gsi)
|
||||
nr_irqs_gsi = nr;
|
||||
}
|
||||
|
||||
printk(KERN_DEBUG "nr_irqs_gsi: %d\n", nr_irqs_gsi);
|
||||
}
|
||||
@ -4085,22 +4062,27 @@ int __init io_apic_get_version(int ioapic)
|
||||
return reg_01.bits.version;
|
||||
}
|
||||
|
||||
int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity)
|
||||
int acpi_get_override_irq(u32 gsi, int *trigger, int *polarity)
|
||||
{
|
||||
int i;
|
||||
int ioapic, pin, idx;
|
||||
|
||||
if (skip_ioapic_setup)
|
||||
return -1;
|
||||
|
||||
for (i = 0; i < mp_irq_entries; i++)
|
||||
if (mp_irqs[i].irqtype == mp_INT &&
|
||||
mp_irqs[i].srcbusirq == bus_irq)
|
||||
break;
|
||||
if (i >= mp_irq_entries)
|
||||
ioapic = mp_find_ioapic(gsi);
|
||||
if (ioapic < 0)
|
||||
return -1;
|
||||
|
||||
*trigger = irq_trigger(i);
|
||||
*polarity = irq_polarity(i);
|
||||
pin = mp_find_ioapic_pin(ioapic, gsi);
|
||||
if (pin < 0)
|
||||
return -1;
|
||||
|
||||
idx = find_irq_entry(ioapic, pin, mp_INT);
|
||||
if (idx < 0)
|
||||
return -1;
|
||||
|
||||
*trigger = irq_trigger(idx);
|
||||
*polarity = irq_polarity(idx);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -4241,7 +4223,7 @@ void __init ioapic_insert_resources(void)
|
||||
}
|
||||
}
|
||||
|
||||
int mp_find_ioapic(int gsi)
|
||||
int mp_find_ioapic(u32 gsi)
|
||||
{
|
||||
int i = 0;
|
||||
|
||||
@ -4256,7 +4238,7 @@ int mp_find_ioapic(int gsi)
|
||||
return -1;
|
||||
}
|
||||
|
||||
int mp_find_ioapic_pin(int ioapic, int gsi)
|
||||
int mp_find_ioapic_pin(int ioapic, u32 gsi)
|
||||
{
|
||||
if (WARN_ON(ioapic == -1))
|
||||
return -1;
|
||||
@ -4284,6 +4266,7 @@ static int bad_ioapic(unsigned long address)
|
||||
void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
|
||||
{
|
||||
int idx = 0;
|
||||
int entries;
|
||||
|
||||
if (bad_ioapic(address))
|
||||
return;
|
||||
@ -4302,9 +4285,17 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
|
||||
* Build basic GSI lookup table to facilitate gsi->io_apic lookups
|
||||
* and to prevent reprogramming of IOAPIC pins (PCI GSIs).
|
||||
*/
|
||||
entries = io_apic_get_redir_entries(idx);
|
||||
mp_gsi_routing[idx].gsi_base = gsi_base;
|
||||
mp_gsi_routing[idx].gsi_end = gsi_base +
|
||||
io_apic_get_redir_entries(idx);
|
||||
mp_gsi_routing[idx].gsi_end = gsi_base + entries - 1;
|
||||
|
||||
/*
|
||||
* The number of IO-APIC IRQ registers (== #pins):
|
||||
*/
|
||||
nr_ioapic_registers[idx] = entries;
|
||||
|
||||
if (mp_gsi_routing[idx].gsi_end > gsi_end)
|
||||
gsi_end = mp_gsi_routing[idx].gsi_end;
|
||||
|
||||
printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%x, "
|
||||
"GSI %d-%d\n", idx, mp_ioapics[idx].apicid,
|
||||
|
||||
@ -115,21 +115,6 @@ static void __init MP_bus_info(struct mpc_bus *m)
|
||||
printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
|
||||
}
|
||||
|
||||
static int bad_ioapic(unsigned long address)
|
||||
{
|
||||
if (nr_ioapics >= MAX_IO_APICS) {
|
||||
printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
|
||||
"(found %d)\n", MAX_IO_APICS, nr_ioapics);
|
||||
panic("Recompile kernel with bigger MAX_IO_APICS!\n");
|
||||
}
|
||||
if (!address) {
|
||||
printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
|
||||
" found in table, skipping!\n");
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __init MP_ioapic_info(struct mpc_ioapic *m)
|
||||
{
|
||||
if (!(m->flags & MPC_APIC_USABLE))
|
||||
@ -138,15 +123,7 @@ static void __init MP_ioapic_info(struct mpc_ioapic *m)
|
||||
printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
|
||||
m->apicid, m->apicver, m->apicaddr);
|
||||
|
||||
if (bad_ioapic(m->apicaddr))
|
||||
return;
|
||||
|
||||
mp_ioapics[nr_ioapics].apicaddr = m->apicaddr;
|
||||
mp_ioapics[nr_ioapics].apicid = m->apicid;
|
||||
mp_ioapics[nr_ioapics].type = m->type;
|
||||
mp_ioapics[nr_ioapics].apicver = m->apicver;
|
||||
mp_ioapics[nr_ioapics].flags = m->flags;
|
||||
nr_ioapics++;
|
||||
mp_register_ioapic(m->apicid, m->apicaddr, gsi_end + 1);
|
||||
}
|
||||
|
||||
static void print_MP_intsrc_info(struct mpc_intsrc *m)
|
||||
|
||||
@ -81,7 +81,6 @@ static int __init sfi_parse_cpus(struct sfi_table_header *table)
|
||||
#endif /* CONFIG_X86_LOCAL_APIC */
|
||||
|
||||
#ifdef CONFIG_X86_IO_APIC
|
||||
static u32 gsi_base;
|
||||
|
||||
static int __init sfi_parse_ioapic(struct sfi_table_header *table)
|
||||
{
|
||||
@ -94,8 +93,7 @@ static int __init sfi_parse_ioapic(struct sfi_table_header *table)
|
||||
pentry = (struct sfi_apic_table_entry *)sb->pentry;
|
||||
|
||||
for (i = 0; i < num; i++) {
|
||||
mp_register_ioapic(i, pentry->phys_addr, gsi_base);
|
||||
gsi_base += io_apic_get_redir_entries(i);
|
||||
mp_register_ioapic(i, pentry->phys_addr, gsi_end + 1);
|
||||
pentry++;
|
||||
}
|
||||
|
||||
|
||||
@ -401,11 +401,13 @@ int acpi_pci_irq_enable(struct pci_dev *dev)
|
||||
* driver reported one, then use it. Exit in any case.
|
||||
*/
|
||||
if (gsi < 0) {
|
||||
u32 dev_gsi;
|
||||
dev_warn(&dev->dev, "PCI INT %c: no GSI", pin_name(pin));
|
||||
/* Interrupt Line values above 0xF are forbidden */
|
||||
if (dev->irq > 0 && (dev->irq <= 0xF)) {
|
||||
printk(" - using IRQ %d\n", dev->irq);
|
||||
acpi_register_gsi(&dev->dev, dev->irq,
|
||||
if (dev->irq > 0 && (dev->irq <= 0xF) &&
|
||||
(acpi_isa_irq_to_gsi(dev->irq, &dev_gsi) == 0)) {
|
||||
printk(" - using ISA IRQ %d\n", dev->irq);
|
||||
acpi_register_gsi(&dev->dev, dev_gsi,
|
||||
ACPI_LEVEL_SENSITIVE,
|
||||
ACPI_ACTIVE_LOW);
|
||||
return 0;
|
||||
|
||||
@ -116,11 +116,12 @@ extern unsigned long acpi_realmode_flags;
|
||||
|
||||
int acpi_register_gsi (struct device *dev, u32 gsi, int triggering, int polarity);
|
||||
int acpi_gsi_to_irq (u32 gsi, unsigned int *irq);
|
||||
int acpi_isa_irq_to_gsi (unsigned isa_irq, u32 *gsi);
|
||||
|
||||
#ifdef CONFIG_X86_IO_APIC
|
||||
extern int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity);
|
||||
extern int acpi_get_override_irq(u32 gsi, int *trigger, int *polarity);
|
||||
#else
|
||||
#define acpi_get_override_irq(bus, trigger, polarity) (-1)
|
||||
#define acpi_get_override_irq(gsi, trigger, polarity) (-1)
|
||||
#endif
|
||||
/*
|
||||
* This function undoes the effect of one call to acpi_register_gsi().
|
||||
|
||||
Loading…
Reference in New Issue
Block a user