mirror of
https://github.com/torvalds/linux.git
synced 2024-12-23 19:31:53 +00:00
Merge branch 'hwmod_data_devel_3.3' of git://git.pwsan.com/linux-2.6 into hwmod
This commit is contained in:
Tony Lindgren
commit
986b0c256b
@ -2480,6 +2480,16 @@ static struct clk uart4_fck = {
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.recalc = &followparent_recalc,
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};
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static struct clk uart4_fck_am35xx = {
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.name = "uart4_fck",
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.ops = &clkops_omap2_dflt_wait,
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.parent = &per_48m_fck,
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.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
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.enable_bit = OMAP3430_EN_UART4_SHIFT,
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.clkdm_name = "core_l4_clkdm",
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.recalc = &followparent_recalc,
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};
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static struct clk gpt2_fck = {
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.name = "gpt2_fck",
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.ops = &clkops_omap2_dflt_wait,
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@ -3403,6 +3413,7 @@ static struct omap_clk omap3xxx_clks[] = {
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CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX),
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CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX),
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CLK(NULL, "uart4_fck", &uart4_fck, CK_36XX),
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CLK(NULL, "uart4_fck", &uart4_fck_am35xx, CK_3505 | CK_3517),
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CLK(NULL, "gpt2_fck", &gpt2_fck, CK_3XXX),
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CLK(NULL, "gpt3_fck", &gpt3_fck, CK_3XXX),
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CLK(NULL, "gpt4_fck", &gpt4_fck, CK_3XXX),
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@ -84,6 +84,8 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod;
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static struct omap_hwmod omap3xxx_mcbsp5_hwmod;
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static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod;
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static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod;
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static struct omap_hwmod omap3xxx_usb_host_hs_hwmod;
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static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod;
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/* L3 -> L4_CORE interface */
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static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = {
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@ -164,6 +166,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod;
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static struct omap_hwmod omap3xxx_uart2_hwmod;
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static struct omap_hwmod omap3xxx_uart3_hwmod;
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static struct omap_hwmod omap3xxx_uart4_hwmod;
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static struct omap_hwmod am35xx_uart4_hwmod;
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static struct omap_hwmod omap3xxx_usbhsotg_hwmod;
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/* l3_core -> usbhsotg interface */
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@ -299,6 +302,23 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* AM35xx: L4 CORE -> UART4 interface */
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static struct omap_hwmod_addr_space am35xx_uart4_addr_space[] = {
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{
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.pa_start = OMAP3_UART4_AM35XX_BASE,
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.pa_end = OMAP3_UART4_AM35XX_BASE + SZ_1K - 1,
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.flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
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},
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};
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static struct omap_hwmod_ocp_if am35xx_l4_core__uart4 = {
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.master = &omap3xxx_l4_core_hwmod,
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.slave = &am35xx_uart4_hwmod,
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.clk = "uart4_ick",
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.addr = am35xx_uart4_addr_space,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* L4 CORE -> I2C1 interface */
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static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = {
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.master = &omap3xxx_l4_core_hwmod,
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@ -1162,6 +1182,7 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = {
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SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
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SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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.clockact = CLOCKACT_TEST_ICLK,
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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@ -1309,6 +1330,39 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = {
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.class = &omap2_uart_class,
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};
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static struct omap_hwmod_irq_info am35xx_uart4_mpu_irqs[] = {
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{ .irq = INT_35XX_UART4_IRQ, },
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};
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static struct omap_hwmod_dma_info am35xx_uart4_sdma_reqs[] = {
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{ .name = "rx", .dma_req = AM35XX_DMA_UART4_RX, },
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{ .name = "tx", .dma_req = AM35XX_DMA_UART4_TX, },
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};
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static struct omap_hwmod_ocp_if *am35xx_uart4_slaves[] = {
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&am35xx_l4_core__uart4,
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};
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static struct omap_hwmod am35xx_uart4_hwmod = {
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.name = "uart4",
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.mpu_irqs = am35xx_uart4_mpu_irqs,
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.sdma_reqs = am35xx_uart4_sdma_reqs,
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.main_clk = "uart4_fck",
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.prcm = {
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.omap2 = {
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.module_offs = CORE_MOD,
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.prcm_reg_id = 1,
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.module_bit = OMAP3430_EN_UART4_SHIFT,
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.idlest_reg_id = 1,
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.idlest_idle_bit = OMAP3430_EN_UART4_SHIFT,
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},
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},
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.slaves = am35xx_uart4_slaves,
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.slaves_cnt = ARRAY_SIZE(am35xx_uart4_slaves),
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.class = &omap2_uart_class,
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};
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static struct omap_hwmod_class i2c_class = {
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.name = "i2c",
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.sysc = &i2c_sysc,
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@ -1636,7 +1690,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = {
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static struct omap_hwmod omap3xxx_i2c1_hwmod = {
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.name = "i2c1",
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.flags = HWMOD_16BIT_REG,
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.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
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.mpu_irqs = omap2_i2c1_mpu_irqs,
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.sdma_reqs = omap2_i2c1_sdma_reqs,
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.main_clk = "i2c1_fck",
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@ -1670,7 +1724,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = {
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static struct omap_hwmod omap3xxx_i2c2_hwmod = {
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.name = "i2c2",
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.flags = HWMOD_16BIT_REG,
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.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
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.mpu_irqs = omap2_i2c2_mpu_irqs,
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.sdma_reqs = omap2_i2c2_sdma_reqs,
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.main_clk = "i2c2_fck",
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@ -1715,7 +1769,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = {
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static struct omap_hwmod omap3xxx_i2c3_hwmod = {
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.name = "i2c3",
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.flags = HWMOD_16BIT_REG,
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.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
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.mpu_irqs = i2c3_mpu_irqs,
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.sdma_reqs = i2c3_sdma_reqs,
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.main_clk = "i2c3_fck",
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@ -3072,7 +3126,35 @@ static struct omap_mmc_dev_attr mmc1_dev_attr = {
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.flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
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};
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static struct omap_hwmod omap3xxx_mmc1_hwmod = {
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/* See 35xx errata 2.1.1.128 in SPRZ278F */
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static struct omap_mmc_dev_attr mmc1_pre_es3_dev_attr = {
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.flags = (OMAP_HSMMC_SUPPORTS_DUAL_VOLT |
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OMAP_HSMMC_BROKEN_MULTIBLOCK_READ),
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};
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static struct omap_hwmod omap3xxx_pre_es3_mmc1_hwmod = {
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.name = "mmc1",
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.mpu_irqs = omap34xx_mmc1_mpu_irqs,
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.sdma_reqs = omap34xx_mmc1_sdma_reqs,
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.opt_clks = omap34xx_mmc1_opt_clks,
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.opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc1_opt_clks),
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.main_clk = "mmchs1_fck",
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.prcm = {
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.omap2 = {
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.module_offs = CORE_MOD,
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.prcm_reg_id = 1,
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.module_bit = OMAP3430_EN_MMC1_SHIFT,
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.idlest_reg_id = 1,
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.idlest_idle_bit = OMAP3430_ST_MMC1_SHIFT,
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},
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},
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.dev_attr = &mmc1_pre_es3_dev_attr,
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.slaves = omap3xxx_mmc1_slaves,
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.slaves_cnt = ARRAY_SIZE(omap3xxx_mmc1_slaves),
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.class = &omap34xx_mmc_class,
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};
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static struct omap_hwmod omap3xxx_es3plus_mmc1_hwmod = {
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.name = "mmc1",
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.mpu_irqs = omap34xx_mmc1_mpu_irqs,
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.sdma_reqs = omap34xx_mmc1_sdma_reqs,
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@ -3115,7 +3197,34 @@ static struct omap_hwmod_ocp_if *omap3xxx_mmc2_slaves[] = {
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&omap3xxx_l4_core__mmc2,
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};
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static struct omap_hwmod omap3xxx_mmc2_hwmod = {
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/* See 35xx errata 2.1.1.128 in SPRZ278F */
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static struct omap_mmc_dev_attr mmc2_pre_es3_dev_attr = {
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.flags = OMAP_HSMMC_BROKEN_MULTIBLOCK_READ,
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};
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static struct omap_hwmod omap3xxx_pre_es3_mmc2_hwmod = {
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.name = "mmc2",
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.mpu_irqs = omap34xx_mmc2_mpu_irqs,
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.sdma_reqs = omap34xx_mmc2_sdma_reqs,
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.opt_clks = omap34xx_mmc2_opt_clks,
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.opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc2_opt_clks),
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.main_clk = "mmchs2_fck",
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.prcm = {
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.omap2 = {
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.module_offs = CORE_MOD,
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.prcm_reg_id = 1,
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.module_bit = OMAP3430_EN_MMC2_SHIFT,
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.idlest_reg_id = 1,
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.idlest_idle_bit = OMAP3430_ST_MMC2_SHIFT,
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},
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},
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.dev_attr = &mmc2_pre_es3_dev_attr,
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.slaves = omap3xxx_mmc2_slaves,
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.slaves_cnt = ARRAY_SIZE(omap3xxx_mmc2_slaves),
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.class = &omap34xx_mmc_class,
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};
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static struct omap_hwmod omap3xxx_es3plus_mmc2_hwmod = {
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.name = "mmc2",
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.mpu_irqs = omap34xx_mmc2_mpu_irqs,
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.sdma_reqs = omap34xx_mmc2_sdma_reqs,
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@ -3177,13 +3286,223 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = {
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.class = &omap34xx_mmc_class,
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};
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/*
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* 'usb_host_hs' class
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* high-speed multi-port usb host controller
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*/
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static struct omap_hwmod_ocp_if omap3xxx_usb_host_hs__l3_main_2 = {
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.master = &omap3xxx_usb_host_hs_hwmod,
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.slave = &omap3xxx_l3_main_hwmod,
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.clk = "core_l3_ick",
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.user = OCP_USER_MPU,
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};
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static struct omap_hwmod_class_sysconfig omap3xxx_usb_host_hs_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x0010,
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.syss_offs = 0x0014,
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.sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
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SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP |
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SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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static struct omap_hwmod_class omap3xxx_usb_host_hs_hwmod_class = {
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.name = "usb_host_hs",
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.sysc = &omap3xxx_usb_host_hs_sysc,
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};
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static struct omap_hwmod_ocp_if *omap3xxx_usb_host_hs_masters[] = {
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&omap3xxx_usb_host_hs__l3_main_2,
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};
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static struct omap_hwmod_addr_space omap3xxx_usb_host_hs_addrs[] = {
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{
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.name = "uhh",
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.pa_start = 0x48064000,
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.pa_end = 0x480643ff,
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.flags = ADDR_TYPE_RT
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},
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{
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.name = "ohci",
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.pa_start = 0x48064400,
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.pa_end = 0x480647ff,
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},
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{
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.name = "ehci",
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.pa_start = 0x48064800,
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.pa_end = 0x48064cff,
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},
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{}
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};
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static struct omap_hwmod_ocp_if omap3xxx_l4_core__usb_host_hs = {
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.master = &omap3xxx_l4_core_hwmod,
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.slave = &omap3xxx_usb_host_hs_hwmod,
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.clk = "usbhost_ick",
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.addr = omap3xxx_usb_host_hs_addrs,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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static struct omap_hwmod_ocp_if *omap3xxx_usb_host_hs_slaves[] = {
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&omap3xxx_l4_core__usb_host_hs,
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};
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static struct omap_hwmod_opt_clk omap3xxx_usb_host_hs_opt_clks[] = {
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{ .role = "ehci_logic_fck", .clk = "usbhost_120m_fck", },
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};
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static struct omap_hwmod_irq_info omap3xxx_usb_host_hs_irqs[] = {
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{ .name = "ohci-irq", .irq = 76 },
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{ .name = "ehci-irq", .irq = 77 },
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{ .irq = -1 }
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};
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static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = {
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.name = "usb_host_hs",
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.class = &omap3xxx_usb_host_hs_hwmod_class,
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.clkdm_name = "l3_init_clkdm",
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.mpu_irqs = omap3xxx_usb_host_hs_irqs,
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.main_clk = "usbhost_48m_fck",
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.prcm = {
|
||||
.omap2 = {
|
||||
.module_offs = OMAP3430ES2_USBHOST_MOD,
|
||||
.prcm_reg_id = 1,
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.module_bit = OMAP3430ES2_EN_USBHOST1_SHIFT,
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.idlest_reg_id = 1,
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.idlest_idle_bit = OMAP3430ES2_ST_USBHOST_IDLE_SHIFT,
|
||||
.idlest_stdby_bit = OMAP3430ES2_ST_USBHOST_STDBY_SHIFT,
|
||||
},
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||||
},
|
||||
.opt_clks = omap3xxx_usb_host_hs_opt_clks,
|
||||
.opt_clks_cnt = ARRAY_SIZE(omap3xxx_usb_host_hs_opt_clks),
|
||||
.slaves = omap3xxx_usb_host_hs_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap3xxx_usb_host_hs_slaves),
|
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.masters = omap3xxx_usb_host_hs_masters,
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||||
.masters_cnt = ARRAY_SIZE(omap3xxx_usb_host_hs_masters),
|
||||
|
||||
/*
|
||||
* Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock
|
||||
* id: i660
|
||||
*
|
||||
* Description:
|
||||
* In the following configuration :
|
||||
* - USBHOST module is set to smart-idle mode
|
||||
* - PRCM asserts idle_req to the USBHOST module ( This typically
|
||||
* happens when the system is going to a low power mode : all ports
|
||||
* have been suspended, the master part of the USBHOST module has
|
||||
* entered the standby state, and SW has cut the functional clocks)
|
||||
* - an USBHOST interrupt occurs before the module is able to answer
|
||||
* idle_ack, typically a remote wakeup IRQ.
|
||||
* Then the USB HOST module will enter a deadlock situation where it
|
||||
* is no more accessible nor functional.
|
||||
*
|
||||
* Workaround:
|
||||
* Don't use smart idle; use only force idle, hence HWMOD_SWSUP_SIDLE
|
||||
*/
|
||||
|
||||
/*
|
||||
* Errata: USB host EHCI may stall when entering smart-standby mode
|
||||
* Id: i571
|
||||
*
|
||||
* Description:
|
||||
* When the USBHOST module is set to smart-standby mode, and when it is
|
||||
* ready to enter the standby state (i.e. all ports are suspended and
|
||||
* all attached devices are in suspend mode), then it can wrongly assert
|
||||
* the Mstandby signal too early while there are still some residual OCP
|
||||
* transactions ongoing. If this condition occurs, the internal state
|
||||
* machine may go to an undefined state and the USB link may be stuck
|
||||
* upon the next resume.
|
||||
*
|
||||
* Workaround:
|
||||
* Don't use smart standby; use only force standby,
|
||||
* hence HWMOD_SWSUP_MSTANDBY
|
||||
*/
|
||||
|
||||
/*
|
||||
* During system boot; If the hwmod framework resets the module
|
||||
* the module will have smart idle settings; which can lead to deadlock
|
||||
* (above Errata Id:i660); so, dont reset the module during boot;
|
||||
* Use HWMOD_INIT_NO_RESET.
|
||||
*/
|
||||
|
||||
.flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
|
||||
HWMOD_INIT_NO_RESET,
|
||||
};
|
||||
|
||||
/*
|
||||
* 'usb_tll_hs' class
|
||||
* usb_tll_hs module is the adapter on the usb_host_hs ports
|
||||
*/
|
||||
static struct omap_hwmod_class_sysconfig omap3xxx_usb_tll_hs_sysc = {
|
||||
.rev_offs = 0x0000,
|
||||
.sysc_offs = 0x0010,
|
||||
.syss_offs = 0x0014,
|
||||
.sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
|
||||
SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
|
||||
SYSC_HAS_AUTOIDLE),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class omap3xxx_usb_tll_hs_hwmod_class = {
|
||||
.name = "usb_tll_hs",
|
||||
.sysc = &omap3xxx_usb_tll_hs_sysc,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_irq_info omap3xxx_usb_tll_hs_irqs[] = {
|
||||
{ .name = "tll-irq", .irq = 78 },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space omap3xxx_usb_tll_hs_addrs[] = {
|
||||
{
|
||||
.name = "tll",
|
||||
.pa_start = 0x48062000,
|
||||
.pa_end = 0x48062fff,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{}
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if omap3xxx_l4_core__usb_tll_hs = {
|
||||
.master = &omap3xxx_l4_core_hwmod,
|
||||
.slave = &omap3xxx_usb_tll_hs_hwmod,
|
||||
.clk = "usbtll_ick",
|
||||
.addr = omap3xxx_usb_tll_hs_addrs,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *omap3xxx_usb_tll_hs_slaves[] = {
|
||||
&omap3xxx_l4_core__usb_tll_hs,
|
||||
};
|
||||
|
||||
static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = {
|
||||
.name = "usb_tll_hs",
|
||||
.class = &omap3xxx_usb_tll_hs_hwmod_class,
|
||||
.clkdm_name = "l3_init_clkdm",
|
||||
.mpu_irqs = omap3xxx_usb_tll_hs_irqs,
|
||||
.main_clk = "usbtll_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
.module_offs = CORE_MOD,
|
||||
.prcm_reg_id = 3,
|
||||
.module_bit = OMAP3430ES2_EN_USBTLL_SHIFT,
|
||||
.idlest_reg_id = 3,
|
||||
.idlest_idle_bit = OMAP3430ES2_ST_USBTLL_SHIFT,
|
||||
},
|
||||
},
|
||||
.slaves = omap3xxx_usb_tll_hs_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap3xxx_usb_tll_hs_slaves),
|
||||
};
|
||||
|
||||
static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
|
||||
&omap3xxx_l3_main_hwmod,
|
||||
&omap3xxx_l4_core_hwmod,
|
||||
&omap3xxx_l4_per_hwmod,
|
||||
&omap3xxx_l4_wkup_hwmod,
|
||||
&omap3xxx_mmc1_hwmod,
|
||||
&omap3xxx_mmc2_hwmod,
|
||||
&omap3xxx_mmc3_hwmod,
|
||||
&omap3xxx_mpu_hwmod,
|
||||
|
||||
@ -3203,6 +3522,7 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
|
||||
&omap3xxx_uart1_hwmod,
|
||||
&omap3xxx_uart2_hwmod,
|
||||
&omap3xxx_uart3_hwmod,
|
||||
|
||||
/* dss class */
|
||||
&omap3xxx_dss_dispc_hwmod,
|
||||
&omap3xxx_dss_dsi1_hwmod,
|
||||
@ -3260,6 +3580,22 @@ static __initdata struct omap_hwmod *omap3430es1_hwmods[] = {
|
||||
static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = {
|
||||
&omap3xxx_dss_core_hwmod,
|
||||
&omap3xxx_usbhsotg_hwmod,
|
||||
&omap3xxx_usb_host_hs_hwmod,
|
||||
&omap3xxx_usb_tll_hs_hwmod,
|
||||
NULL
|
||||
};
|
||||
|
||||
/* <= 3430ES3-only hwmods */
|
||||
static struct omap_hwmod *omap3430_pre_es3_hwmods[] __initdata = {
|
||||
&omap3xxx_pre_es3_mmc1_hwmod,
|
||||
&omap3xxx_pre_es3_mmc2_hwmod,
|
||||
NULL
|
||||
};
|
||||
|
||||
/* 3430ES3+-only hwmods */
|
||||
static struct omap_hwmod *omap3430_es3plus_hwmods[] __initdata = {
|
||||
&omap3xxx_es3plus_mmc1_hwmod,
|
||||
&omap3xxx_es3plus_mmc2_hwmod,
|
||||
NULL
|
||||
};
|
||||
|
||||
@ -3281,12 +3617,21 @@ static __initdata struct omap_hwmod *omap36xx_hwmods[] = {
|
||||
&omap36xx_sr2_hwmod,
|
||||
&omap3xxx_usbhsotg_hwmod,
|
||||
&omap3xxx_mailbox_hwmod,
|
||||
&omap3xxx_usb_host_hs_hwmod,
|
||||
&omap3xxx_usb_tll_hs_hwmod,
|
||||
&omap3xxx_es3plus_mmc1_hwmod,
|
||||
&omap3xxx_es3plus_mmc2_hwmod,
|
||||
NULL
|
||||
};
|
||||
|
||||
static __initdata struct omap_hwmod *am35xx_hwmods[] = {
|
||||
&omap3xxx_dss_core_hwmod, /* XXX ??? */
|
||||
&am35xx_usbhsotg_hwmod,
|
||||
&am35xx_uart4_hwmod,
|
||||
&omap3xxx_usb_host_hs_hwmod,
|
||||
&omap3xxx_usb_tll_hs_hwmod,
|
||||
&omap3xxx_es3plus_mmc1_hwmod,
|
||||
&omap3xxx_es3plus_mmc2_hwmod,
|
||||
NULL
|
||||
};
|
||||
|
||||
@ -3346,6 +3691,21 @@ int __init omap3xxx_hwmod_init(void)
|
||||
h = omap3430es2plus_hwmods;
|
||||
};
|
||||
|
||||
if (h) {
|
||||
r = omap_hwmod_register(h);
|
||||
if (r < 0)
|
||||
return r;
|
||||
}
|
||||
|
||||
h = NULL;
|
||||
if (rev == OMAP3430_REV_ES1_0 || rev == OMAP3430_REV_ES2_0 ||
|
||||
rev == OMAP3430_REV_ES2_1) {
|
||||
h = omap3430_pre_es3_hwmods;
|
||||
} else if (rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 ||
|
||||
rev == OMAP3430_REV_ES3_1_2) {
|
||||
h = omap3430_es3plus_hwmods;
|
||||
};
|
||||
|
||||
if (h)
|
||||
r = omap_hwmod_register(h);
|
||||
|
||||
|
||||
@ -70,6 +70,8 @@ static struct omap_hwmod omap44xx_mmc2_hwmod;
|
||||
static struct omap_hwmod omap44xx_mpu_hwmod;
|
||||
static struct omap_hwmod omap44xx_mpu_private_hwmod;
|
||||
static struct omap_hwmod omap44xx_usb_otg_hs_hwmod;
|
||||
static struct omap_hwmod omap44xx_usb_host_hs_hwmod;
|
||||
static struct omap_hwmod omap44xx_usb_tll_hs_hwmod;
|
||||
|
||||
/*
|
||||
* Interconnects omap_hwmod structures
|
||||
@ -2246,6 +2248,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_i2c_sysc = {
|
||||
SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
|
||||
SIDLE_SMART_WKUP),
|
||||
.clockact = CLOCKACT_TEST_ICLK,
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
@ -2300,7 +2303,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = {
|
||||
.name = "i2c1",
|
||||
.class = &omap44xx_i2c_hwmod_class,
|
||||
.clkdm_name = "l4_per_clkdm",
|
||||
.flags = HWMOD_16BIT_REG,
|
||||
.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
|
||||
.mpu_irqs = omap44xx_i2c1_irqs,
|
||||
.sdma_reqs = omap44xx_i2c1_sdma_reqs,
|
||||
.main_clk = "i2c1_fck",
|
||||
@ -2356,7 +2359,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = {
|
||||
.name = "i2c2",
|
||||
.class = &omap44xx_i2c_hwmod_class,
|
||||
.clkdm_name = "l4_per_clkdm",
|
||||
.flags = HWMOD_16BIT_REG,
|
||||
.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
|
||||
.mpu_irqs = omap44xx_i2c2_irqs,
|
||||
.sdma_reqs = omap44xx_i2c2_sdma_reqs,
|
||||
.main_clk = "i2c2_fck",
|
||||
@ -2412,7 +2415,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = {
|
||||
.name = "i2c3",
|
||||
.class = &omap44xx_i2c_hwmod_class,
|
||||
.clkdm_name = "l4_per_clkdm",
|
||||
.flags = HWMOD_16BIT_REG,
|
||||
.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
|
||||
.mpu_irqs = omap44xx_i2c3_irqs,
|
||||
.sdma_reqs = omap44xx_i2c3_sdma_reqs,
|
||||
.main_clk = "i2c3_fck",
|
||||
@ -2468,7 +2471,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = {
|
||||
.name = "i2c4",
|
||||
.class = &omap44xx_i2c_hwmod_class,
|
||||
.clkdm_name = "l4_per_clkdm",
|
||||
.flags = HWMOD_16BIT_REG,
|
||||
.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
|
||||
.mpu_irqs = omap44xx_i2c4_irqs,
|
||||
.sdma_reqs = omap44xx_i2c4_sdma_reqs,
|
||||
.main_clk = "i2c4_fck",
|
||||
@ -5276,6 +5279,207 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
|
||||
.slaves_cnt = ARRAY_SIZE(omap44xx_wd_timer3_slaves),
|
||||
};
|
||||
|
||||
/*
|
||||
* 'usb_host_hs' class
|
||||
* high-speed multi-port usb host controller
|
||||
*/
|
||||
static struct omap_hwmod_ocp_if omap44xx_usb_host_hs__l3_main_2 = {
|
||||
.master = &omap44xx_usb_host_hs_hwmod,
|
||||
.slave = &omap44xx_l3_main_2_hwmod,
|
||||
.clk = "l3_div_ck",
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class_sysconfig omap44xx_usb_host_hs_sysc = {
|
||||
.rev_offs = 0x0000,
|
||||
.sysc_offs = 0x0010,
|
||||
.syss_offs = 0x0014,
|
||||
.sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE |
|
||||
SYSC_HAS_SOFTRESET),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
|
||||
SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
|
||||
MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
|
||||
.sysc_fields = &omap_hwmod_sysc_type2,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class omap44xx_usb_host_hs_hwmod_class = {
|
||||
.name = "usb_host_hs",
|
||||
.sysc = &omap44xx_usb_host_hs_sysc,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *omap44xx_usb_host_hs_masters[] = {
|
||||
&omap44xx_usb_host_hs__l3_main_2,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space omap44xx_usb_host_hs_addrs[] = {
|
||||
{
|
||||
.name = "uhh",
|
||||
.pa_start = 0x4a064000,
|
||||
.pa_end = 0x4a0647ff,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{
|
||||
.name = "ohci",
|
||||
.pa_start = 0x4a064800,
|
||||
.pa_end = 0x4a064bff,
|
||||
},
|
||||
{
|
||||
.name = "ehci",
|
||||
.pa_start = 0x4a064c00,
|
||||
.pa_end = 0x4a064fff,
|
||||
},
|
||||
{}
|
||||
};
|
||||
|
||||
static struct omap_hwmod_irq_info omap44xx_usb_host_hs_irqs[] = {
|
||||
{ .name = "ohci-irq", .irq = 76 + OMAP44XX_IRQ_GIC_START },
|
||||
{ .name = "ehci-irq", .irq = 77 + OMAP44XX_IRQ_GIC_START },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_host_hs = {
|
||||
.master = &omap44xx_l4_cfg_hwmod,
|
||||
.slave = &omap44xx_usb_host_hs_hwmod,
|
||||
.clk = "l4_div_ck",
|
||||
.addr = omap44xx_usb_host_hs_addrs,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *omap44xx_usb_host_hs_slaves[] = {
|
||||
&omap44xx_l4_cfg__usb_host_hs,
|
||||
};
|
||||
|
||||
static struct omap_hwmod omap44xx_usb_host_hs_hwmod = {
|
||||
.name = "usb_host_hs",
|
||||
.class = &omap44xx_usb_host_hs_hwmod_class,
|
||||
.clkdm_name = "l3_init_clkdm",
|
||||
.main_clk = "usb_host_hs_fck",
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_offs = OMAP4_CM_L3INIT_USB_HOST_CLKCTRL_OFFSET,
|
||||
.context_offs = OMAP4_RM_L3INIT_USB_HOST_CONTEXT_OFFSET,
|
||||
.modulemode = MODULEMODE_SWCTRL,
|
||||
},
|
||||
},
|
||||
.mpu_irqs = omap44xx_usb_host_hs_irqs,
|
||||
.slaves = omap44xx_usb_host_hs_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_slaves),
|
||||
.masters = omap44xx_usb_host_hs_masters,
|
||||
.masters_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_masters),
|
||||
|
||||
/*
|
||||
* Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock
|
||||
* id: i660
|
||||
*
|
||||
* Description:
|
||||
* In the following configuration :
|
||||
* - USBHOST module is set to smart-idle mode
|
||||
* - PRCM asserts idle_req to the USBHOST module ( This typically
|
||||
* happens when the system is going to a low power mode : all ports
|
||||
* have been suspended, the master part of the USBHOST module has
|
||||
* entered the standby state, and SW has cut the functional clocks)
|
||||
* - an USBHOST interrupt occurs before the module is able to answer
|
||||
* idle_ack, typically a remote wakeup IRQ.
|
||||
* Then the USB HOST module will enter a deadlock situation where it
|
||||
* is no more accessible nor functional.
|
||||
*
|
||||
* Workaround:
|
||||
* Don't use smart idle; use only force idle, hence HWMOD_SWSUP_SIDLE
|
||||
*/
|
||||
|
||||
/*
|
||||
* Errata: USB host EHCI may stall when entering smart-standby mode
|
||||
* Id: i571
|
||||
*
|
||||
* Description:
|
||||
* When the USBHOST module is set to smart-standby mode, and when it is
|
||||
* ready to enter the standby state (i.e. all ports are suspended and
|
||||
* all attached devices are in suspend mode), then it can wrongly assert
|
||||
* the Mstandby signal too early while there are still some residual OCP
|
||||
* transactions ongoing. If this condition occurs, the internal state
|
||||
* machine may go to an undefined state and the USB link may be stuck
|
||||
* upon the next resume.
|
||||
*
|
||||
* Workaround:
|
||||
* Don't use smart standby; use only force standby,
|
||||
* hence HWMOD_SWSUP_MSTANDBY
|
||||
*/
|
||||
|
||||
/*
|
||||
* During system boot; If the hwmod framework resets the module
|
||||
* the module will have smart idle settings; which can lead to deadlock
|
||||
* (above Errata Id:i660); so, dont reset the module during boot;
|
||||
* Use HWMOD_INIT_NO_RESET.
|
||||
*/
|
||||
|
||||
.flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
|
||||
HWMOD_INIT_NO_RESET,
|
||||
};
|
||||
|
||||
/*
|
||||
* 'usb_tll_hs' class
|
||||
* usb_tll_hs module is the adapter on the usb_host_hs ports
|
||||
*/
|
||||
static struct omap_hwmod_class_sysconfig omap44xx_usb_tll_hs_sysc = {
|
||||
.rev_offs = 0x0000,
|
||||
.sysc_offs = 0x0010,
|
||||
.syss_offs = 0x0014,
|
||||
.sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
|
||||
SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
|
||||
SYSC_HAS_AUTOIDLE),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class omap44xx_usb_tll_hs_hwmod_class = {
|
||||
.name = "usb_tll_hs",
|
||||
.sysc = &omap44xx_usb_tll_hs_sysc,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_irq_info omap44xx_usb_tll_hs_irqs[] = {
|
||||
{ .name = "tll-irq", .irq = 78 + OMAP44XX_IRQ_GIC_START },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space omap44xx_usb_tll_hs_addrs[] = {
|
||||
{
|
||||
.name = "tll",
|
||||
.pa_start = 0x4a062000,
|
||||
.pa_end = 0x4a063fff,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{}
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_tll_hs = {
|
||||
.master = &omap44xx_l4_cfg_hwmod,
|
||||
.slave = &omap44xx_usb_tll_hs_hwmod,
|
||||
.clk = "l4_div_ck",
|
||||
.addr = omap44xx_usb_tll_hs_addrs,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *omap44xx_usb_tll_hs_slaves[] = {
|
||||
&omap44xx_l4_cfg__usb_tll_hs,
|
||||
};
|
||||
|
||||
static struct omap_hwmod omap44xx_usb_tll_hs_hwmod = {
|
||||
.name = "usb_tll_hs",
|
||||
.class = &omap44xx_usb_tll_hs_hwmod_class,
|
||||
.clkdm_name = "l3_init_clkdm",
|
||||
.main_clk = "usb_tll_hs_ick",
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_offs = OMAP4_CM_L3INIT_USB_TLL_CLKCTRL_OFFSET,
|
||||
.context_offs = OMAP4_RM_L3INIT_USB_TLL_CONTEXT_OFFSET,
|
||||
.modulemode = MODULEMODE_HWCTRL,
|
||||
},
|
||||
},
|
||||
.mpu_irqs = omap44xx_usb_tll_hs_irqs,
|
||||
.slaves = omap44xx_usb_tll_hs_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap44xx_usb_tll_hs_slaves),
|
||||
};
|
||||
|
||||
static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
|
||||
|
||||
/* dmm class */
|
||||
@ -5415,13 +5619,16 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
|
||||
&omap44xx_uart3_hwmod,
|
||||
&omap44xx_uart4_hwmod,
|
||||
|
||||
/* usb host class */
|
||||
&omap44xx_usb_host_hs_hwmod,
|
||||
&omap44xx_usb_tll_hs_hwmod,
|
||||
|
||||
/* usb_otg_hs class */
|
||||
&omap44xx_usb_otg_hs_hwmod,
|
||||
|
||||
/* wd_timer class */
|
||||
&omap44xx_wd_timer2_hwmod,
|
||||
&omap44xx_wd_timer3_hwmod,
|
||||
|
||||
NULL,
|
||||
};
|
||||
|
||||
|
||||
@ -201,6 +201,8 @@
|
||||
#define OMAP3430_EN_MMC2_SHIFT 25
|
||||
#define OMAP3430_EN_MMC1_MASK (1 << 24)
|
||||
#define OMAP3430_EN_MMC1_SHIFT 24
|
||||
#define OMAP3430_EN_UART4_MASK (1 << 23)
|
||||
#define OMAP3430_EN_UART4_SHIFT 23
|
||||
#define OMAP3430_EN_MCSPI4_MASK (1 << 21)
|
||||
#define OMAP3430_EN_MCSPI4_SHIFT 21
|
||||
#define OMAP3430_EN_MCSPI3_MASK (1 << 20)
|
||||
|
||||
@ -357,7 +357,7 @@
|
||||
#define INT_35XX_EMAC_C0_TX_PULSE_IRQ 69
|
||||
#define INT_35XX_EMAC_C0_MISC_PULSE_IRQ 70
|
||||
#define INT_35XX_USBOTG_IRQ 71
|
||||
#define INT_35XX_UART4 84
|
||||
#define INT_35XX_UART4_IRQ 84
|
||||
#define INT_35XX_CCDC_VD0_IRQ 88
|
||||
#define INT_35XX_CCDC_VD1_IRQ 92
|
||||
#define INT_35XX_CCDC_VD2_IRQ 93
|
||||
|
||||
@ -44,6 +44,7 @@
|
||||
#define OMAP3_UART2_BASE OMAP2_UART2_BASE
|
||||
#define OMAP3_UART3_BASE 0x49020000
|
||||
#define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */
|
||||
#define OMAP3_UART4_AM35XX_BASE 0x4809E000 /* Only on AM35xx */
|
||||
|
||||
/* OMAP4 serial ports */
|
||||
#define OMAP4_UART1_BASE OMAP2_UART1_BASE
|
||||
|
||||
Loading…
Reference in New Issue
Block a user