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[PATCH] zd1211rw: Match vendor driver IFS values
The vendor driver resets the IFS value every time the channel changes, to this one. Signed-off-by: Daniel Drake <dsd@gentoo.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -807,7 +807,6 @@ static int zd1211_hw_init_hmac(struct zd_chip *chip)
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{ CR_ACK_TIMEOUT_EXT, 0x80 },
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{ CR_ADDA_PWR_DWN, 0x00 },
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{ CR_ACK_TIME_80211, 0x100 },
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{ CR_IFS_VALUE, 0x547c032 },
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{ CR_RX_PE_DELAY, 0x70 },
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{ CR_PS_CTRL, 0x10000000 },
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{ CR_RTS_CTS_RATE, 0x02030203 },
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@ -854,7 +853,6 @@ static int zd1211b_hw_init_hmac(struct zd_chip *chip)
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{ CR_ACK_TIMEOUT_EXT, 0x80 },
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{ CR_ADDA_PWR_DWN, 0x00 },
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{ CR_ACK_TIME_80211, 0x100 },
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{ CR_IFS_VALUE, 0x547c032 },
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{ CR_RX_PE_DELAY, 0x70 },
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{ CR_PS_CTRL, 0x10000000 },
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{ CR_RTS_CTS_RATE, 0x02030203 },
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@ -970,10 +968,15 @@ static int hw_init(struct zd_chip *chip)
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r = hw_init_hmac(chip);
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if (r)
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return r;
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r = set_beacon_interval(chip, 100);
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/* Although the vendor driver defaults to a different value during
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* init, it overwrites the IFS value with the following every time
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* the channel changes. We should aim to be more intelligent... */
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r = zd_iowrite32_locked(chip, IFS_VALUE_DEFAULT, CR_IFS_VALUE);
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if (r)
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return r;
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return 0;
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return set_beacon_interval(chip, 100);
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}
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#ifdef DEBUG
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@ -473,7 +473,15 @@
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#define CR_ACK_TIMEOUT_EXT CTL_REG(0x0690)
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#define CR_BCN_FIFO_SEMAPHORE CTL_REG(0x0694)
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#define CR_IFS_VALUE CTL_REG(0x0698)
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#define IFS_VALUE_DIFS_SH 0
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#define IFS_VALUE_EIFS_SH 12
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#define IFS_VALUE_SIFS_SH 24
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#define IFS_VALUE_DEFAULT (( 50 << IFS_VALUE_DIFS_SH) | \
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(1148 << IFS_VALUE_EIFS_SH) | \
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( 10 << IFS_VALUE_SIFS_SH))
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#define CR_RX_TIME_OUT CTL_REG(0x069C)
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#define CR_TOTAL_RX_FRM CTL_REG(0x06A0)
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#define CR_CRC32_CNT CTL_REG(0x06A4)
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