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i2c-designware: make SDA hold time configurable
This patch makes the SDA hold time configurable through device tree. Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Pierrick Hascoet <pierrick.hascoet@abilis.com> Acked-by: Vineet Gupta <vgupta@synopsys.com> for arch/arc bits Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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@ -10,6 +10,10 @@ Recommended properties :
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- clock-frequency : desired I2C bus clock frequency in Hz.
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Optional properties :
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- i2c-sda-hold-time-ns : should contain the SDA hold time in nanoseconds.
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This option is only supported in hardware blocks version 1.11a or newer.
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Example :
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i2c@f0000 {
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@ -20,3 +24,14 @@ Example :
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interrupts = <11>;
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clock-frequency = <400000>;
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};
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i2c@1120000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,designware-i2c";
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reg = <0x1120000 0x1000>;
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interrupt-parent = <&ictl>;
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interrupts = <12 1>;
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clock-frequency = <400000>;
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i2c-sda-hold-time-ns = <300>;
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};
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@ -45,19 +45,19 @@
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};
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i2c0: i2c@FF120000 {
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sda-hold-time = <432>;
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i2c-sda-hold-time-ns = <432>;
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};
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i2c1: i2c@FF121000 {
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sda-hold-time = <432>;
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i2c-sda-hold-time-ns = <432>;
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};
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i2c2: i2c@FF122000 {
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sda-hold-time = <432>;
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i2c-sda-hold-time-ns = <432>;
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};
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i2c3: i2c@FF123000 {
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sda-hold-time = <432>;
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i2c-sda-hold-time-ns = <432>;
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};
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i2c4: i2c@FF124000 {
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sda-hold-time = <432>;
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i2c-sda-hold-time-ns = <432>;
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};
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leds {
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@ -45,19 +45,19 @@
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};
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i2c0: i2c@FF120000 {
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sda-hold-time = <432>;
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i2c-sda-hold-time-ns = <432>;
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};
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i2c1: i2c@FF121000 {
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sda-hold-time = <432>;
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i2c-sda-hold-time-ns = <432>;
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};
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i2c2: i2c@FF122000 {
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sda-hold-time = <432>;
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i2c-sda-hold-time-ns = <432>;
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};
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i2c3: i2c@FF123000 {
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sda-hold-time = <432>;
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i2c-sda-hold-time-ns = <432>;
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};
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i2c4: i2c@FF124000 {
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sda-hold-time = <432>;
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i2c-sda-hold-time-ns = <432>;
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};
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leds {
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@ -67,9 +67,12 @@
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#define DW_IC_STATUS 0x70
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#define DW_IC_TXFLR 0x74
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#define DW_IC_RXFLR 0x78
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#define DW_IC_SDA_HOLD 0x7c
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#define DW_IC_TX_ABRT_SOURCE 0x80
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#define DW_IC_ENABLE_STATUS 0x9c
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#define DW_IC_COMP_PARAM_1 0xf4
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#define DW_IC_COMP_VERSION 0xf8
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#define DW_IC_SDA_HOLD_MIN_VERS 0x3131312A
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#define DW_IC_COMP_TYPE 0xfc
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#define DW_IC_COMP_TYPE_VALUE 0x44570140
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@ -332,6 +335,16 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
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dw_writel(dev, lcnt, DW_IC_FS_SCL_LCNT);
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dev_dbg(dev->dev, "Fast-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt);
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/* Configure SDA Hold Time if required */
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if (dev->sda_hold_time) {
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reg = dw_readl(dev, DW_IC_COMP_VERSION);
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if (reg >= DW_IC_SDA_HOLD_MIN_VERS)
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dw_writel(dev, dev->sda_hold_time, DW_IC_SDA_HOLD);
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else
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dev_warn(dev->dev,
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"Hardware too old to adjust SDA hold time.");
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}
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/* Configure Tx/Rx FIFO threshold levels */
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dw_writel(dev, dev->tx_fifo_depth - 1, DW_IC_TX_TL);
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dw_writel(dev, 0, DW_IC_RX_TL);
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@ -90,6 +90,7 @@ struct dw_i2c_dev {
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unsigned int tx_fifo_depth;
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unsigned int rx_fifo_depth;
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int rx_outstanding;
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u32 sda_hold_time;
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};
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#define ACCESS_SWAP 0x00000001
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@ -34,6 +34,7 @@
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#include <linux/sched.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/of.h>
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#include <linux/of_i2c.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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@ -115,6 +116,15 @@ static int dw_i2c_probe(struct platform_device *pdev)
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return PTR_ERR(dev->clk);
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clk_prepare_enable(dev->clk);
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if (pdev->dev.of_node) {
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u32 ht = 0;
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u32 ic_clk = dev->get_clk_rate_khz(dev);
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of_property_read_u32(pdev->dev.of_node,
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"i2c-sda-hold-time-ns", &ht);
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dev->sda_hold_time = ((u64)ic_clk * ht + 500000) / 1000000;
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}
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dev->functionality =
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I2C_FUNC_I2C |
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I2C_FUNC_10BIT_ADDR |
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