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[ARM] Fix broken sl82c105 DMA prevention
We must _never_ _ever_ on pain of death enable IDE DMA on SL82C105 chipsets where the southbridge revision is <= 5, otherwise data corruption will occur. Strangely this used to work, but something has changed in the upper echelons of the IDE layer to break the hosts decision to deny DMA. Let's make it crystal clear to the IDE layer that we know best. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -399,34 +399,6 @@ static unsigned int __devinit init_chipset_sl82c105(struct pci_dev *dev, const c
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return dev->irq;
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}
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static void __devinit init_dma_sl82c105(ide_hwif_t *hwif, unsigned long dma_base)
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{
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unsigned int rev;
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u8 dma_state;
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DBG(("init_dma_sl82c105(hwif: ide%d, dma_base: 0x%08x)\n", hwif->index, dma_base));
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hwif->autodma = 0;
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if (!dma_base)
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return;
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dma_state = hwif->INB(dma_base + 2);
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rev = sl82c105_bridge_revision(hwif->pci_dev);
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if (rev <= 5) {
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printk(" %s: Winbond 553 bridge revision %d, BM-DMA disabled\n",
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hwif->name, rev);
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dma_state &= ~0x60;
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} else {
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dma_state |= 0x60;
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if (!noautodma)
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hwif->autodma = 1;
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}
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hwif->OUTB(dma_state, dma_base + 2);
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ide_setup_dma(hwif, dma_base, 8);
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}
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/*
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* Initialise the chip
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*/
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@ -434,6 +406,8 @@ static void __devinit init_dma_sl82c105(ide_hwif_t *hwif, unsigned long dma_base
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static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
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{
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struct pci_dev *dev = hwif->pci_dev;
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unsigned int rev;
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u8 dma_state;
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u32 val;
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DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index));
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@ -455,33 +429,51 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
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pci_read_config_dword(dev, 0x40, &val);
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*((u32 *)&hwif->hwif_data) = val;
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hwif->atapi_dma = 0;
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hwif->mwdma_mask = 0;
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hwif->swdma_mask = 0;
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hwif->autodma = 0;
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if (!hwif->dma_base)
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return;
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hwif->atapi_dma = 1;
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hwif->mwdma_mask = 0x07;
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hwif->swdma_mask = 0x07;
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dma_state = hwif->INB(hwif->dma_base + 2) & ~0x60;
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rev = sl82c105_bridge_revision(hwif->pci_dev);
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if (rev <= 5) {
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/*
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* Never ever EVER under any circumstances enable
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* DMA when the bridge is this old.
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*/
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printk(" %s: Winbond 553 bridge revision %d, BM-DMA disabled\n",
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hwif->name, rev);
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} else {
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#ifdef CONFIG_BLK_DEV_IDEDMA
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hwif->ide_dma_check = &sl82c105_check_drive;
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hwif->ide_dma_on = &sl82c105_ide_dma_on;
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hwif->ide_dma_off_quietly = &sl82c105_ide_dma_off_quietly;
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hwif->ide_dma_lostirq = &sl82c105_ide_dma_lost_irq;
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hwif->dma_start = &sl82c105_ide_dma_start;
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hwif->ide_dma_timeout = &sl82c105_ide_dma_timeout;
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dma_state |= 0x60;
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if (!noautodma)
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hwif->autodma = 1;
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hwif->drives[0].autodma = hwif->autodma;
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hwif->drives[1].autodma = hwif->autodma;
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hwif->atapi_dma = 1;
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hwif->mwdma_mask = 0x07;
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hwif->swdma_mask = 0x07;
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hwif->ide_dma_check = &sl82c105_check_drive;
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hwif->ide_dma_on = &sl82c105_ide_dma_on;
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hwif->ide_dma_off_quietly = &sl82c105_ide_dma_off_quietly;
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hwif->ide_dma_lostirq = &sl82c105_ide_dma_lost_irq;
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hwif->dma_start = &sl82c105_ide_dma_start;
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hwif->ide_dma_timeout = &sl82c105_ide_dma_timeout;
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if (!noautodma)
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hwif->autodma = 1;
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hwif->drives[0].autodma = hwif->autodma;
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hwif->drives[1].autodma = hwif->autodma;
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#endif /* CONFIG_BLK_DEV_IDEDMA */
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}
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hwif->OUTB(dma_state, hwif->dma_base + 2);
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}
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static ide_pci_device_t sl82c105_chipset __devinitdata = {
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.name = "W82C105",
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.init_chipset = init_chipset_sl82c105,
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.init_hwif = init_hwif_sl82c105,
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.init_dma = init_dma_sl82c105,
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.channels = 2,
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.autodma = NOAUTODMA,
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.enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}},
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