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synced 2024-12-25 20:32:22 +00:00
bnx2x: Recovery flow bug fixes
1. Sample mcp pulse and mcp sequence in nic load instead of in init_one as they may change by the time we want to use them. 2. Allow cnic to access device during nic load (by adding a new "LOADING" state to recovery flow). This prevents the unnecessary cnic timeout which resulted by cnic attempting to access because nic is loading, but being blocked because of the Recovery state. 3. Issue 'fake' driver load command to mcp when last driver unloads to prevent mcp from taking ownership. When recovery is complete unload fake driver to allow mcp to initialize the hardware before first driver loads. Signed-off-by: Ariel Elior <ariele@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1088,7 +1088,8 @@ enum bnx2x_recovery_state {
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BNX2X_RECOVERY_DONE,
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BNX2X_RECOVERY_INIT,
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BNX2X_RECOVERY_WAIT,
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BNX2X_RECOVERY_FAILED
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BNX2X_RECOVERY_FAILED,
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BNX2X_RECOVERY_NIC_LOADING
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};
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/*
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@ -1776,6 +1776,18 @@ int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
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* common blocks should be initialized, otherwise - not
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*/
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if (!BP_NOMCP(bp)) {
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/* init fw_seq */
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bp->fw_seq =
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(SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_mb_header) &
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DRV_MSG_SEQ_NUMBER_MASK);
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BNX2X_DEV_INFO("fw_seq 0x%08x\n", bp->fw_seq);
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/* Get current FW pulse sequence */
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bp->fw_drv_pulse_wr_seq =
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(SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_pulse_mb) &
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DRV_PULSE_SEQ_MASK);
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BNX2X_DEV_INFO("drv_pulse 0x%x\n", bp->fw_drv_pulse_wr_seq);
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load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_REQ, 0);
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if (!load_code) {
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BNX2X_ERR("MCP response failure, aborting\n");
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@ -3442,7 +3454,7 @@ int bnx2x_change_mtu(struct net_device *dev, int new_mtu)
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struct bnx2x *bp = netdev_priv(dev);
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if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
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pr_err("Handling parity error recovery. Try again later\n");
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netdev_err(dev, "Handling parity error recovery. Try again later\n");
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return -EAGAIN;
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}
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@ -3569,7 +3581,7 @@ int bnx2x_resume(struct pci_dev *pdev)
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bp = netdev_priv(dev);
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if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
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pr_err("Handling parity error recovery. Try again later\n");
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netdev_err(dev, "Handling parity error recovery. Try again later\n");
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return -EAGAIN;
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}
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@ -3585,8 +3597,6 @@ int bnx2x_resume(struct pci_dev *pdev)
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bnx2x_set_power_state(bp, PCI_D0);
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netif_device_attach(dev);
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/* Since the chip was reset, clear the FW sequence number */
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bp->fw_seq = 0;
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rc = bnx2x_nic_load(bp, LOAD_OPEN);
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rtnl_unlock();
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@ -468,7 +468,9 @@ static int bnx2x_issue_dmae_with_comp(struct bnx2x *bp,
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while ((*wb_comp & ~DMAE_PCI_ERR_FLAG) != DMAE_COMP_VAL) {
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DP(BNX2X_MSG_OFF, "wb_comp 0x%08x\n", *wb_comp);
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if (!cnt) {
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if (!cnt ||
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(bp->recovery_state != BNX2X_RECOVERY_DONE &&
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bp->recovery_state != BNX2X_RECOVERY_NIC_LOADING)) {
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BNX2X_ERR("DMAE timeout!\n");
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rc = DMAE_TIMEOUT;
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goto unlock;
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@ -8477,13 +8479,38 @@ int bnx2x_leader_reset(struct bnx2x *bp)
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{
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int rc = 0;
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bool global = bnx2x_reset_is_global(bp);
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u32 load_code;
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/* if not going to reset MCP - load "fake" driver to reset HW while
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* driver is owner of the HW
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*/
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if (!global && !BP_NOMCP(bp)) {
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load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_REQ, 0);
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if (!load_code) {
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BNX2X_ERR("MCP response failure, aborting\n");
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rc = -EAGAIN;
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goto exit_leader_reset;
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}
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if ((load_code != FW_MSG_CODE_DRV_LOAD_COMMON_CHIP) &&
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(load_code != FW_MSG_CODE_DRV_LOAD_COMMON)) {
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BNX2X_ERR("MCP unexpected resp, aborting\n");
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rc = -EAGAIN;
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goto exit_leader_reset2;
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}
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load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
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if (!load_code) {
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BNX2X_ERR("MCP response failure, aborting\n");
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rc = -EAGAIN;
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goto exit_leader_reset2;
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}
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}
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/* Try to recover after the failure */
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if (bnx2x_process_kill(bp, global)) {
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netdev_err(bp->dev, "Something bad had happen on engine %d! "
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"Aii!\n", BP_PATH(bp));
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rc = -EAGAIN;
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goto exit_leader_reset;
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goto exit_leader_reset2;
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}
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/*
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@ -8494,6 +8521,12 @@ int bnx2x_leader_reset(struct bnx2x *bp)
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if (global)
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bnx2x_clear_reset_global(bp);
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exit_leader_reset2:
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/* unload "fake driver" if it was loaded */
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if (!global && !BP_NOMCP(bp)) {
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bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP, 0);
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bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE, 0);
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}
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exit_leader_reset:
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bp->is_leader = 0;
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bnx2x_release_leader_lock(bp);
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@ -8530,13 +8563,15 @@ static inline void bnx2x_recovery_failed(struct bnx2x *bp)
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static void bnx2x_parity_recover(struct bnx2x *bp)
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{
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bool global = false;
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bool is_parity;
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DP(NETIF_MSG_HW, "Handling parity\n");
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while (1) {
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switch (bp->recovery_state) {
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case BNX2X_RECOVERY_INIT:
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DP(NETIF_MSG_HW, "State is BNX2X_RECOVERY_INIT\n");
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bnx2x_chk_parity_attn(bp, &global, false);
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is_parity = bnx2x_chk_parity_attn(bp, &global, false);
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WARN_ON(!is_parity);
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/* Try to get a LEADER_LOCK HW lock */
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if (bnx2x_trylock_leader_lock(bp)) {
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@ -8560,15 +8595,6 @@ static void bnx2x_parity_recover(struct bnx2x *bp)
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bp->recovery_state = BNX2X_RECOVERY_WAIT;
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/*
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* Reset MCP command sequence number and MCP mail box
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* sequence as we are going to reset the MCP.
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*/
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if (global) {
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bp->fw_seq = 0;
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bp->fw_drv_pulse_wr_seq = 0;
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}
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/* Ensure "is_leader", MCP command sequence and
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* "recovery_state" update values are seen on other
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* CPUs.
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@ -8652,9 +8678,20 @@ static void bnx2x_parity_recover(struct bnx2x *bp)
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return;
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}
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if (bnx2x_nic_load(bp, LOAD_NORMAL))
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bnx2x_recovery_failed(bp);
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else {
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bp->recovery_state =
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BNX2X_RECOVERY_NIC_LOADING;
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if (bnx2x_nic_load(bp, LOAD_NORMAL)) {
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netdev_err(bp->dev,
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"Recovery failed. "
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"Power cycle "
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"needed\n");
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/* Disconnect this device */
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netif_device_detach(bp->dev);
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/* Shut down the power */
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bnx2x_set_power_state(
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bp, PCI_D3hot);
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smp_mb();
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} else {
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bp->recovery_state =
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BNX2X_RECOVERY_DONE;
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smp_mb();
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@ -8908,9 +8945,6 @@ static void __devinit bnx2x_undi_unload(struct bnx2x *bp)
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/* restore our func and fw_seq */
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bp->pf_num = orig_pf_num;
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bp->fw_seq =
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(SHMEM_RD(bp, func_mb[bp->pf_num].drv_mb_header) &
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DRV_MSG_SEQ_NUMBER_MASK);
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}
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}
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@ -9936,16 +9970,6 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp)
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bnx2x_get_cnic_info(bp);
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/* Get current FW pulse sequence */
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if (!BP_NOMCP(bp)) {
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int mb_idx = BP_FW_MB_IDX(bp);
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bp->fw_drv_pulse_wr_seq =
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(SHMEM_RD(bp, func_mb[mb_idx].drv_pulse_mb) &
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DRV_PULSE_SEQ_MASK);
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BNX2X_DEV_INFO("drv_pulse 0x%x\n", bp->fw_drv_pulse_wr_seq);
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}
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return rc;
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}
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@ -10115,14 +10139,6 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp)
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if (!BP_NOMCP(bp))
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bnx2x_undi_unload(bp);
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/* init fw_seq after undi_unload! */
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if (!BP_NOMCP(bp)) {
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bp->fw_seq =
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(SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_mb_header) &
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DRV_MSG_SEQ_NUMBER_MASK);
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BNX2X_DEV_INFO("fw_seq 0x%08x\n", bp->fw_seq);
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}
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if (CHIP_REV_IS_FPGA(bp))
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dev_err(&bp->pdev->dev, "FPGA detected\n");
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@ -11331,13 +11347,6 @@ static void bnx2x_eeh_recover(struct bnx2x *bp)
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if ((val & (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB))
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!= (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB))
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BNX2X_ERR("BAD MCP validity signature\n");
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if (!BP_NOMCP(bp)) {
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bp->fw_seq =
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(SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_mb_header) &
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DRV_MSG_SEQ_NUMBER_MASK);
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BNX2X_DEV_INFO("fw_seq 0x%08x\n", bp->fw_seq);
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}
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}
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/**
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@ -11593,6 +11602,13 @@ static int bnx2x_cnic_sp_queue(struct net_device *dev,
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return -EIO;
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#endif
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if ((bp->recovery_state != BNX2X_RECOVERY_DONE) &&
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(bp->recovery_state != BNX2X_RECOVERY_NIC_LOADING)) {
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netdev_err(dev, "Handling parity error recovery. Try again "
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"later\n");
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return -EAGAIN;
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}
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spin_lock_bh(&bp->spq_lock);
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for (i = 0; i < count; i++) {
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