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gpio/mxc: mask gpio interrupts in suspend
Currently in the FSL platform all GPIO interrupts in a bank are muxed into two GPIO lines to the GPC interrupt controller. In each GPIO bank GPIOs 0-15 are OR'ed into one GPC interrupt controller interrupt and 16-31 are OR'ed into another. With the current code, if any of the 0-15 or 16-31 interrupts are marked as wakeup capable, all interrupts belonging to that sub-bank (either 0-15 or 16-31) will wake up the device. This is because interrupts are only being masked at the interrupt controller and not at the GPIO controller. This patch allows masking of GPIO interrupts at the GPIO controller during suspend if they have not been labeled wakeup capable. This patch uses preexisting IRQCHIP_MASK_ON_SUSPEND flag while initializing the GPIO interrupts to get the desired behavior. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: linux-gpio@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Ulises Brindis <ubrindis56@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -354,6 +354,7 @@ static void __init mxc_gpio_init_gc(struct mxc_gpio_port *port, int irq_base)
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ct->chip.irq_unmask = irq_gc_mask_set_bit;
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ct->chip.irq_set_type = gpio_set_irq_type;
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ct->chip.irq_set_wake = gpio_set_wake_irq;
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ct->chip.flags = IRQCHIP_MASK_ON_SUSPEND;
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ct->regs.ack = GPIO_ISR;
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ct->regs.mask = GPIO_IMR;
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