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A single fix for the Intel Sunrisepoint pin controller
that makes the interrupts work properly on it. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl4sHZcACgkQQRCzN7AZ XXMoBxAAsgUg2OpxtGyyevERgDMfsPHuhhniIP4NoVuZWHqch61hWubSds529Vka Ly4ikV94WW7BwxK9ndOTqy8tUgjcDWGn1+oO8nWbSby/pX3G6MA+q5R/BJRFBrE2 THvyIT1fPhfDTmdvqJEULh+FrqLe3Bz6v1G/VqLaYgy2yCg0gNxHnaQwAcvV2Mlz GRhHULoPfIvwJG1P40+R27Q7YQUV+yxpoaITvqUfOlN7unD01Thb89uCYyzGOFRh gi3Q2UnOeW7W32R8pwnmXzJv6dMTucM10xE7k5Clsrot8wUtT1APbHeWPnY/Li+W NPWBxfSRzjsbRsRbLz1sBpcv72hYsMz0ELYqQMlY++fF3fs9sD2sPArgEnwxvk2U t7JQ7IWd16l1DVVksVyp6QNv/Q8oLdNRjbp8feBV7SIvuPGCrLZ9q7Ao5v2p7aMT M5WNpBqZqziObtq3kaR0ospg00UfNtt/YFpEWhwzR+cfj/YsvYgitjMf+z9olWhy QEnzws3yT6TTQ2Ccvtc21VxHp6mDx69SZQhlD3+G2Y5V1XtSpl1oiyDXW1/eToGQ UONRkjD7dbvRlunL6FxGAIMndhIRQ5WXcvvlzCzTYX1l8HO8V98c6jjxign+jbXt bzv2x+fgH7YF8A941yhpwYej/jxVg3X0C6RQCeizQfBY8Nq7nhI= =0GUt -----END PGP SIGNATURE----- Merge tag 'pinctrl-v5.5-5' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fix from Linus Walleij: "A single fix for the Intel Sunrisepoint pin controller that makes the interrupts work properly on it" * tag 'pinctrl-v5.5-5' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: sunrisepoint: Add missing Interrupt Status register offset
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commit
93d1a05ea6
@ -49,6 +49,7 @@
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.padown_offset = SPT_PAD_OWN, \
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.padcfglock_offset = SPT_PADCFGLOCK, \
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.hostown_offset = SPT_HOSTSW_OWN, \
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.is_offset = SPT_GPI_IS, \
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.ie_offset = SPT_GPI_IE, \
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.pin_base = (s), \
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.npins = ((e) - (s) + 1), \
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