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regmap: mmio: Introduce IO accessors that can talk to IO port
Some users may use regmap MMIO for IO ports, and this can be done by assigning ioreadXX()/iowriteXX() and their Big Endian counterparts to the regmap context. Add IO port support with a corresponding flag added. While doing that, make sure that user won't select relaxed MMIO access along with IO port because the latter have no relaxed variants. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: William Breathitt Gray <william.gray@linaro.org> Link: https://lore.kernel.org/r/20220808203401.35153-4-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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159dfabd20
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@ -74,6 +74,12 @@ static void regmap_mmio_write8_relaxed(struct regmap_mmio_context *ctx,
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writeb_relaxed(val, ctx->regs + reg);
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}
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static void regmap_mmio_iowrite8(struct regmap_mmio_context *ctx,
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unsigned int reg, unsigned int val)
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{
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iowrite8(val, ctx->regs + reg);
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}
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static void regmap_mmio_write16le(struct regmap_mmio_context *ctx,
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unsigned int reg,
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unsigned int val)
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@ -88,6 +94,12 @@ static void regmap_mmio_write16le_relaxed(struct regmap_mmio_context *ctx,
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writew_relaxed(val, ctx->regs + reg);
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}
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static void regmap_mmio_iowrite16le(struct regmap_mmio_context *ctx,
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unsigned int reg, unsigned int val)
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{
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iowrite16(val, ctx->regs + reg);
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}
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static void regmap_mmio_write16be(struct regmap_mmio_context *ctx,
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unsigned int reg,
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unsigned int val)
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@ -95,6 +107,12 @@ static void regmap_mmio_write16be(struct regmap_mmio_context *ctx,
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iowrite16be(val, ctx->regs + reg);
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}
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static void regmap_mmio_iowrite16be(struct regmap_mmio_context *ctx,
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unsigned int reg, unsigned int val)
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{
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iowrite16be(val, ctx->regs + reg);
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}
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static void regmap_mmio_write32le(struct regmap_mmio_context *ctx,
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unsigned int reg,
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unsigned int val)
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@ -109,6 +127,12 @@ static void regmap_mmio_write32le_relaxed(struct regmap_mmio_context *ctx,
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writel_relaxed(val, ctx->regs + reg);
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}
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static void regmap_mmio_iowrite32le(struct regmap_mmio_context *ctx,
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unsigned int reg, unsigned int val)
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{
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iowrite32(val, ctx->regs + reg);
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}
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static void regmap_mmio_write32be(struct regmap_mmio_context *ctx,
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unsigned int reg,
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unsigned int val)
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@ -116,6 +140,12 @@ static void regmap_mmio_write32be(struct regmap_mmio_context *ctx,
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iowrite32be(val, ctx->regs + reg);
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}
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static void regmap_mmio_iowrite32be(struct regmap_mmio_context *ctx,
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unsigned int reg, unsigned int val)
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{
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iowrite32be(val, ctx->regs + reg);
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}
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static int regmap_mmio_write(void *context, unsigned int reg, unsigned int val)
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{
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struct regmap_mmio_context *ctx = context;
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@ -147,6 +177,12 @@ static unsigned int regmap_mmio_read8_relaxed(struct regmap_mmio_context *ctx,
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return readb_relaxed(ctx->regs + reg);
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}
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static unsigned int regmap_mmio_ioread8(struct regmap_mmio_context *ctx,
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unsigned int reg)
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{
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return ioread8(ctx->regs + reg);
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}
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static unsigned int regmap_mmio_read16le(struct regmap_mmio_context *ctx,
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unsigned int reg)
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{
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@ -159,12 +195,24 @@ static unsigned int regmap_mmio_read16le_relaxed(struct regmap_mmio_context *ctx
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return readw_relaxed(ctx->regs + reg);
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}
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static unsigned int regmap_mmio_ioread16le(struct regmap_mmio_context *ctx,
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unsigned int reg)
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{
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return ioread16(ctx->regs + reg);
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}
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static unsigned int regmap_mmio_read16be(struct regmap_mmio_context *ctx,
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unsigned int reg)
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{
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return ioread16be(ctx->regs + reg);
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}
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static unsigned int regmap_mmio_ioread16be(struct regmap_mmio_context *ctx,
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unsigned int reg)
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{
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return ioread16be(ctx->regs + reg);
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}
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static unsigned int regmap_mmio_read32le(struct regmap_mmio_context *ctx,
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unsigned int reg)
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{
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@ -177,12 +225,24 @@ static unsigned int regmap_mmio_read32le_relaxed(struct regmap_mmio_context *ctx
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return readl_relaxed(ctx->regs + reg);
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}
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static unsigned int regmap_mmio_ioread32le(struct regmap_mmio_context *ctx,
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unsigned int reg)
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{
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return ioread32(ctx->regs + reg);
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}
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static unsigned int regmap_mmio_read32be(struct regmap_mmio_context *ctx,
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unsigned int reg)
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{
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return ioread32be(ctx->regs + reg);
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}
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static unsigned int regmap_mmio_ioread32be(struct regmap_mmio_context *ctx,
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unsigned int reg)
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{
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return ioread32be(ctx->regs + reg);
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}
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static int regmap_mmio_read(void *context, unsigned int reg, unsigned int *val)
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{
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struct regmap_mmio_context *ctx = context;
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@ -245,6 +305,9 @@ static struct regmap_mmio_context *regmap_mmio_gen_context(struct device *dev,
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if (config->reg_stride < min_stride)
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return ERR_PTR(-EINVAL);
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if (config->use_relaxed_mmio && config->io_port)
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return ERR_PTR(-EINVAL);
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ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
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if (!ctx)
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return ERR_PTR(-ENOMEM);
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@ -261,7 +324,10 @@ static struct regmap_mmio_context *regmap_mmio_gen_context(struct device *dev,
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#endif
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switch (config->val_bits) {
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case 8:
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if (config->use_relaxed_mmio) {
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if (config->io_port) {
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ctx->reg_read = regmap_mmio_ioread8;
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ctx->reg_write = regmap_mmio_iowrite8;
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} else if (config->use_relaxed_mmio) {
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ctx->reg_read = regmap_mmio_read8_relaxed;
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ctx->reg_write = regmap_mmio_write8_relaxed;
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} else {
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@ -270,7 +336,10 @@ static struct regmap_mmio_context *regmap_mmio_gen_context(struct device *dev,
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}
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break;
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case 16:
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if (config->use_relaxed_mmio) {
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if (config->io_port) {
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ctx->reg_read = regmap_mmio_ioread16le;
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ctx->reg_write = regmap_mmio_iowrite16le;
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} else if (config->use_relaxed_mmio) {
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ctx->reg_read = regmap_mmio_read16le_relaxed;
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ctx->reg_write = regmap_mmio_write16le_relaxed;
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} else {
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@ -279,7 +348,10 @@ static struct regmap_mmio_context *regmap_mmio_gen_context(struct device *dev,
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}
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break;
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case 32:
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if (config->use_relaxed_mmio) {
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if (config->io_port) {
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ctx->reg_read = regmap_mmio_ioread32le;
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ctx->reg_write = regmap_mmio_iowrite32le;
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} else if (config->use_relaxed_mmio) {
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ctx->reg_read = regmap_mmio_read32le_relaxed;
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ctx->reg_write = regmap_mmio_write32le_relaxed;
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} else {
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@ -298,16 +370,31 @@ static struct regmap_mmio_context *regmap_mmio_gen_context(struct device *dev,
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#endif
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switch (config->val_bits) {
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case 8:
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ctx->reg_read = regmap_mmio_read8;
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ctx->reg_write = regmap_mmio_write8;
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if (config->io_port) {
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ctx->reg_read = regmap_mmio_ioread8;
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ctx->reg_write = regmap_mmio_iowrite8;
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} else {
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ctx->reg_read = regmap_mmio_read8;
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ctx->reg_write = regmap_mmio_write8;
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}
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break;
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case 16:
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ctx->reg_read = regmap_mmio_read16be;
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ctx->reg_write = regmap_mmio_write16be;
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if (config->io_port) {
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ctx->reg_read = regmap_mmio_ioread16be;
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ctx->reg_write = regmap_mmio_iowrite16be;
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} else {
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ctx->reg_read = regmap_mmio_read16be;
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ctx->reg_write = regmap_mmio_write16be;
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}
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break;
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case 32:
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ctx->reg_read = regmap_mmio_read32be;
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ctx->reg_write = regmap_mmio_write32be;
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if (config->io_port) {
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ctx->reg_read = regmap_mmio_ioread32be;
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ctx->reg_write = regmap_mmio_iowrite32be;
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} else {
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ctx->reg_read = regmap_mmio_read32be;
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ctx->reg_write = regmap_mmio_write32be;
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}
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break;
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default:
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ret = -EINVAL;
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@ -311,6 +311,8 @@ typedef void (*regmap_unlock)(void *);
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* This field is a duplicate of a similar file in
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* 'struct regmap_bus' and serves exact same purpose.
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* Use it only for "no-bus" cases.
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* @io_port: Support IO port accessors. Makes sense only when MMIO vs. IO port
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* access can be distinguished.
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* @max_register: Optional, specifies the maximum valid register address.
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* @wr_table: Optional, points to a struct regmap_access_table specifying
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* valid ranges for write access.
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@ -399,6 +401,7 @@ struct regmap_config {
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size_t max_raw_write;
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bool fast_io;
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bool io_port;
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unsigned int max_register;
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const struct regmap_access_table *wr_table;
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