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drm/i915: Clear flushing lists on GPU reset
Owain Ainsworth noticed that the reset code failed to clear the flushing list leaving the driver in an inconsistent state following a hung GPU. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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@ -385,6 +385,12 @@ int i965_reset(struct drm_device *dev, u8 flags)
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*/
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i915_gem_retire_requests(dev);
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/* Remove anything from the flushing lists. The GPU cache is likely
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* to be lost on reset along with the data, so simply move the
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* lost bo to the inactive list.
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*/
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i915_gem_reset_flushing_list(dev);
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/*
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* Set the domains we want to reset (GRDOM/bits 2 and 3) as
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* well as the reset bit (GR/bit 0). Setting the GR bit
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@ -997,6 +997,7 @@ int i915_gem_object_get_fence_reg(struct drm_gem_object *obj,
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int i915_gem_object_put_fence_reg(struct drm_gem_object *obj,
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bool interruptible);
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void i915_gem_retire_requests(struct drm_device *dev);
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void i915_gem_reset_flushing_list(struct drm_device *dev);
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void i915_gem_clflush_object(struct drm_gem_object *obj);
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int i915_gem_object_set_domain(struct drm_gem_object *obj,
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uint32_t read_domains,
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@ -1683,6 +1683,22 @@ i915_get_gem_seqno(struct drm_device *dev,
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return ring->get_gem_seqno(dev, ring);
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}
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void i915_gem_reset_flushing_list(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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while (!list_empty(&dev_priv->mm.flushing_list)) {
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struct drm_i915_gem_object *obj_priv;
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obj_priv = list_first_entry(&dev_priv->mm.flushing_list,
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struct drm_i915_gem_object,
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list);
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obj_priv->base.write_domain = 0;
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i915_gem_object_move_to_inactive(&obj_priv->base);
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}
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}
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/**
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* This function clears the request list as sequence numbers are passed.
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*/
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