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regulator: Do proper shift to set correct bit for DC[2|5]_HIB_MODE setting
DC[2|5]_HIB_MODE is BIT 12 of DCDC[2|5] Control register. WM8350_DC2_HIB_MODE_ACTIVE/WM8350_DC2_HIB_MODE_DISABLE are defined as 1/0. Thus we need to left shift WM8350_DC2_HIB_MODE_SHIFT bits. Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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@ -575,13 +575,13 @@ static int wm8350_dcdc25_set_suspend_enable(struct regulator_dev *rdev)
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val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL)
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& ~WM8350_DC2_HIB_MODE_MASK;
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wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val |
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WM8350_DC2_HIB_MODE_ACTIVE);
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(WM8350_DC2_HIB_MODE_ACTIVE << WM8350_DC2_HIB_MODE_SHIFT));
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break;
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case WM8350_DCDC_5:
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val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL)
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& ~WM8350_DC2_HIB_MODE_MASK;
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& ~WM8350_DC5_HIB_MODE_MASK;
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wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val |
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WM8350_DC5_HIB_MODE_ACTIVE);
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(WM8350_DC5_HIB_MODE_ACTIVE << WM8350_DC5_HIB_MODE_SHIFT));
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break;
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default:
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return -EINVAL;
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@ -600,13 +600,13 @@ static int wm8350_dcdc25_set_suspend_disable(struct regulator_dev *rdev)
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val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL)
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& ~WM8350_DC2_HIB_MODE_MASK;
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wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val |
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WM8350_DC2_HIB_MODE_DISABLE);
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(WM8350_DC2_HIB_MODE_DISABLE << WM8350_DC2_HIB_MODE_SHIFT));
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break;
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case WM8350_DCDC_5:
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val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL)
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& ~WM8350_DC2_HIB_MODE_MASK;
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& ~WM8350_DC5_HIB_MODE_MASK;
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wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val |
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WM8350_DC2_HIB_MODE_DISABLE);
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(WM8350_DC5_HIB_MODE_DISABLE << WM8350_DC5_HIB_MODE_SHIFT));
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break;
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default:
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return -EINVAL;
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