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spi/bitbang: Factor out message transfer from message pump loop
In order to make it easier to convert to transfer_one_message() lift the code that does the actual message transfer out of the work function that implements the message pump. This should have no functional impact, it's just a simple code motion patch. Signed-off-by: Mark Brown <broonie@linaro.org>
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874b315856
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91b3085867
@ -255,6 +255,112 @@ static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
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* Drivers can provide word-at-a-time i/o primitives, or provide
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* transfer-at-a-time ones to leverage dma or fifo hardware.
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*/
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static int spi_bitbang_transfer_one(struct spi_device *spi,
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struct spi_message *m)
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{
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struct spi_bitbang *bitbang;
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unsigned nsecs;
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struct spi_transfer *t = NULL;
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unsigned tmp;
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unsigned cs_change;
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int status;
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int do_setup = -1;
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bitbang = spi_master_get_devdata(spi->master);
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/* FIXME this is made-up ... the correct value is known to
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* word-at-a-time bitbang code, and presumably chipselect()
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* should enforce these requirements too?
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*/
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nsecs = 100;
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tmp = 0;
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cs_change = 1;
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status = 0;
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list_for_each_entry (t, &m->transfers, transfer_list) {
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/* override speed or wordsize? */
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if (t->speed_hz || t->bits_per_word)
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do_setup = 1;
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/* init (-1) or override (1) transfer params */
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if (do_setup != 0) {
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status = bitbang->setup_transfer(spi, t);
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if (status < 0)
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break;
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if (do_setup == -1)
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do_setup = 0;
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}
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/* set up default clock polarity, and activate chip;
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* this implicitly updates clock and spi modes as
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* previously recorded for this device via setup().
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* (and also deselects any other chip that might be
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* selected ...)
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*/
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if (cs_change) {
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bitbang->chipselect(spi, BITBANG_CS_ACTIVE);
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ndelay(nsecs);
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}
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cs_change = t->cs_change;
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if (!t->tx_buf && !t->rx_buf && t->len) {
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status = -EINVAL;
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break;
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}
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/* transfer data. the lower level code handles any
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* new dma mappings it needs. our caller always gave
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* us dma-safe buffers.
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*/
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if (t->len) {
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/* REVISIT dma API still needs a designated
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* DMA_ADDR_INVALID; ~0 might be better.
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*/
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if (!m->is_dma_mapped)
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t->rx_dma = t->tx_dma = 0;
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status = bitbang->txrx_bufs(spi, t);
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}
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if (status > 0)
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m->actual_length += status;
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if (status != t->len) {
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/* always report some kind of error */
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if (status >= 0)
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status = -EREMOTEIO;
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break;
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}
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status = 0;
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/* protocol tweaks before next transfer */
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if (t->delay_usecs)
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udelay(t->delay_usecs);
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if (cs_change && !list_is_last(&t->transfer_list, &m->transfers)) {
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/* sometimes a short mid-message deselect of the chip
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* may be needed to terminate a mode or command
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*/
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ndelay(nsecs);
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bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
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ndelay(nsecs);
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}
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}
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m->status = status;
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m->complete(m->context);
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/* normally deactivate chipselect ... unless no error and
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* cs_change has hinted that the next message will probably
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* be for this chip too.
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*/
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if (!(status == 0 && cs_change)) {
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ndelay(nsecs);
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bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
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ndelay(nsecs);
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}
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return status;
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}
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static void bitbang_work(struct work_struct *work)
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{
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struct spi_bitbang *bitbang =
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@ -265,107 +371,10 @@ static void bitbang_work(struct work_struct *work)
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spin_lock_irqsave(&bitbang->lock, flags);
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bitbang->busy = 1;
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list_for_each_entry_safe(m, _m, &bitbang->queue, queue) {
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struct spi_device *spi;
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unsigned nsecs;
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struct spi_transfer *t = NULL;
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unsigned tmp;
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unsigned cs_change;
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int status;
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int do_setup = -1;
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list_del(&m->queue);
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spin_unlock_irqrestore(&bitbang->lock, flags);
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/* FIXME this is made-up ... the correct value is known to
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* word-at-a-time bitbang code, and presumably chipselect()
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* should enforce these requirements too?
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*/
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nsecs = 100;
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spi = m->spi;
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tmp = 0;
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cs_change = 1;
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status = 0;
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list_for_each_entry (t, &m->transfers, transfer_list) {
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/* override speed or wordsize? */
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if (t->speed_hz || t->bits_per_word)
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do_setup = 1;
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/* init (-1) or override (1) transfer params */
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if (do_setup != 0) {
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status = bitbang->setup_transfer(spi, t);
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if (status < 0)
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break;
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if (do_setup == -1)
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do_setup = 0;
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}
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/* set up default clock polarity, and activate chip;
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* this implicitly updates clock and spi modes as
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* previously recorded for this device via setup().
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* (and also deselects any other chip that might be
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* selected ...)
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*/
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if (cs_change) {
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bitbang->chipselect(spi, BITBANG_CS_ACTIVE);
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ndelay(nsecs);
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}
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cs_change = t->cs_change;
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if (!t->tx_buf && !t->rx_buf && t->len) {
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status = -EINVAL;
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break;
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}
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/* transfer data. the lower level code handles any
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* new dma mappings it needs. our caller always gave
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* us dma-safe buffers.
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*/
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if (t->len) {
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/* REVISIT dma API still needs a designated
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* DMA_ADDR_INVALID; ~0 might be better.
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*/
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if (!m->is_dma_mapped)
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t->rx_dma = t->tx_dma = 0;
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status = bitbang->txrx_bufs(spi, t);
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}
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if (status > 0)
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m->actual_length += status;
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if (status != t->len) {
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/* always report some kind of error */
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if (status >= 0)
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status = -EREMOTEIO;
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break;
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}
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status = 0;
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/* protocol tweaks before next transfer */
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if (t->delay_usecs)
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udelay(t->delay_usecs);
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if (cs_change && !list_is_last(&t->transfer_list, &m->transfers)) {
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/* sometimes a short mid-message deselect of the chip
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* may be needed to terminate a mode or command
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*/
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ndelay(nsecs);
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bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
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ndelay(nsecs);
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}
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}
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m->status = status;
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m->complete(m->context);
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/* normally deactivate chipselect ... unless no error and
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* cs_change has hinted that the next message will probably
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* be for this chip too.
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*/
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if (!(status == 0 && cs_change)) {
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ndelay(nsecs);
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bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
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ndelay(nsecs);
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}
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spi_bitbang_transfer_one(m->spi, m);
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spin_lock_irqsave(&bitbang->lock, flags);
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}
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