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dmaengine: mv_xor: bug fix for racing condition in descriptors cleanup
This patch fixes a bug in the XOR driver where the cleanup function can be
called and free descriptors that never been processed by the engine (which
result in data errors).
The cleanup function will free descriptors based on the ownership bit in
the descriptors.
Fixes: ff7b04796d
("dmaengine: DMA engine driver for Marvell XOR engine")
Signed-off-by: Lior Amsalem <alior@marvell.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Ofer Heifetz <oferh@marvell.com>
Cc: stable@vger.kernel.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This commit is contained in:
parent
e5489d5e90
commit
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@ -273,7 +273,8 @@ static void mv_xor_slot_cleanup(struct mv_xor_chan *mv_chan)
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dma_cookie_t cookie = 0;
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int busy = mv_chan_is_busy(mv_chan);
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u32 current_desc = mv_chan_get_current_desc(mv_chan);
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int seen_current = 0;
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int current_cleaned = 0;
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struct mv_xor_desc *hw_desc;
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dev_dbg(mv_chan_to_devp(mv_chan), "%s %d\n", __func__, __LINE__);
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dev_dbg(mv_chan_to_devp(mv_chan), "current_desc %x\n", current_desc);
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@ -285,38 +286,57 @@ static void mv_xor_slot_cleanup(struct mv_xor_chan *mv_chan)
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list_for_each_entry_safe(iter, _iter, &mv_chan->chain,
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chain_node) {
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prefetch(_iter);
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prefetch(&_iter->async_tx);
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/* do not advance past the current descriptor loaded into the
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* hardware channel, subsequent descriptors are either in
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* process or have not been submitted
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*/
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if (seen_current)
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break;
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/* clean finished descriptors */
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hw_desc = iter->hw_desc;
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if (hw_desc->status & XOR_DESC_SUCCESS) {
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cookie = mv_xor_run_tx_complete_actions(iter, mv_chan,
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cookie);
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/* stop the search if we reach the current descriptor and the
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* channel is busy
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*/
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/* done processing desc, clean slot */
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mv_xor_clean_slot(iter, mv_chan);
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/* break if we did cleaned the current */
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if (iter->async_tx.phys == current_desc) {
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seen_current = 1;
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if (busy)
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current_cleaned = 1;
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break;
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}
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cookie = mv_xor_run_tx_complete_actions(iter, mv_chan, cookie);
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if (mv_xor_clean_slot(iter, mv_chan))
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} else {
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if (iter->async_tx.phys == current_desc) {
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current_cleaned = 0;
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break;
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}
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}
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}
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if ((busy == 0) && !list_empty(&mv_chan->chain)) {
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struct mv_xor_desc_slot *chain_head;
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chain_head = list_entry(mv_chan->chain.next,
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if (current_cleaned) {
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/*
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* current descriptor cleaned and removed, run
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* from list head
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*/
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iter = list_entry(mv_chan->chain.next,
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struct mv_xor_desc_slot,
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chain_node);
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mv_xor_start_new_chain(mv_chan, chain_head);
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mv_xor_start_new_chain(mv_chan, iter);
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} else {
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if (!list_is_last(&iter->chain_node, &mv_chan->chain)) {
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/*
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* descriptors are still waiting after
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* current, trigger them
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*/
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iter = list_entry(iter->chain_node.next,
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struct mv_xor_desc_slot,
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chain_node);
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mv_xor_start_new_chain(mv_chan, iter);
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} else {
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/*
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* some descriptors are still waiting
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* to be cleaned
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*/
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tasklet_schedule(&mv_chan->irq_tasklet);
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}
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}
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}
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if (cookie > 0)
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@ -31,6 +31,7 @@
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#define XOR_OPERATION_MODE_XOR 0
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#define XOR_OPERATION_MODE_MEMCPY 2
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#define XOR_DESCRIPTOR_SWAP BIT(14)
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#define XOR_DESC_SUCCESS 0x40000000
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#define XOR_DESC_DMA_OWNED BIT(31)
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#define XOR_DESC_EOD_INT_EN BIT(31)
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