Minki/linux
1
0
Fork 1
mirror of https://github.com/torvalds/linux.git synced 2024-12-01 00:21:32 +00:00
Code Issues Packages Projects Releases Wiki Activity

mtd: NAND: jz4740: Remove custom {read,write}_page handlers

Browse Source 
Now that the mtd core supports more then 64 ecc bytes we can use it instead of
some a custom hack in the jz4740 nand driver.
This patch removes the custom {read,write}_page handlers from the jz4740 nand
driver. Thus the driver will now fallback to the default handlers from the nand
core.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This commit is contained in:
Lars-Peter Clausen 2010-11-11 19:02:48 +01:00 committed by David Woodhouse
parent a338adafed
commit 9118ea321e
1 changed files with 0 additions and 55 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

55
drivers/mtd/nand/jz4740_nand.c
View File

@ -251,58 +251,6 @@ static int jz_nand_correct_ecc_rs(struct mtd_info *mtd, uint8_t *dat,
return 0;
}
/* Copy paste of nand_read_page_hwecc_oob_first except for different eccpos
* handling. The ecc area is for 4k chips 72 bytes long and thus does not fit
* into the eccpos array. */
static int jz_nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
struct nand_chip *chip, uint8_t *buf, int page)
{
int i, eccsize = chip->ecc.size;
int eccbytes = chip->ecc.bytes;
int eccsteps = chip->ecc.steps;
uint8_t *p = buf;
unsigned int ecc_offset = chip->page_shift;
/* Read the OOB area first */
chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
for (i = ecc_offset; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
int stat;
chip->ecc.hwctl(mtd, NAND_ECC_READ);
chip->read_buf(mtd, p, eccsize);
stat = chip->ecc.correct(mtd, p, &chip->oob_poi[i], NULL);
if (stat < 0)
mtd->ecc_stats.failed++;
else
mtd->ecc_stats.corrected += stat;
}
return 0;
}
/* Copy-and-paste of nand_write_page_hwecc with different eccpos handling. */
static void jz_nand_write_page_hwecc(struct mtd_info *mtd,
struct nand_chip *chip, const uint8_t *buf)
{
int i, eccsize = chip->ecc.size;
int eccbytes = chip->ecc.bytes;
int eccsteps = chip->ecc.steps;
const uint8_t *p = buf;
unsigned int ecc_offset = chip->page_shift;
for (i = ecc_offset; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
chip->write_buf(mtd, p, eccsize);
chip->ecc.calculate(mtd, p, &chip->oob_poi[i]);
}
chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
}
#ifdef CONFIG_MTD_CMDLINE_PARTS
static const char *part_probes[] = {"cmdline", NULL};
#endif
@ -393,9 +341,6 @@ static int __devinit jz_nand_probe(struct platform_device *pdev)
chip->ecc.size = 512;
chip->ecc.bytes = 9;
chip->ecc.read_page = jz_nand_read_page_hwecc_oob_first;
chip->ecc.write_page = jz_nand_write_page_hwecc;
if (pdata)
chip->ecc.layout = pdata->ecc_layout;