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KVM: x86 emulator: preserve an operand's segment identity
Currently the x86 emulator converts the segment register associated with an operand into a segment base which is added into the operand address. This loss of information results in us not doing segment limit checks properly. Replace struct operand's addr.mem field by a segmented_address structure which holds both the effetive address and segment. This will allow us to do the limit check at the point of access. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
This commit is contained in:
Avi Kivity
parent
d53db5efc2
commit
90de84f50b
@ -159,7 +159,10 @@ struct operand {
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};
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union {
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unsigned long *reg;
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unsigned long mem;
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struct segmented_address {
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ulong ea;
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unsigned seg;
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} mem;
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} addr;
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union {
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unsigned long val;
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@ -410,9 +410,9 @@ address_mask(struct decode_cache *c, unsigned long reg)
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}
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static inline unsigned long
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register_address(struct decode_cache *c, unsigned long base, unsigned long reg)
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register_address(struct decode_cache *c, unsigned long reg)
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{
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return base + address_mask(c, reg);
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return address_mask(c, reg);
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}
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static inline void
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@ -444,26 +444,26 @@ static unsigned long seg_base(struct x86_emulate_ctxt *ctxt,
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return ops->get_cached_segment_base(seg, ctxt->vcpu);
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}
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static unsigned long seg_override_base(struct x86_emulate_ctxt *ctxt,
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struct x86_emulate_ops *ops,
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struct decode_cache *c)
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static unsigned seg_override(struct x86_emulate_ctxt *ctxt,
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struct x86_emulate_ops *ops,
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struct decode_cache *c)
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{
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if (!c->has_seg_override)
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return 0;
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return seg_base(ctxt, ops, c->seg_override);
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return c->seg_override;
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}
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static unsigned long es_base(struct x86_emulate_ctxt *ctxt,
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struct x86_emulate_ops *ops)
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static ulong linear(struct x86_emulate_ctxt *ctxt,
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struct segmented_address addr)
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{
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return seg_base(ctxt, ops, VCPU_SREG_ES);
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}
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struct decode_cache *c = &ctxt->decode;
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ulong la;
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static unsigned long ss_base(struct x86_emulate_ctxt *ctxt,
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struct x86_emulate_ops *ops)
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{
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return seg_base(ctxt, ops, VCPU_SREG_SS);
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la = seg_base(ctxt, ctxt->ops, addr.seg) + addr.ea;
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if (c->ad_bytes != 8)
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la &= (u32)-1;
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return la;
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}
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static void emulate_exception(struct x86_emulate_ctxt *ctxt, int vec,
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@ -556,7 +556,7 @@ static void *decode_register(u8 modrm_reg, unsigned long *regs,
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static int read_descriptor(struct x86_emulate_ctxt *ctxt,
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struct x86_emulate_ops *ops,
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ulong addr,
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struct segmented_address addr,
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u16 *size, unsigned long *address, int op_bytes)
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{
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int rc;
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@ -564,10 +564,12 @@ static int read_descriptor(struct x86_emulate_ctxt *ctxt,
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if (op_bytes == 2)
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op_bytes = 3;
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*address = 0;
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rc = ops->read_std(addr, (unsigned long *)size, 2, ctxt->vcpu, NULL);
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rc = ops->read_std(linear(ctxt, addr), (unsigned long *)size, 2,
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ctxt->vcpu, NULL);
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if (rc != X86EMUL_CONTINUE)
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return rc;
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rc = ops->read_std(addr + 2, address, op_bytes, ctxt->vcpu, NULL);
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rc = ops->read_std(linear(ctxt, addr) + 2, address, op_bytes,
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ctxt->vcpu, NULL);
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return rc;
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}
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@ -760,7 +762,7 @@ static int decode_modrm(struct x86_emulate_ctxt *ctxt,
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break;
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}
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}
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op->addr.mem = modrm_ea;
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op->addr.mem.ea = modrm_ea;
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done:
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return rc;
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}
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@ -775,13 +777,13 @@ static int decode_abs(struct x86_emulate_ctxt *ctxt,
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op->type = OP_MEM;
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switch (c->ad_bytes) {
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case 2:
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op->addr.mem = insn_fetch(u16, 2, c->eip);
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op->addr.mem.ea = insn_fetch(u16, 2, c->eip);
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break;
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case 4:
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op->addr.mem = insn_fetch(u32, 4, c->eip);
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op->addr.mem.ea = insn_fetch(u32, 4, c->eip);
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break;
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case 8:
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op->addr.mem = insn_fetch(u64, 8, c->eip);
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op->addr.mem.ea = insn_fetch(u64, 8, c->eip);
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break;
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}
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done:
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@ -800,7 +802,7 @@ static void fetch_bit_operand(struct decode_cache *c)
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else if (c->src.bytes == 4)
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sv = (s32)c->src.val & (s32)mask;
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c->dst.addr.mem += (sv >> 3);
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c->dst.addr.mem.ea += (sv >> 3);
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}
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/* only subword offset */
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@ -1093,7 +1095,7 @@ static inline int writeback(struct x86_emulate_ctxt *ctxt,
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case OP_MEM:
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if (c->lock_prefix)
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rc = ops->cmpxchg_emulated(
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c->dst.addr.mem,
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linear(ctxt, c->dst.addr.mem),
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&c->dst.orig_val,
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&c->dst.val,
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c->dst.bytes,
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@ -1101,7 +1103,7 @@ static inline int writeback(struct x86_emulate_ctxt *ctxt,
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ctxt->vcpu);
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else
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rc = ops->write_emulated(
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c->dst.addr.mem,
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linear(ctxt, c->dst.addr.mem),
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&c->dst.val,
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c->dst.bytes,
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&err,
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@ -1129,8 +1131,8 @@ static inline void emulate_push(struct x86_emulate_ctxt *ctxt,
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c->dst.bytes = c->op_bytes;
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c->dst.val = c->src.val;
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register_address_increment(c, &c->regs[VCPU_REGS_RSP], -c->op_bytes);
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c->dst.addr.mem = register_address(c, ss_base(ctxt, ops),
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c->regs[VCPU_REGS_RSP]);
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c->dst.addr.mem.ea = register_address(c, c->regs[VCPU_REGS_RSP]);
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c->dst.addr.mem.seg = VCPU_SREG_SS;
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}
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static int emulate_pop(struct x86_emulate_ctxt *ctxt,
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@ -1139,10 +1141,11 @@ static int emulate_pop(struct x86_emulate_ctxt *ctxt,
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{
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struct decode_cache *c = &ctxt->decode;
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int rc;
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struct segmented_address addr;
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rc = read_emulated(ctxt, ops, register_address(c, ss_base(ctxt, ops),
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c->regs[VCPU_REGS_RSP]),
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dest, len);
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addr.ea = register_address(c, c->regs[VCPU_REGS_RSP]);
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addr.seg = VCPU_SREG_SS;
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rc = read_emulated(ctxt, ops, linear(ctxt, addr), dest, len);
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if (rc != X86EMUL_CONTINUE)
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return rc;
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@ -2223,14 +2226,15 @@ int emulator_task_switch(struct x86_emulate_ctxt *ctxt,
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return (rc == X86EMUL_UNHANDLEABLE) ? -1 : 0;
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}
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static void string_addr_inc(struct x86_emulate_ctxt *ctxt, unsigned long base,
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static void string_addr_inc(struct x86_emulate_ctxt *ctxt, unsigned seg,
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int reg, struct operand *op)
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{
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struct decode_cache *c = &ctxt->decode;
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int df = (ctxt->eflags & EFLG_DF) ? -1 : 1;
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register_address_increment(c, &c->regs[reg], df * op->bytes);
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op->addr.mem = register_address(c, base, c->regs[reg]);
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op->addr.mem.ea = register_address(c, c->regs[reg]);
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op->addr.mem.seg = seg;
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}
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static int em_push(struct x86_emulate_ctxt *ctxt)
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@ -2639,7 +2643,7 @@ static int decode_imm(struct x86_emulate_ctxt *ctxt, struct operand *op,
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op->type = OP_IMM;
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op->bytes = size;
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op->addr.mem = c->eip;
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op->addr.mem.ea = c->eip;
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/* NB. Immediates are sign-extended as necessary. */
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switch (op->bytes) {
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case 1:
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@ -2821,14 +2825,13 @@ done_prefixes:
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if (!c->has_seg_override)
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set_seg_override(c, VCPU_SREG_DS);
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if (memop.type == OP_MEM && !(!c->twobyte && c->b == 0x8d))
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memop.addr.mem += seg_override_base(ctxt, ops, c);
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memop.addr.mem.seg = seg_override(ctxt, ops, c);
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if (memop.type == OP_MEM && c->ad_bytes != 8)
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memop.addr.mem = (u32)memop.addr.mem;
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memop.addr.mem.ea = (u32)memop.addr.mem.ea;
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if (memop.type == OP_MEM && c->rip_relative)
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memop.addr.mem += c->eip;
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memop.addr.mem.ea += c->eip;
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/*
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* Decode and fetch the source operand: register, memory
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@ -2880,14 +2883,14 @@ done_prefixes:
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case SrcSI:
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c->src.type = OP_MEM;
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c->src.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
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c->src.addr.mem =
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register_address(c, seg_override_base(ctxt, ops, c),
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c->regs[VCPU_REGS_RSI]);
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c->src.addr.mem.ea =
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register_address(c, c->regs[VCPU_REGS_RSI]);
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c->src.addr.mem.seg = seg_override(ctxt, ops, c),
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c->src.val = 0;
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break;
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case SrcImmFAddr:
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c->src.type = OP_IMM;
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c->src.addr.mem = c->eip;
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c->src.addr.mem.ea = c->eip;
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c->src.bytes = c->op_bytes + 2;
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insn_fetch_arr(c->src.valptr, c->src.bytes, c->eip);
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break;
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@ -2934,7 +2937,7 @@ done_prefixes:
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break;
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case DstImmUByte:
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c->dst.type = OP_IMM;
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c->dst.addr.mem = c->eip;
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c->dst.addr.mem.ea = c->eip;
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c->dst.bytes = 1;
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c->dst.val = insn_fetch(u8, 1, c->eip);
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break;
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@ -2959,9 +2962,9 @@ done_prefixes:
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case DstDI:
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c->dst.type = OP_MEM;
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c->dst.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
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c->dst.addr.mem =
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register_address(c, es_base(ctxt, ops),
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c->regs[VCPU_REGS_RDI]);
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c->dst.addr.mem.ea =
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register_address(c, c->regs[VCPU_REGS_RDI]);
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c->dst.addr.mem.seg = VCPU_SREG_ES;
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c->dst.val = 0;
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break;
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case ImplicitOps:
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@ -3040,7 +3043,7 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt)
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}
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if ((c->src.type == OP_MEM) && !(c->d & NoAccess)) {
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rc = read_emulated(ctxt, ops, c->src.addr.mem,
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rc = read_emulated(ctxt, ops, linear(ctxt, c->src.addr.mem),
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c->src.valptr, c->src.bytes);
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if (rc != X86EMUL_CONTINUE)
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goto done;
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@ -3048,7 +3051,7 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt)
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}
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if (c->src2.type == OP_MEM) {
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rc = read_emulated(ctxt, ops, c->src2.addr.mem,
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rc = read_emulated(ctxt, ops, linear(ctxt, c->src2.addr.mem),
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&c->src2.val, c->src2.bytes);
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if (rc != X86EMUL_CONTINUE)
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goto done;
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@ -3060,7 +3063,7 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt)
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if ((c->dst.type == OP_MEM) && !(c->d & Mov)) {
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/* optimisation - avoid slow emulated read if Mov */
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rc = read_emulated(ctxt, ops, c->dst.addr.mem,
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rc = read_emulated(ctxt, ops, linear(ctxt, c->dst.addr.mem),
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&c->dst.val, c->dst.bytes);
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if (rc != X86EMUL_CONTINUE)
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goto done;
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@ -3211,7 +3214,7 @@ special_insn:
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c->dst.val = ops->get_segment_selector(c->modrm_reg, ctxt->vcpu);
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break;
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case 0x8d: /* lea r16/r32, m */
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c->dst.val = c->src.addr.mem;
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c->dst.val = c->src.addr.mem.ea;
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break;
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case 0x8e: { /* mov seg, r/m16 */
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uint16_t sel;
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@ -3438,11 +3441,11 @@ writeback:
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c->dst.type = saved_dst_type;
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if ((c->d & SrcMask) == SrcSI)
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string_addr_inc(ctxt, seg_override_base(ctxt, ops, c),
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string_addr_inc(ctxt, seg_override(ctxt, ops, c),
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VCPU_REGS_RSI, &c->src);
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if ((c->d & DstMask) == DstDI)
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string_addr_inc(ctxt, es_base(ctxt, ops), VCPU_REGS_RDI,
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string_addr_inc(ctxt, VCPU_SREG_ES, VCPU_REGS_RDI,
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&c->dst);
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if (c->rep_prefix && (c->d & String)) {
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@ -3535,7 +3538,8 @@ twobyte_insn:
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emulate_ud(ctxt);
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goto done;
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case 7: /* invlpg*/
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emulate_invlpg(ctxt->vcpu, c->src.addr.mem);
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emulate_invlpg(ctxt->vcpu,
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linear(ctxt, c->src.addr.mem));
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/* Disable writeback. */
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c->dst.type = OP_NONE;
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break;
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