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b43: N-PHY: RSSI calibration for rev < 3
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Rafał Miłecki
John W. Linville
parent
dfb4aa5dd0
commit
90b9738d85
@ -685,7 +685,160 @@ static int b43_nphy_poll_rssi(struct b43_wldev *dev, u8 type, s32 *buf,
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSICal */
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static void b43_nphy_rev2_rssi_cal(struct b43_wldev *dev, u8 type)
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{
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/* TODO */
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int i, j;
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u8 state[4];
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u8 code, val;
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u16 class, override;
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u8 regs_save_radio[2];
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u16 regs_save_phy[2];
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s8 offset[4];
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u16 clip_state[2];
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u16 clip_off[2] = { 0xFFFF, 0xFFFF };
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s32 results_min[4] = { };
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u8 vcm_final[4] = { };
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s32 results[4][4] = { };
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s32 miniq[4][2] = { };
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if (type == 2) {
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code = 0;
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val = 6;
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} else if (type < 2) {
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code = 25;
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val = 4;
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} else {
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B43_WARN_ON(1);
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return;
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}
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class = b43_nphy_classifier(dev, 0, 0);
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b43_nphy_classifier(dev, 7, 4);
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b43_nphy_read_clip_detection(dev, clip_state);
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b43_nphy_write_clip_detection(dev, clip_off);
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if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
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override = 0x140;
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else
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override = 0x110;
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regs_save_phy[0] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1);
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regs_save_radio[0] = b43_radio_read16(dev, B2055_C1_PD_RXTX);
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b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, override);
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b43_radio_write16(dev, B2055_C1_PD_RXTX, val);
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regs_save_phy[1] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2);
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regs_save_radio[1] = b43_radio_read16(dev, B2055_C2_PD_RXTX);
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b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, override);
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b43_radio_write16(dev, B2055_C2_PD_RXTX, val);
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state[0] = b43_radio_read16(dev, B2055_C1_PD_RSSIMISC) & 0x07;
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state[1] = b43_radio_read16(dev, B2055_C2_PD_RSSIMISC) & 0x07;
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b43_radio_mask(dev, B2055_C1_PD_RSSIMISC, 0xF8);
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b43_radio_mask(dev, B2055_C2_PD_RSSIMISC, 0xF8);
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state[2] = b43_radio_read16(dev, B2055_C1_SP_RSSI) & 0x07;
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state[3] = b43_radio_read16(dev, B2055_C2_SP_RSSI) & 0x07;
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b43_nphy_rssi_select(dev, 5, type);
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b43_nphy_scale_offset_rssi(dev, 0, 0, 5, 0, type);
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b43_nphy_scale_offset_rssi(dev, 0, 0, 5, 1, type);
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for (i = 0; i < 4; i++) {
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u8 tmp[4];
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for (j = 0; j < 4; j++)
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tmp[j] = i;
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if (type != 1)
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b43_nphy_set_rssi_2055_vcm(dev, type, tmp);
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b43_nphy_poll_rssi(dev, type, results[i], 8);
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if (type < 2)
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for (j = 0; j < 2; j++)
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miniq[i][j] = min(results[i][2 * j],
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results[i][2 * j + 1]);
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}
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for (i = 0; i < 4; i++) {
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s32 mind = 40;
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u8 minvcm = 0;
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s32 minpoll = 249;
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s32 curr;
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for (j = 0; j < 4; j++) {
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if (type == 2)
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curr = abs(results[j][i]);
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else
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curr = abs(miniq[j][i / 2] - code * 8);
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if (curr < mind) {
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mind = curr;
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minvcm = j;
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}
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if (results[j][i] < minpoll)
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minpoll = results[j][i];
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}
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results_min[i] = minpoll;
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vcm_final[i] = minvcm;
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}
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if (type != 1)
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b43_nphy_set_rssi_2055_vcm(dev, type, vcm_final);
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for (i = 0; i < 4; i++) {
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offset[i] = (code * 8) - results[vcm_final[i]][i];
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if (offset[i] < 0)
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offset[i] = -((abs(offset[i]) + 4) / 8);
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else
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offset[i] = (offset[i] + 4) / 8;
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if (results_min[i] == 248)
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offset[i] = code - 32;
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if (i % 2 == 0)
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b43_nphy_scale_offset_rssi(dev, 0, offset[i], 1, 0,
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type);
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else
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b43_nphy_scale_offset_rssi(dev, 0, offset[i], 2, 1,
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type);
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}
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b43_radio_maskset(dev, B2055_C1_PD_RSSIMISC, 0xF8, state[0]);
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b43_radio_maskset(dev, B2055_C1_PD_RSSIMISC, 0xF8, state[1]);
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switch (state[2]) {
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case 1:
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b43_nphy_rssi_select(dev, 1, 2);
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break;
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case 4:
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b43_nphy_rssi_select(dev, 1, 0);
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break;
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case 2:
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b43_nphy_rssi_select(dev, 1, 1);
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break;
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default:
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b43_nphy_rssi_select(dev, 1, 1);
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break;
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}
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switch (state[3]) {
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case 1:
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b43_nphy_rssi_select(dev, 2, 2);
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break;
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case 4:
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b43_nphy_rssi_select(dev, 2, 0);
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break;
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default:
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b43_nphy_rssi_select(dev, 2, 1);
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break;
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}
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b43_nphy_rssi_select(dev, 0, type);
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b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs_save_phy[0]);
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b43_radio_write16(dev, B2055_C1_PD_RXTX, regs_save_radio[0]);
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b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs_save_phy[1]);
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b43_radio_write16(dev, B2055_C2_PD_RXTX, regs_save_radio[1]);
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b43_nphy_classifier(dev, 7, class);
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b43_nphy_write_clip_detection(dev, clip_state);
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSICalRev3 */
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@ -867,7 +1020,7 @@ int b43_phy_initn(struct b43_wldev *dev)
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if (nphy->antsel_type == 2)
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;/*TODO NPHY Superswitch Init with argument 1*/
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if (nphy->perical != 2) {
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/* b43_nphy_rssi_cal(dev); */
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b43_nphy_rssi_cal(dev);
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if (phy->rev >= 3) {
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nphy->cal_orig_pwr_idx[0] =
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nphy->txpwrindex[0].index_internal;
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