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A few OMAP hwmod fixes against v3.4-rc2. One of them is a reversion
of a previous v3.4-rc patch that caused some regressions, and upon further review, appears not to be necessary. The other two are fairly minor. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJPiBVjAAoJEMePsQ0LvSpLVFMP/1DvC1CratbzRATwEhsmC/Y+ GpdcVSQembcYQTe4OaLls5Hi1cY1o82oJodyIxzmRDnv6C9oF39UX1ZsqOFdZJOy x60Y48u819cqlNVj8O54AX1vU92ysMZzVNsmgaGR0LGjlpNLGClL4gyYZwgZng2r fLy7hkbS+/qaf2GZM5UZ3aNql06lDlDxNQSDVLgfg6TdBuRkXElV4N2aG6ceL0Z/ 6bwHBD5DJa7I82X83vRhrBYp5GnELDcHFCDKaP/pfzNWRvNmooPo05xuzWVgaTNb jpfJCL7c2fUtmQxQLIoWSIGwDi+R7483SqunzHoR28yhrhg+vgPx+eAJo+Lw1LJV qejkB8vm8dFuxI/bDZLDim81NJ+kSSbsGuIToShju2ov2Tg0914L3HKAHx0hkE8z sjNapz3PLSlHeYxP9z7j8F1F1GtTOTmf5YlMsncg0WIn5Rp7LtBqGM0T7xy3DTYU JUZ7UdXRZVHBzW+Qw6Bba1i5hrlUwS62eJi0VK0QmDcbqGfUzhMUYtKsTyN3TwUB jCCCjFi0M616LX8OeyU1wJhodSQRqaEW6h+ampmii1Q6bcybl4JTuHe3x5TL0gAm OiWKp//gzItpxXOSytsZJ1rgQZZ9VyKOlxlEbmqdLOQPqHa49u0wzJdKr4i9GW2n 9jNlsf0O2Blm9e0qD2rc =4rgs -----END PGP SIGNATURE----- Merge tag 'omap-fixes-b-for-3.4rc' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into fixes A few OMAP hwmod fixes against v3.4-rc2. One of them is a reversion of a previous v3.4-rc patch that caused some regressions, and upon further review, appears not to be necessary. The other two are fairly minor.
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commit
907025e3ba
@ -1422,6 +1422,9 @@ static int _ocp_softreset(struct omap_hwmod *oh)
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goto dis_opt_clks;
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_write_sysconfig(v, oh);
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if (oh->class->sysc->srst_udelay)
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udelay(oh->class->sysc->srst_udelay);
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if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
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omap_test_timeout((omap_hwmod_read(oh,
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oh->class->sysc->syss_offs)
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@ -1903,10 +1906,20 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
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*/
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int omap_hwmod_softreset(struct omap_hwmod *oh)
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{
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if (!oh)
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u32 v;
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int ret;
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if (!oh || !(oh->_sysc_cache))
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return -EINVAL;
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return _ocp_softreset(oh);
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v = oh->_sysc_cache;
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ret = _set_softreset(oh, &v);
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if (ret)
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goto error;
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_write_sysconfig(v, oh);
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error:
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return ret;
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}
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/**
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@ -1000,7 +1000,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
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.flags = OMAP_FIREWALL_L4,
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}
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},
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.flags = OCPIF_SWSUP_IDLE,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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@ -1049,7 +1049,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
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.slave = &omap2430_dss_venc_hwmod,
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.clk = "dss_ick",
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.addr = omap2_dss_venc_addrs,
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.flags = OCPIF_SWSUP_IDLE,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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@ -1676,7 +1676,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {
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.flags = OMAP_FIREWALL_L4,
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}
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},
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.flags = OCPIF_SWSUP_IDLE,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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@ -2594,6 +2594,15 @@ static struct omap_hwmod omap44xx_ipu_hwmod = {
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static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x0010,
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/*
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* ISS needs 100 OCP clk cycles delay after a softreset before
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* accessing sysconfig again.
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* The lowest frequency at the moment for L3 bus is 100 MHz, so
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* 1usec delay is needed. Add an x2 margin to be safe (2 usecs).
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*
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* TODO: Indicate errata when available.
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*/
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.srst_udelay = 2,
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.sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS |
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SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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@ -305,6 +305,7 @@ struct omap_hwmod_sysc_fields {
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* @rev_offs: IP block revision register offset (from module base addr)
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* @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
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* @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
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* @srst_udelay: Delay needed after doing a softreset in usecs
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* @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
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* @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
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* @clockact: the default value of the module CLOCKACTIVITY bits
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@ -330,9 +331,10 @@ struct omap_hwmod_class_sysconfig {
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u16 sysc_offs;
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u16 syss_offs;
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u16 sysc_flags;
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struct omap_hwmod_sysc_fields *sysc_fields;
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u8 srst_udelay;
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u8 idlemodes;
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u8 clockact;
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struct omap_hwmod_sysc_fields *sysc_fields;
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};
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/**
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