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RISC-V Fixes for 6.0-rc2
* A fix to make the ISA extension static keys writable after init. This manifests at least as a crash when loading modules (including KVM). * A fixup for a build warning related to a poorly formed comment in our perf driver. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEAM520YNJYN/OiG3470yhUCzLq0EFAmL/qf0THHBhbG1lckBk YWJiZWx0LmNvbQAKCRDvTKFQLMurQbGjD/9Fr/B2qqlIc8EnpFseQqqtp7RkLjJP 0JslYH1hHkcM7KC8UoFPPANFO0rXDZLZ24/otBIT7slUw/mlbeBriZkhIHlAs+3/ B8bYf7Vp163wBu6TW+L9bmY9a3cqqkvXrHg7gXCeWTI6zpoRoZji8wuTEj0/lAhS e35xAiLip3qaIFBEKRjKTf0UWJiSPTGyLLvvHM3QbbRl8n7wxxzRPZjkdsYhaztw 3jHu9SFd4HIpJKmWRORAxXbNQOglKSPSegni7QqmqH+4OGw9dJ/0gnwOWPvFcBgy RaeOsHTbLvoFcjExDBIXle9QXg32qWHn9q4Zbvlu8IR6sKaRj42NkwObF8z6dMZg eyvd1t6PXFP8yMmVq1WZca7XT/bJkZ0iGiGgH1qGM1linEi+KNkTqpB73/AXkT0G /nSYkv+rG+JSLlKxOxTF2lPFpCMjuH/XFO/Z3Pvdjkt8NAaY3fjgoeQ9MtOHRpfE MTiq3sk/qE5CEGgrJllQCO2+rqw9dThcBZamiLSBK/UfnkUCb04gTpABBVV6m0OV S6SDqGZcQ+galpiGl5KUQPgBRbhRoSLsOInd/O5fzQvljtxbnU6PIWJ4anKUAL1v BTftFVejyMxB+hnhiecxmu9hYHM91LoyKrWKd2LZu1yrWA5E+5qUys9CP7tsK26U Cjht1kLaA9CoTw== =AppI -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-6.0-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Palmer Dabbelt: - A fix to make the ISA extension static keys writable after init. This manifests at least as a crash when loading modules (including KVM). - A fixup for a build warning related to a poorly formed comment in our perf driver. * tag 'riscv-for-linus-6.0-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: perf: riscv legacy: fix kerneldoc comment warning riscv: Ensure isa-ext static keys are writable
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@ -28,7 +28,7 @@ unsigned long elf_hwcap __read_mostly;
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/* Host ISA bitmap */
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static DECLARE_BITMAP(riscv_isa, RISCV_ISA_EXT_MAX) __read_mostly;
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__ro_after_init DEFINE_STATIC_KEY_ARRAY_FALSE(riscv_isa_ext_keys, RISCV_ISA_EXT_KEY_MAX);
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DEFINE_STATIC_KEY_ARRAY_FALSE(riscv_isa_ext_keys, RISCV_ISA_EXT_KEY_MAX);
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EXPORT_SYMBOL(riscv_isa_ext_keys);
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/**
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@ -72,7 +72,7 @@ static void pmu_legacy_ctr_start(struct perf_event *event, u64 ival)
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local64_set(&hwc->prev_count, initial_val);
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}
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/**
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/*
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* This is just a simple implementation to allow legacy implementations
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* compatible with new RISC-V PMU driver framework.
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* This driver only allows reading two counters i.e CYCLE & INSTRET.
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