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x86: Stop MCEs and NMIs during code patching
When a machine check or NMI occurs while multiple byte code is patched the CPU could theoretically see an inconsistent instruction and crash. Prevent this by temporarily disabling MCEs and returning early in the NMI handler. Based on discussion with Mathieu Desnoyers. Cc: Mathieu Desnoyers <compudj@krystal.dyndns.org> Cc: Jeremy Fitzhardinge <jeremy@goop.org> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -8,6 +8,8 @@
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#include <asm/alternative.h>
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#include <asm/sections.h>
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#include <asm/pgtable.h>
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#include <asm/mce.h>
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#include <asm/nmi.h>
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#ifdef CONFIG_HOTPLUG_CPU
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static int smp_alt_once;
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@ -373,6 +375,14 @@ void __init alternative_instructions(void)
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{
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unsigned long flags;
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/* The patching is not fully atomic, so try to avoid local interruptions
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that might execute the to be patched code.
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Other CPUs are not running. */
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stop_nmi();
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#ifdef CONFIG_MCE
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stop_mce();
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#endif
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local_irq_save(flags);
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apply_alternatives(__alt_instructions, __alt_instructions_end);
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@ -405,6 +415,11 @@ void __init alternative_instructions(void)
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#endif
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apply_paravirt(__parainstructions, __parainstructions_end);
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local_irq_restore(flags);
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restart_nmi();
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#ifdef CONFIG_MCE
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restart_mce();
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#endif
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}
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/*
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@ -60,6 +60,20 @@ void mcheck_init(struct cpuinfo_x86 *c)
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}
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}
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static unsigned long old_cr4 __initdata;
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void __init stop_mce(void)
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{
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old_cr4 = read_cr4();
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clear_in_cr4(X86_CR4_MCE);
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}
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void __init restart_mce(void)
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{
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if (old_cr4 & X86_CR4_MCE)
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set_in_cr4(X86_CR4_MCE);
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}
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static int __init mcheck_disable(char *str)
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{
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mce_disabled = 1;
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@ -775,6 +775,8 @@ static __kprobes void default_do_nmi(struct pt_regs * regs)
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reassert_nmi();
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}
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static int ignore_nmis;
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fastcall __kprobes void do_nmi(struct pt_regs * regs, long error_code)
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{
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int cpu;
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@ -785,11 +787,24 @@ fastcall __kprobes void do_nmi(struct pt_regs * regs, long error_code)
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++nmi_count(cpu);
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default_do_nmi(regs);
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if (!ignore_nmis)
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default_do_nmi(regs);
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nmi_exit();
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}
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void stop_nmi(void)
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{
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acpi_nmi_disable();
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ignore_nmis++;
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}
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void restart_nmi(void)
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{
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ignore_nmis--;
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acpi_nmi_enable();
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}
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#ifdef CONFIG_KPROBES
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fastcall void __kprobes do_int3(struct pt_regs *regs, long error_code)
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{
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@ -667,6 +667,20 @@ static struct miscdevice mce_log_device = {
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&mce_chrdev_ops,
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};
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static unsigned long old_cr4 __initdata;
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void __init stop_mce(void)
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{
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old_cr4 = read_cr4();
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clear_in_cr4(X86_CR4_MCE);
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}
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void __init restart_mce(void)
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{
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if (old_cr4 & X86_CR4_MCE)
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set_in_cr4(X86_CR4_MCE);
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}
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/*
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* Old style boot options parsing. Only for compatibility.
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*/
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@ -384,11 +384,14 @@ int __kprobes nmi_watchdog_tick(struct pt_regs * regs, unsigned reason)
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return rc;
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}
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static unsigned ignore_nmis;
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asmlinkage __kprobes void do_nmi(struct pt_regs * regs, long error_code)
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{
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nmi_enter();
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add_pda(__nmi_count,1);
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default_do_nmi(regs);
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if (!ignore_nmis)
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default_do_nmi(regs);
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nmi_exit();
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}
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@ -401,6 +404,18 @@ int do_nmi_callback(struct pt_regs * regs, int cpu)
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return 0;
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}
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void stop_nmi(void)
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{
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acpi_nmi_disable();
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ignore_nmis++;
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}
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void restart_nmi(void)
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{
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ignore_nmis--;
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acpi_nmi_enable();
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}
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#ifdef CONFIG_SYSCTL
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static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu)
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@ -5,3 +5,7 @@ extern void mcheck_init(struct cpuinfo_x86 *c);
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#endif
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extern int mce_disabled;
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extern void stop_mce(void);
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extern void restart_mce(void);
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@ -57,5 +57,7 @@ unsigned lapic_adjust_nmi_hz(unsigned hz);
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int lapic_watchdog_ok(void);
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void disable_lapic_nmi_watchdog(void);
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void enable_lapic_nmi_watchdog(void);
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void stop_nmi(void);
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void restart_nmi(void);
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#endif /* ASM_NMI_H */
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@ -107,6 +107,9 @@ extern void do_machine_check(struct pt_regs *, long);
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extern int mce_notify_user(void);
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extern void stop_mce(void);
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extern void restart_mce(void);
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#endif
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#endif
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@ -88,5 +88,7 @@ unsigned lapic_adjust_nmi_hz(unsigned hz);
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int lapic_watchdog_ok(void);
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void disable_lapic_nmi_watchdog(void);
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void enable_lapic_nmi_watchdog(void);
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void stop_nmi(void);
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void restart_nmi(void);
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#endif /* ASM_NMI_H */
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