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[MTD NAND] OLPC CAFÉ driver update
- Fix OOB handling, bad block table marker placement - Some cleanups, enable runtime-optional debugging - Allow BBT stuff to be skipped Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This commit is contained in:
David Woodhouse
parent
5467fb0255
commit
8dd851de81
@ -5,7 +5,7 @@
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* Copyright © 2006 David Woodhouse <dwmw2@infradead.org>
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*/
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//#define DEBUG
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#define DEBUG
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#include <linux/device.h>
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#undef DEBUG
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@ -53,15 +53,24 @@ struct cafe_priv {
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static int usedma = 1;
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module_param(usedma, int, 0644);
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static int skipbbt = 0;
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module_param(skipbbt, int, 0644);
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static int debug = 0;
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module_param(debug, int, 0644);
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#define cafe_dev_dbg(dev, args...) do { if (debug) dev_dbg(dev, ##args); } while(0)
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static int cafe_device_ready(struct mtd_info *mtd)
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{
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struct cafe_priv *cafe = mtd->priv;
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int result = !!(readl(cafe->mmio + CAFE_NAND_STATUS) | 0x40000000);
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uint32_t irqs = readl(cafe->mmio + 0x10);
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writel(irqs, cafe->mmio+0x10);
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dev_dbg(&cafe->pdev->dev, "NAND device is%s ready, IRQ %x (%x) (%x,%x)\n",
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result?"":" not", irqs, readl(cafe->mmio + 0x10),
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uint32_t irqs = readl(cafe->mmio + CAFE_NAND_IRQ);
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writel(irqs, cafe->mmio+CAFE_NAND_IRQ);
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cafe_dev_dbg(&cafe->pdev->dev, "NAND device is%s ready, IRQ %x (%x) (%x,%x)\n",
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result?"":" not", irqs, readl(cafe->mmio + CAFE_NAND_IRQ),
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readl(cafe->mmio + 0x3008), readl(cafe->mmio + 0x300c));
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return result;
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}
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@ -77,7 +86,7 @@ static void cafe_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
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memcpy_toio(cafe->mmio + CAFE_NAND_WRITE_DATA + cafe->datalen, buf, len);
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cafe->datalen += len;
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dev_dbg(&cafe->pdev->dev, "Copy 0x%x bytes to write buffer. datalen 0x%x\n",
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cafe_dev_dbg(&cafe->pdev->dev, "Copy 0x%x bytes to write buffer. datalen 0x%x\n",
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len, cafe->datalen);
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}
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@ -90,7 +99,7 @@ static void cafe_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
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else
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memcpy_fromio(buf, cafe->mmio + CAFE_NAND_READ_DATA + cafe->datalen, len);
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dev_dbg(&cafe->pdev->dev, "Copy 0x%x bytes from position 0x%x in read buffer.\n",
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cafe_dev_dbg(&cafe->pdev->dev, "Copy 0x%x bytes from position 0x%x in read buffer.\n",
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len, cafe->datalen);
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cafe->datalen += len;
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}
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@ -101,7 +110,7 @@ static uint8_t cafe_read_byte(struct mtd_info *mtd)
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uint8_t d;
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cafe_read_buf(mtd, &d, 1);
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dev_dbg(&cafe->pdev->dev, "Read %02x\n", d);
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cafe_dev_dbg(&cafe->pdev->dev, "Read %02x\n", d);
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return d;
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}
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@ -115,14 +124,14 @@ static void cafe_nand_cmdfunc(struct mtd_info *mtd, unsigned command,
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uint32_t doneint = 0x80000000;
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int i;
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dev_dbg(&cafe->pdev->dev, "cmdfunc %02x, 0x%x, 0x%x\n",
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cafe_dev_dbg(&cafe->pdev->dev, "cmdfunc %02x, 0x%x, 0x%x\n",
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command, column, page_addr);
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if (command == NAND_CMD_ERASE2 || command == NAND_CMD_PAGEPROG) {
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/* Second half of a command we already calculated */
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writel(cafe->ctl2 | 0x100 | command, cafe->mmio + 0x04);
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ctl1 = cafe->ctl1;
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dev_dbg(&cafe->pdev->dev, "Continue command, ctl1 %08x, #data %d\n",
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cafe_dev_dbg(&cafe->pdev->dev, "Continue command, ctl1 %08x, #data %d\n",
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cafe->ctl1, cafe->nr_data);
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goto do_command;
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}
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@ -163,7 +172,7 @@ static void cafe_nand_cmdfunc(struct mtd_info *mtd, unsigned command,
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if (command == NAND_CMD_READID || command == NAND_CMD_STATUS) {
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ctl1 |= (1<<26); /* rd */
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/* Always 5 bytes, for now */
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cafe->datalen = 5;
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cafe->datalen = 4;
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/* And one address cycle -- even for STATUS, since the controller doesn't work without */
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adrbytes = 1;
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} else if (command == NAND_CMD_READ0 || command == NAND_CMD_READ1 ||
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@ -183,7 +192,7 @@ static void cafe_nand_cmdfunc(struct mtd_info *mtd, unsigned command,
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deals with them both at once, later */
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cafe->ctl1 = ctl1;
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cafe->ctl2 = 0;
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dev_dbg(&cafe->pdev->dev, "Setup for delayed command, ctl1 %08x, dlen %x\n",
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cafe_dev_dbg(&cafe->pdev->dev, "Setup for delayed command, ctl1 %08x, dlen %x\n",
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cafe->ctl1, cafe->datalen);
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return;
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}
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@ -194,13 +203,14 @@ static void cafe_nand_cmdfunc(struct mtd_info *mtd, unsigned command,
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writel(cafe->ctl2 | 0x100 | NAND_CMD_READSTART, cafe->mmio + CAFE_NAND_CTRL2);
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do_command:
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if (cafe->datalen == 2112)
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cafe->datalen = 2062;
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dev_dbg(&cafe->pdev->dev, "dlen %x, ctl1 %x, ctl2 %x\n",
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// ECC on read only works if we ...
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// if (cafe->datalen == 2112)
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// cafe->datalen = 2062;
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cafe_dev_dbg(&cafe->pdev->dev, "dlen %x, ctl1 %x, ctl2 %x\n",
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cafe->datalen, ctl1, readl(cafe->mmio+CAFE_NAND_CTRL2));
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/* NB: The datasheet lies -- we really should be subtracting 1 here */
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writel(cafe->datalen, cafe->mmio + CAFE_NAND_DATA_LEN);
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writel(0x90000000, cafe->mmio + 0x10);
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writel(0x90000000, cafe->mmio + CAFE_NAND_IRQ);
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if (usedma && (ctl1 & (3<<25))) {
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uint32_t dmactl = 0xc0000000 + cafe->datalen;
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/* If WR or RD bits set, set up DMA */
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@ -230,20 +240,20 @@ static void cafe_nand_cmdfunc(struct mtd_info *mtd, unsigned command,
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ndelay(100);
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if (1) {
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int c = 50000;
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int c = 500000;
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uint32_t irqs;
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while (c--) {
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irqs = readl(cafe->mmio + 0x10);
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irqs = readl(cafe->mmio + CAFE_NAND_IRQ);
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if (irqs & doneint)
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break;
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udelay(1);
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if (!(c & 1000))
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dev_dbg(&cafe->pdev->dev, "Wait for ready, IRQ %x\n", irqs);
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if (!(c % 100000))
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cafe_dev_dbg(&cafe->pdev->dev, "Wait for ready, IRQ %x\n", irqs);
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cpu_relax();
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}
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writel(doneint, cafe->mmio + 0x10);
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dev_dbg(&cafe->pdev->dev, "Command %x completed after %d usec, irqs %x (%x)\n", command, 50000-c, irqs, readl(cafe->mmio + 0x10));
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writel(doneint, cafe->mmio + CAFE_NAND_IRQ);
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cafe_dev_dbg(&cafe->pdev->dev, "Command %x completed after %d usec, irqs %x (%x)\n", command, 50000-c, irqs, readl(cafe->mmio + CAFE_NAND_IRQ));
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}
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@ -276,18 +286,18 @@ static void cafe_nand_cmdfunc(struct mtd_info *mtd, unsigned command,
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static void cafe_select_chip(struct mtd_info *mtd, int chipnr)
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{
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//struct cafe_priv *cafe = mtd->priv;
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// dev_dbg(&cafe->pdev->dev, "select_chip %d\n", chipnr);
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// cafe_dev_dbg(&cafe->pdev->dev, "select_chip %d\n", chipnr);
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}
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static int cafe_nand_interrupt(int irq, void *id, struct pt_regs *regs)
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{
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struct mtd_info *mtd = id;
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struct cafe_priv *cafe = mtd->priv;
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uint32_t irqs = readl(cafe->mmio + 0x10);
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writel(irqs & ~0x90000000, cafe->mmio + 0x10);
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uint32_t irqs = readl(cafe->mmio + CAFE_NAND_IRQ);
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writel(irqs & ~0x90000000, cafe->mmio + CAFE_NAND_IRQ);
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if (!irqs)
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return IRQ_NONE;
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dev_dbg(&cafe->pdev->dev, "irq, bits %x (%x)\n", irqs, readl(cafe->mmio + 0x10));
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cafe_dev_dbg(&cafe->pdev->dev, "irq, bits %x (%x)\n", irqs, readl(cafe->mmio + CAFE_NAND_IRQ));
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return IRQ_HANDLED;
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}
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@ -335,7 +345,7 @@ static int cafe_nand_read_page(struct mtd_info *mtd, struct nand_chip *chip,
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WARN_ON(chip->oob_poi != chip->buffers->oobrbuf);
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dev_dbg(&cafe->pdev->dev, "ECC result %08x SYN1,2 %08x\n", readl(cafe->mmio + 0x3c), readl(cafe->mmio + 0x50));
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cafe_dev_dbg(&cafe->pdev->dev, "ECC result %08x SYN1,2 %08x\n", readl(cafe->mmio + 0x3c), readl(cafe->mmio + 0x50));
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chip->read_buf(mtd, buf, mtd->writesize);
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chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
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@ -343,7 +353,44 @@ static int cafe_nand_read_page(struct mtd_info *mtd, struct nand_chip *chip,
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return 0;
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}
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static char foo[14];
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static struct nand_ecclayout cafe_oobinfo_2048 = {
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.eccbytes = 14,
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.eccpos = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13},
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.oobfree = {{14, 50}}
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};
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/* Ick. The BBT code really ought to be able to work this bit out
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for itself from the above */
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static uint8_t cafe_bbt_pattern[] = {'B', 'b', 't', '0' };
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static uint8_t cafe_mirror_pattern[] = {'1', 't', 'b', 'B' };
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static struct nand_bbt_descr cafe_bbt_main_descr_2048 = {
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.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
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| NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
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.offs = 14,
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.len = 4,
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.veroffs = 18,
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.maxblocks = 4,
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.pattern = cafe_bbt_pattern
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};
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static struct nand_bbt_descr cafe_bbt_mirror_descr_2048 = {
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.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
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| NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
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.offs = 14,
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.len = 4,
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.veroffs = 18,
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.maxblocks = 4,
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.pattern = cafe_mirror_pattern
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};
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static struct nand_ecclayout cafe_oobinfo_512 = {
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.eccbytes = 14,
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.eccpos = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13},
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.oobfree = {{14, 2}}
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};
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static void cafe_nand_write_page_lowlevel(struct mtd_info *mtd,
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struct nand_chip *chip, const uint8_t *buf)
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{
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@ -352,8 +399,7 @@ static void cafe_nand_write_page_lowlevel(struct mtd_info *mtd,
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WARN_ON(chip->oob_poi != chip->buffers->oobwbuf);
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chip->write_buf(mtd, buf, mtd->writesize);
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chip->write_buf(mtd, foo, 14);
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// chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
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chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
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/* Set up ECC autogeneration */
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cafe->ctl2 |= (1<<27) | (1<<30);
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@ -410,6 +456,10 @@ static int cafe_nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
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return 0;
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}
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static int cafe_nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
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{
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return 0;
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}
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static int __devinit cafe_nand_probe(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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@ -461,6 +511,11 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev,
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/* Enable the following for a flash based bad block table */
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cafe->nand.options = NAND_USE_FLASH_BBT | NAND_NO_AUTOINCR | NAND_OWN_BUFFERS;
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if (skipbbt) {
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cafe->nand.options |= NAND_SKIP_BBTSCAN;
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cafe->nand.block_bad = cafe_nand_block_bad;
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}
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/* Timings from Marvell's test code (not verified or calculated by us) */
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writel(0xffffffff, cafe->mmio + CAFE_NAND_IRQ_MASK);
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@ -473,7 +528,7 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev,
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writel(0xffffffff, cafe->mmio + CAFE_NAND_TIMING2);
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writel(0xffffffff, cafe->mmio + CAFE_NAND_TIMING3);
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#endif
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writel(0xdfffffff, cafe->mmio + 0x14);
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writel(0xffffffff, cafe->mmio + CAFE_NAND_IRQ_MASK);
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err = request_irq(pdev->irq, &cafe_nand_interrupt, SA_SHIRQ, "CAFE NAND", mtd);
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if (err) {
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dev_warn(&pdev->dev, "Could not register IRQ %d\n", pdev->irq);
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@ -498,18 +553,18 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev,
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writel((cafe->dmaaddr >> 16) >> 16, cafe->mmio + 0x48);
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else
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writel(0, cafe->mmio + 0x48);
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dev_dbg(&cafe->pdev->dev, "Set DMA address to %x (virt %p)\n",
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cafe_dev_dbg(&cafe->pdev->dev, "Set DMA address to %x (virt %p)\n",
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readl(cafe->mmio+0x44), cafe->dmabuf);
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/* Enable NAND IRQ in global IRQ mask register */
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writel(0x80000007, cafe->mmio + 0x300c);
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dev_dbg(&cafe->pdev->dev, "Control %x, IRQ mask %x\n",
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cafe_dev_dbg(&cafe->pdev->dev, "Control %x, IRQ mask %x\n",
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readl(cafe->mmio + 0x3004), readl(cafe->mmio + 0x300c));
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#endif
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#if 1
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mtd->writesize=2048;
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mtd->oobsize = 0x40;
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memset(cafe->dmabuf, 0xa5, 2112);
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memset(cafe->dmabuf, 0x5a, 2112);
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cafe->nand.cmdfunc(mtd, NAND_CMD_READID, 0, -1);
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cafe->nand.read_byte(mtd);
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cafe->nand.read_byte(mtd);
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@ -528,7 +583,7 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev,
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#if 0
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writel(0x84600070, cafe->mmio);
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udelay(10);
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dev_dbg(&cafe->pdev->dev, "Status %x\n", readl(cafe->mmio + 0x30));
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cafe_dev_dbg(&cafe->pdev->dev, "Status %x\n", readl(cafe->mmio + 0x30));
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#endif
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/* Scan to find existance of the device */
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if (nand_scan_ident(mtd, 1)) {
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@ -545,6 +600,9 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev,
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cafe->nand.ecc.mode = NAND_ECC_HW_SYNDROME;
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cafe->nand.ecc.size = mtd->writesize;
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cafe->nand.ecc.bytes = 14;
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cafe->nand.ecc.layout = &cafe_oobinfo_2048;
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cafe->nand.bbt_td = &cafe_bbt_main_descr_2048;
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cafe->nand.bbt_md = &cafe_bbt_mirror_descr_2048;
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cafe->nand.ecc.hwctl = (void *)cafe_nand_bug;
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cafe->nand.ecc.calculate = (void *)cafe_nand_bug;
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cafe->nand.ecc.correct = (void *)cafe_nand_bug;
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@ -564,7 +622,6 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev,
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if (err)
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goto out_irq;
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pci_set_drvdata(pdev, mtd);
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add_mtd_device(mtd);
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goto out;
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@ -633,3 +690,9 @@ MODULE_DESCRIPTION("NAND flash driver for OLPC CAFE chip");
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/* Correct ECC for 2048 bytes of 0xff:
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41 a0 71 65 54 27 f3 93 ec a9 be ed 0b a1 */
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/* dwmw2's B-test board, in case of completely screwing it:
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Bad eraseblock 2394 at 0x12b40000
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Bad eraseblock 2627 at 0x14860000
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Bad eraseblock 3349 at 0x1a2a0000
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*/
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