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x86/PCI: Use pcibios_scan_root() instead of pci_scan_bus_with_sysdata()
pci_scan_bus_with_sysdata() and pcibios_scan_root() are quite similar: pci_scan_bus_with_sysdata pci_scan_bus_on_node(..., &pci_root_ops, -1) pcibios_scan_root pci_scan_bus_on_node(..., &pci_root_ops, get_mp_bus_to_node(busnum)) get_mp_bus_to_node() returns -1 if it couldn't find the node number, so this removes pci_scan_bus_with_sysdata() and uses pcibios_scan_root() instead. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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f19e84824a
commit
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@ -29,7 +29,6 @@ extern int noioapicreroute;
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/* scan a bus after allocating a pci_sysdata for it */
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extern struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops,
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int node);
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extern struct pci_bus *pci_scan_bus_with_sysdata(int busno);
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#ifdef CONFIG_PCI
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@ -697,11 +697,6 @@ struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node)
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return bus;
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}
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struct pci_bus *pci_scan_bus_with_sysdata(int busno)
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{
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return pci_scan_bus_on_node(busno, &pci_root_ops, -1);
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}
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/*
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* NUMA info for PCI busses
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*
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@ -25,9 +25,9 @@ static void pci_fixup_i450nx(struct pci_dev *d)
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dev_dbg(&d->dev, "i450NX PXB %d: %02x/%02x/%02x\n", pxb, busno,
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suba, subb);
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if (busno)
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pci_scan_bus_with_sysdata(busno); /* Bus A */
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pcibios_scan_root(busno); /* Bus A */
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if (suba < subb)
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pci_scan_bus_with_sysdata(suba+1); /* Bus B */
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pcibios_scan_root(suba+1); /* Bus B */
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}
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pcibios_last_bus = -1;
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}
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@ -42,7 +42,7 @@ static void pci_fixup_i450gx(struct pci_dev *d)
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u8 busno;
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pci_read_config_byte(d, 0x4a, &busno);
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dev_info(&d->dev, "i440KX/GX host bridge; secondary bus %02x\n", busno);
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pci_scan_bus_with_sysdata(busno);
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pcibios_scan_root(busno);
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pcibios_last_bus = -1;
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454GX, pci_fixup_i450gx);
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@ -135,11 +135,11 @@ static void pci_fixup_i450nx(struct pci_dev *d)
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pxb, busno, suba, subb);
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if (busno) {
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/* Bus A */
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pci_scan_bus_with_sysdata(QUADLOCAL2BUS(quad, busno));
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pcibios_scan_root(QUADLOCAL2BUS(quad, busno));
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}
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if (suba < subb) {
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/* Bus B */
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pci_scan_bus_with_sysdata(QUADLOCAL2BUS(quad, suba+1));
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pcibios_scan_root(QUADLOCAL2BUS(quad, suba+1));
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}
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}
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pcibios_last_bus = -1;
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@ -159,7 +159,7 @@ int __init pci_numaq_init(void)
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continue;
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printk("Scanning PCI bus %d for quad %d\n",
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QUADLOCAL2BUS(quad,0), quad);
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pci_scan_bus_with_sysdata(QUADLOCAL2BUS(quad, 0));
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pcibios_scan_root(QUADLOCAL2BUS(quad, 0));
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}
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return 0;
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}
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@ -78,8 +78,8 @@ int __init pci_visws_init(void)
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"bridge B (PIIX4) bus: %u\n", pci_bus1, pci_bus0);
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raw_pci_ops = &pci_direct_conf1;
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pci_scan_bus_with_sysdata(pci_bus0);
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pci_scan_bus_with_sysdata(pci_bus1);
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pcibios_scan_root(pci_bus0);
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pcibios_scan_root(pci_bus1);
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pci_fixup_irqs(pci_common_swizzle, visws_map_irq);
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pcibios_resource_survey();
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/* Request bus scan */
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