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pinctrl: qcom: Add support for MDM9615 TLMM
In order to support the Qualcomm MDM9615 SoC, add support for the TLMM using the Qualcomm pinctrl generic driver. Note: the pinctrl is partial, need Documentation to complete all the groups. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Neil Armstrong
Linus Walleij
parent
151b8c5ba1
commit
8b37e88c67
@ -55,6 +55,14 @@ config PINCTRL_MSM8960
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This is the pinctrl, pinmux, pinconf and gpiolib driver for the
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Qualcomm TLMM block found in the Qualcomm 8960 platform.
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config PINCTRL_MDM9615
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tristate "Qualcomm 9615 pin controller driver"
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depends on GPIOLIB && OF
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select PINCTRL_MSM
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help
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This is the pinctrl, pinmux, pinconf and gpiolib driver for the
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Qualcomm TLMM block found in the Qualcomm 9615 platform.
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config PINCTRL_MSM8X74
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tristate "Qualcomm 8x74 pin controller driver"
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depends on GPIOLIB && OF
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@ -10,6 +10,7 @@ obj-$(CONFIG_PINCTRL_MSM8X74) += pinctrl-msm8x74.o
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obj-$(CONFIG_PINCTRL_MSM8916) += pinctrl-msm8916.o
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obj-$(CONFIG_PINCTRL_MSM8996) += pinctrl-msm8996.o
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obj-$(CONFIG_PINCTRL_QDF2XXX) += pinctrl-qdf2xxx.o
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obj-$(CONFIG_PINCTRL_MDM9615) += pinctrl-mdm9615.o
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obj-$(CONFIG_PINCTRL_QCOM_SPMI_PMIC) += pinctrl-spmi-gpio.o
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obj-$(CONFIG_PINCTRL_QCOM_SPMI_PMIC) += pinctrl-spmi-mpp.o
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obj-$(CONFIG_PINCTRL_QCOM_SSBI_PMIC) += pinctrl-ssbi-gpio.o
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483
drivers/pinctrl/qcom/pinctrl-mdm9615.c
Normal file
483
drivers/pinctrl/qcom/pinctrl-mdm9615.c
Normal file
@ -0,0 +1,483 @@
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/*
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* Copyright (c) 2014, Sony Mobile Communications AB.
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* Copyright (c) 2016 BayLibre, SAS.
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* Author : Neil Armstrong <narmstrong@baylibre.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include "pinctrl-msm.h"
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static const struct pinctrl_pin_desc mdm9615_pins[] = {
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PINCTRL_PIN(0, "GPIO_0"),
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PINCTRL_PIN(1, "GPIO_1"),
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PINCTRL_PIN(2, "GPIO_2"),
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PINCTRL_PIN(3, "GPIO_3"),
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PINCTRL_PIN(4, "GPIO_4"),
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PINCTRL_PIN(5, "GPIO_5"),
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PINCTRL_PIN(6, "GPIO_6"),
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PINCTRL_PIN(7, "GPIO_7"),
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PINCTRL_PIN(8, "GPIO_8"),
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PINCTRL_PIN(9, "GPIO_9"),
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PINCTRL_PIN(10, "GPIO_10"),
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PINCTRL_PIN(11, "GPIO_11"),
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PINCTRL_PIN(12, "GPIO_12"),
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PINCTRL_PIN(13, "GPIO_13"),
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PINCTRL_PIN(14, "GPIO_14"),
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PINCTRL_PIN(15, "GPIO_15"),
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PINCTRL_PIN(16, "GPIO_16"),
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PINCTRL_PIN(17, "GPIO_17"),
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PINCTRL_PIN(18, "GPIO_18"),
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PINCTRL_PIN(19, "GPIO_19"),
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PINCTRL_PIN(20, "GPIO_20"),
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PINCTRL_PIN(21, "GPIO_21"),
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PINCTRL_PIN(22, "GPIO_22"),
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PINCTRL_PIN(23, "GPIO_23"),
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PINCTRL_PIN(24, "GPIO_24"),
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PINCTRL_PIN(25, "GPIO_25"),
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PINCTRL_PIN(26, "GPIO_26"),
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PINCTRL_PIN(27, "GPIO_27"),
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PINCTRL_PIN(28, "GPIO_28"),
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PINCTRL_PIN(29, "GPIO_29"),
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PINCTRL_PIN(30, "GPIO_30"),
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PINCTRL_PIN(31, "GPIO_31"),
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PINCTRL_PIN(32, "GPIO_32"),
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PINCTRL_PIN(33, "GPIO_33"),
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PINCTRL_PIN(34, "GPIO_34"),
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PINCTRL_PIN(35, "GPIO_35"),
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PINCTRL_PIN(36, "GPIO_36"),
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PINCTRL_PIN(37, "GPIO_37"),
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PINCTRL_PIN(38, "GPIO_38"),
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PINCTRL_PIN(39, "GPIO_39"),
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PINCTRL_PIN(40, "GPIO_40"),
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PINCTRL_PIN(41, "GPIO_41"),
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PINCTRL_PIN(42, "GPIO_42"),
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PINCTRL_PIN(43, "GPIO_43"),
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PINCTRL_PIN(44, "GPIO_44"),
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PINCTRL_PIN(45, "GPIO_45"),
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PINCTRL_PIN(46, "GPIO_46"),
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PINCTRL_PIN(47, "GPIO_47"),
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PINCTRL_PIN(48, "GPIO_48"),
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PINCTRL_PIN(49, "GPIO_49"),
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PINCTRL_PIN(50, "GPIO_50"),
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PINCTRL_PIN(51, "GPIO_51"),
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PINCTRL_PIN(52, "GPIO_52"),
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PINCTRL_PIN(53, "GPIO_53"),
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PINCTRL_PIN(54, "GPIO_54"),
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PINCTRL_PIN(55, "GPIO_55"),
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PINCTRL_PIN(56, "GPIO_56"),
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PINCTRL_PIN(57, "GPIO_57"),
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PINCTRL_PIN(58, "GPIO_58"),
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PINCTRL_PIN(59, "GPIO_59"),
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PINCTRL_PIN(60, "GPIO_60"),
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PINCTRL_PIN(61, "GPIO_61"),
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PINCTRL_PIN(62, "GPIO_62"),
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PINCTRL_PIN(63, "GPIO_63"),
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PINCTRL_PIN(64, "GPIO_64"),
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PINCTRL_PIN(65, "GPIO_65"),
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PINCTRL_PIN(66, "GPIO_66"),
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PINCTRL_PIN(67, "GPIO_67"),
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PINCTRL_PIN(68, "GPIO_68"),
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PINCTRL_PIN(69, "GPIO_69"),
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PINCTRL_PIN(70, "GPIO_70"),
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PINCTRL_PIN(71, "GPIO_71"),
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PINCTRL_PIN(72, "GPIO_72"),
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PINCTRL_PIN(73, "GPIO_73"),
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PINCTRL_PIN(74, "GPIO_74"),
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PINCTRL_PIN(75, "GPIO_75"),
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PINCTRL_PIN(76, "GPIO_76"),
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PINCTRL_PIN(77, "GPIO_77"),
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PINCTRL_PIN(78, "GPIO_78"),
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PINCTRL_PIN(79, "GPIO_79"),
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PINCTRL_PIN(80, "GPIO_80"),
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PINCTRL_PIN(81, "GPIO_81"),
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PINCTRL_PIN(82, "GPIO_82"),
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PINCTRL_PIN(83, "GPIO_83"),
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PINCTRL_PIN(84, "GPIO_84"),
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PINCTRL_PIN(85, "GPIO_85"),
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PINCTRL_PIN(86, "GPIO_86"),
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PINCTRL_PIN(87, "GPIO_87"),
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};
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#define DECLARE_MSM_GPIO_PINS(pin) \
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static const unsigned int gpio##pin##_pins[] = { pin }
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DECLARE_MSM_GPIO_PINS(0);
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DECLARE_MSM_GPIO_PINS(1);
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DECLARE_MSM_GPIO_PINS(2);
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DECLARE_MSM_GPIO_PINS(3);
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DECLARE_MSM_GPIO_PINS(4);
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DECLARE_MSM_GPIO_PINS(5);
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DECLARE_MSM_GPIO_PINS(6);
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DECLARE_MSM_GPIO_PINS(7);
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DECLARE_MSM_GPIO_PINS(8);
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DECLARE_MSM_GPIO_PINS(9);
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DECLARE_MSM_GPIO_PINS(10);
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DECLARE_MSM_GPIO_PINS(11);
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DECLARE_MSM_GPIO_PINS(12);
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DECLARE_MSM_GPIO_PINS(13);
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DECLARE_MSM_GPIO_PINS(14);
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DECLARE_MSM_GPIO_PINS(15);
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DECLARE_MSM_GPIO_PINS(16);
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DECLARE_MSM_GPIO_PINS(17);
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DECLARE_MSM_GPIO_PINS(18);
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DECLARE_MSM_GPIO_PINS(19);
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DECLARE_MSM_GPIO_PINS(20);
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DECLARE_MSM_GPIO_PINS(21);
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DECLARE_MSM_GPIO_PINS(22);
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DECLARE_MSM_GPIO_PINS(23);
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DECLARE_MSM_GPIO_PINS(24);
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DECLARE_MSM_GPIO_PINS(25);
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DECLARE_MSM_GPIO_PINS(26);
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DECLARE_MSM_GPIO_PINS(27);
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DECLARE_MSM_GPIO_PINS(28);
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DECLARE_MSM_GPIO_PINS(29);
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DECLARE_MSM_GPIO_PINS(30);
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DECLARE_MSM_GPIO_PINS(31);
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DECLARE_MSM_GPIO_PINS(32);
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DECLARE_MSM_GPIO_PINS(33);
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DECLARE_MSM_GPIO_PINS(34);
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DECLARE_MSM_GPIO_PINS(35);
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DECLARE_MSM_GPIO_PINS(36);
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DECLARE_MSM_GPIO_PINS(37);
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DECLARE_MSM_GPIO_PINS(38);
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DECLARE_MSM_GPIO_PINS(39);
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DECLARE_MSM_GPIO_PINS(40);
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DECLARE_MSM_GPIO_PINS(41);
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DECLARE_MSM_GPIO_PINS(42);
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DECLARE_MSM_GPIO_PINS(43);
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DECLARE_MSM_GPIO_PINS(44);
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DECLARE_MSM_GPIO_PINS(45);
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DECLARE_MSM_GPIO_PINS(46);
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DECLARE_MSM_GPIO_PINS(47);
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DECLARE_MSM_GPIO_PINS(48);
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DECLARE_MSM_GPIO_PINS(49);
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DECLARE_MSM_GPIO_PINS(50);
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DECLARE_MSM_GPIO_PINS(51);
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DECLARE_MSM_GPIO_PINS(52);
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DECLARE_MSM_GPIO_PINS(53);
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DECLARE_MSM_GPIO_PINS(54);
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DECLARE_MSM_GPIO_PINS(55);
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DECLARE_MSM_GPIO_PINS(56);
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DECLARE_MSM_GPIO_PINS(57);
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DECLARE_MSM_GPIO_PINS(58);
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DECLARE_MSM_GPIO_PINS(59);
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DECLARE_MSM_GPIO_PINS(60);
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DECLARE_MSM_GPIO_PINS(61);
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DECLARE_MSM_GPIO_PINS(62);
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DECLARE_MSM_GPIO_PINS(63);
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DECLARE_MSM_GPIO_PINS(64);
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DECLARE_MSM_GPIO_PINS(65);
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DECLARE_MSM_GPIO_PINS(66);
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DECLARE_MSM_GPIO_PINS(67);
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DECLARE_MSM_GPIO_PINS(68);
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DECLARE_MSM_GPIO_PINS(69);
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DECLARE_MSM_GPIO_PINS(70);
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DECLARE_MSM_GPIO_PINS(71);
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DECLARE_MSM_GPIO_PINS(72);
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DECLARE_MSM_GPIO_PINS(73);
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DECLARE_MSM_GPIO_PINS(74);
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DECLARE_MSM_GPIO_PINS(75);
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DECLARE_MSM_GPIO_PINS(76);
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DECLARE_MSM_GPIO_PINS(77);
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DECLARE_MSM_GPIO_PINS(78);
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DECLARE_MSM_GPIO_PINS(79);
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DECLARE_MSM_GPIO_PINS(80);
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DECLARE_MSM_GPIO_PINS(81);
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DECLARE_MSM_GPIO_PINS(82);
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DECLARE_MSM_GPIO_PINS(83);
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DECLARE_MSM_GPIO_PINS(84);
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DECLARE_MSM_GPIO_PINS(85);
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DECLARE_MSM_GPIO_PINS(86);
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DECLARE_MSM_GPIO_PINS(87);
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#define FUNCTION(fname) \
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[MSM_MUX_##fname] = { \
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.name = #fname, \
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.groups = fname##_groups, \
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.ngroups = ARRAY_SIZE(fname##_groups), \
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}
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#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \
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{ \
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.name = "gpio" #id, \
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.pins = gpio##id##_pins, \
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.npins = ARRAY_SIZE(gpio##id##_pins), \
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.funcs = (int[]){ \
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MSM_MUX_gpio, \
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MSM_MUX_##f1, \
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MSM_MUX_##f2, \
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MSM_MUX_##f3, \
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MSM_MUX_##f4, \
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MSM_MUX_##f5, \
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MSM_MUX_##f6, \
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MSM_MUX_##f7, \
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MSM_MUX_##f8, \
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MSM_MUX_##f9, \
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MSM_MUX_##f10, \
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MSM_MUX_##f11 \
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}, \
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.nfuncs = 12, \
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.ctl_reg = 0x1000 + 0x10 * id, \
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.io_reg = 0x1004 + 0x10 * id, \
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.intr_cfg_reg = 0x1008 + 0x10 * id, \
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.intr_status_reg = 0x100c + 0x10 * id, \
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.intr_target_reg = 0x400 + 0x4 * id, \
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.mux_bit = 2, \
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.pull_bit = 0, \
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.drv_bit = 6, \
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.oe_bit = 9, \
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.in_bit = 0, \
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.out_bit = 1, \
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.intr_enable_bit = 0, \
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.intr_status_bit = 0, \
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.intr_ack_high = 1, \
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.intr_target_bit = 0, \
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.intr_target_kpss_val = 4, \
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.intr_raw_status_bit = 3, \
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.intr_polarity_bit = 1, \
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.intr_detection_bit = 2, \
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.intr_detection_width = 1, \
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}
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enum mdm9615_functions {
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MSM_MUX_gpio,
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MSM_MUX_gsbi2_i2c,
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MSM_MUX_gsbi3,
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MSM_MUX_gsbi4,
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MSM_MUX_gsbi5_i2c,
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MSM_MUX_gsbi5_uart,
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MSM_MUX_sdc2,
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MSM_MUX_ebi2_lcdc,
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MSM_MUX_ps_hold,
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MSM_MUX_prim_audio,
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MSM_MUX_sec_audio,
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MSM_MUX_cdc_mclk,
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MSM_MUX_NA,
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};
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static const char * const gpio_groups[] = {
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"gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
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"gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
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"gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
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"gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
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"gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
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"gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
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"gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
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"gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
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"gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
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"gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
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"gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
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"gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
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"gpio85", "gpio86", "gpio87"
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};
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static const char * const gsbi2_i2c_groups[] = {
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"gpio4", "gpio5"
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};
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static const char * const gsbi3_groups[] = {
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"gpio8", "gpio9", "gpio10", "gpio11"
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};
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static const char * const gsbi4_groups[] = {
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"gpio12", "gpio13", "gpio14", "gpio15"
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};
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static const char * const gsbi5_i2c_groups[] = {
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"gpio16", "gpio17"
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};
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static const char * const gsbi5_uart_groups[] = {
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"gpio18", "gpio19"
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};
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static const char * const sdc2_groups[] = {
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"gpio25", "gpio26", "gpio27", "gpio28", "gpio29", "gpio30",
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};
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static const char * const ebi2_lcdc_groups[] = {
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"gpio21", "gpio22", "gpio24",
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};
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static const char * const ps_hold_groups[] = {
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"gpio83",
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};
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static const char * const prim_audio_groups[] = {
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"gpio20", "gpio21", "gpio22", "gpio23",
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};
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static const char * const sec_audio_groups[] = {
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"gpio25", "gpio26", "gpio27", "gpio28",
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};
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static const char * const cdc_mclk_groups[] = {
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"gpio24",
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};
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static const struct msm_function mdm9615_functions[] = {
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FUNCTION(gpio),
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FUNCTION(gsbi2_i2c),
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FUNCTION(gsbi3),
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FUNCTION(gsbi4),
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FUNCTION(gsbi5_i2c),
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FUNCTION(gsbi5_uart),
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FUNCTION(sdc2),
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FUNCTION(ebi2_lcdc),
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FUNCTION(ps_hold),
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FUNCTION(prim_audio),
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FUNCTION(sec_audio),
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FUNCTION(cdc_mclk),
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};
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static const struct msm_pingroup mdm9615_groups[] = {
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PINGROUP(0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
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PINGROUP(1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
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PINGROUP(2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
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PINGROUP(3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
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PINGROUP(4, gsbi2_i2c, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
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PINGROUP(5, gsbi2_i2c, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
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PINGROUP(6, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
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PINGROUP(7, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
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PINGROUP(8, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
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PINGROUP(9, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(10, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(11, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(12, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(13, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(14, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(15, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(16, gsbi5_i2c, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(17, gsbi5_i2c, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(18, gsbi5_uart, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(19, gsbi5_uart, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(20, prim_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(21, prim_audio, ebi2_lcdc, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(22, prim_audio, ebi2_lcdc, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(23, prim_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(24, cdc_mclk, NA, ebi2_lcdc, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(25, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(26, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(27, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(28, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(29, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(30, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(31, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(32, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(33, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(34, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(35, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(36, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(37, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(38, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(39, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(40, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(41, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(42, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(43, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(44, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(45, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(46, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(47, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(48, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(49, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(50, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(51, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(52, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(53, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(54, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(55, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(56, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(57, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(58, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(59, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(60, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(61, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(62, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(63, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(64, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(65, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(66, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(67, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(68, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(69, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(70, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(71, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(72, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(73, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(74, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(78, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(79, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(82, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(83, ps_hold, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(84, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(85, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(86, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
|
||||
};
|
||||
|
||||
#define NUM_GPIO_PINGROUPS 88
|
||||
|
||||
static const struct msm_pinctrl_soc_data mdm9615_pinctrl = {
|
||||
.pins = mdm9615_pins,
|
||||
.npins = ARRAY_SIZE(mdm9615_pins),
|
||||
.functions = mdm9615_functions,
|
||||
.nfunctions = ARRAY_SIZE(mdm9615_functions),
|
||||
.groups = mdm9615_groups,
|
||||
.ngroups = ARRAY_SIZE(mdm9615_groups),
|
||||
.ngpios = NUM_GPIO_PINGROUPS,
|
||||
};
|
||||
|
||||
static int mdm9615_pinctrl_probe(struct platform_device *pdev)
|
||||
{
|
||||
return msm_pinctrl_probe(pdev, &mdm9615_pinctrl);
|
||||
}
|
||||
|
||||
static const struct of_device_id mdm9615_pinctrl_of_match[] = {
|
||||
{ .compatible = "qcom,mdm9615-pinctrl", },
|
||||
{ },
|
||||
};
|
||||
|
||||
static struct platform_driver mdm9615_pinctrl_driver = {
|
||||
.driver = {
|
||||
.name = "mdm9615-pinctrl",
|
||||
.of_match_table = mdm9615_pinctrl_of_match,
|
||||
},
|
||||
.probe = mdm9615_pinctrl_probe,
|
||||
.remove = msm_pinctrl_remove,
|
||||
};
|
||||
|
||||
static int __init mdm9615_pinctrl_init(void)
|
||||
{
|
||||
return platform_driver_register(&mdm9615_pinctrl_driver);
|
||||
}
|
||||
arch_initcall(mdm9615_pinctrl_init);
|
||||
|
||||
static void __exit mdm9615_pinctrl_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&mdm9615_pinctrl_driver);
|
||||
}
|
||||
module_exit(mdm9615_pinctrl_exit);
|
||||
|
||||
MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
|
||||
MODULE_DESCRIPTION("Qualcomm MDM9615 pinctrl driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_DEVICE_TABLE(of, mdm9615_pinctrl_of_match);
|
||||
Loading…
Reference in New Issue
Block a user