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b43: N-PHY: add rev7+ workarounds for radio revs 9 and 14
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -2722,9 +2722,9 @@ static void b43_nphy_workarounds_rev7plus(struct b43_wldev *dev)
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u16 lpf_ofdm_20mhz[2], lpf_ofdm_40mhz[2], lpf_11b[2];
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u16 bcap_val;
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u16 bcap_val_11b[2], bcap_val_11n_20[2], bcap_val_11n_40[2];
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s16 bcap_val_11b[2], bcap_val_11n_20[2], bcap_val_11n_40[2];
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u16 scap_val;
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u16 scap_val_11b[2], scap_val_11n_20[2], scap_val_11n_40[2];
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s16 scap_val_11b[2], scap_val_11n_20[2], scap_val_11n_40[2];
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bool rccal_ovrd = false;
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u16 bias, conv, filt;
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@ -2799,6 +2799,8 @@ static void b43_nphy_workarounds_rev7plus(struct b43_wldev *dev)
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scap_val = b43_radio_read(dev, R2057_RCCAL_SCAP_VAL);
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if (b43_nphy_ipa(dev)) {
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bool ghz2 = b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ;
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switch (phy->radio_rev) {
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case 5:
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/* Check radio version (to be 0) by PHY rev for now */
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@ -2838,6 +2840,58 @@ static void b43_nphy_workarounds_rev7plus(struct b43_wldev *dev)
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}
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}
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rccal_ovrd = true;
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break;
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case 9:
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for (core = 0; core < 2; core++) {
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bcap_val_11b[core] = bcap_val;
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scap_val_11b[core] = scap_val;
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lpf_11b[core] = 1;
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if (ghz2) {
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bcap_val_11n_20[core] = bcap_val + 13;
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scap_val_11n_20[core] = scap_val + 15;
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} else {
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bcap_val_11n_20[core] = bcap_val + 14;
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scap_val_11n_20[core] = scap_val + 15;
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}
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lpf_ofdm_20mhz[core] = 4;
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if (ghz2) {
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bcap_val_11n_40[core] = bcap_val - 7;
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scap_val_11n_40[core] = scap_val - 5;
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} else {
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bcap_val_11n_40[core] = bcap_val + 2;
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scap_val_11n_40[core] = scap_val + 4;
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}
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lpf_ofdm_40mhz[core] = 4;
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}
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rccal_ovrd = true;
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break;
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case 14:
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for (core = 0; core < 2; core++) {
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bcap_val_11b[core] = bcap_val;
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scap_val_11b[core] = scap_val;
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lpf_11b[core] = 1;
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}
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bcap_val_11n_20[0] = bcap_val + 20;
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scap_val_11n_20[0] = scap_val + 20;
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lpf_ofdm_20mhz[0] = 3;
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bcap_val_11n_20[1] = bcap_val + 16;
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scap_val_11n_20[1] = scap_val + 16;
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lpf_ofdm_20mhz[1] = 3;
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bcap_val_11n_40[0] = bcap_val + 20;
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scap_val_11n_40[0] = scap_val + 20;
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lpf_ofdm_40mhz[0] = 4;
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bcap_val_11n_40[1] = bcap_val + 10;
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scap_val_11n_40[1] = scap_val + 10;
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lpf_ofdm_40mhz[1] = 4;
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rccal_ovrd = true;
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break;
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}
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@ -2862,6 +2916,13 @@ static void b43_nphy_workarounds_rev7plus(struct b43_wldev *dev)
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u8 rx2tx_lut_extra = 1;
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for (core = 0; core < 2; core++) {
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bcap_val_11b[core] = clamp_val(bcap_val_11b[core], 0, 0x1f);
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scap_val_11b[core] = clamp_val(scap_val_11b[core], 0, 0x1f);
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bcap_val_11n_20[core] = clamp_val(bcap_val_11n_20[core], 0, 0x1f);
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scap_val_11n_20[core] = clamp_val(scap_val_11n_20[core], 0, 0x1f);
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bcap_val_11n_40[core] = clamp_val(bcap_val_11n_40[core], 0, 0x1f);
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scap_val_11n_40[core] = clamp_val(scap_val_11n_40[core], 0, 0x1f);
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rx2tx_lut_20_11b[core] = (rx2tx_lut_extra << 13) |
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(bcap_val_11b[core] << 8) |
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(scap_val_11b[core] << 3) |
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@ -2982,6 +3043,20 @@ static void b43_nphy_workarounds_rev7plus(struct b43_wldev *dev)
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b43_radio_write(dev, 0xE8, 0x16);
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}
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break;
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case 14:
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for (core = 0; core < 2; core++) {
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int o = core ? 0x85 : 0;
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b43_radio_write(dev, o + R2057_IPA2G_CASCONV_CORE0, 0x13);
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b43_radio_write(dev, o + R2057_TXMIX2G_TUNE_BOOST_PU_CORE0, 0x21);
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b43_radio_write(dev, o + R2057_IPA2G_BIAS_FILTER_CORE0, 0xff);
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b43_radio_write(dev, o + R2057_PAD2G_IDACS_CORE0, 0x88);
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b43_radio_write(dev, o + R2057_PAD2G_TUNE_PUS_CORE0, 0x23);
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b43_radio_write(dev, o + R2057_IPA2G_IMAIN_CORE0, 0x16);
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b43_radio_write(dev, o + R2057_PAD_BIAS_FILTER_BWS_CORE0, 0x3e);
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b43_radio_write(dev, o + R2057_BACKUP1_CORE0, 0x10);
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}
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break;
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}
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} else {
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u16 freq = phy->chandef->chan->center_freq;
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