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drm/radeon: Fold radeon_set_cursor() into radeon_show_cursor()
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -91,15 +91,34 @@ static void radeon_show_cursor(struct drm_crtc *crtc)
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struct radeon_device *rdev = crtc->dev->dev_private;
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if (ASIC_IS_DCE4(rdev)) {
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WREG32(EVERGREEN_CUR_SURFACE_ADDRESS_HIGH + radeon_crtc->crtc_offset,
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upper_32_bits(radeon_crtc->cursor_addr));
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WREG32(EVERGREEN_CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset,
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lower_32_bits(radeon_crtc->cursor_addr));
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WREG32(RADEON_MM_INDEX, EVERGREEN_CUR_CONTROL + radeon_crtc->crtc_offset);
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WREG32(RADEON_MM_DATA, EVERGREEN_CURSOR_EN |
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EVERGREEN_CURSOR_MODE(EVERGREEN_CURSOR_24_8_PRE_MULT) |
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EVERGREEN_CURSOR_URGENT_CONTROL(EVERGREEN_CURSOR_URGENT_1_2));
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} else if (ASIC_IS_AVIVO(rdev)) {
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if (rdev->family >= CHIP_RV770) {
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if (radeon_crtc->crtc_id)
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WREG32(R700_D2CUR_SURFACE_ADDRESS_HIGH,
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upper_32_bits(radeon_crtc->cursor_addr));
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else
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WREG32(R700_D1CUR_SURFACE_ADDRESS_HIGH,
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upper_32_bits(radeon_crtc->cursor_addr));
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}
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WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset,
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lower_32_bits(radeon_crtc->cursor_addr));
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WREG32(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset);
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WREG32(RADEON_MM_DATA, AVIVO_D1CURSOR_EN |
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(AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT));
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} else {
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/* offset is from DISP(2)_BASE_ADDRESS */
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WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset,
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radeon_crtc->cursor_addr - radeon_crtc->legacy_display_base_addr);
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switch (radeon_crtc->crtc_id) {
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case 0:
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WREG32(RADEON_MM_INDEX, RADEON_CRTC_GEN_CNTL);
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@ -228,34 +247,6 @@ int radeon_crtc_cursor_move(struct drm_crtc *crtc,
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return ret;
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}
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static void radeon_set_cursor(struct drm_crtc *crtc)
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{
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struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
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struct radeon_device *rdev = crtc->dev->dev_private;
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if (ASIC_IS_DCE4(rdev)) {
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WREG32(EVERGREEN_CUR_SURFACE_ADDRESS_HIGH + radeon_crtc->crtc_offset,
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upper_32_bits(radeon_crtc->cursor_addr));
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WREG32(EVERGREEN_CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset,
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lower_32_bits(radeon_crtc->cursor_addr));
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} else if (ASIC_IS_AVIVO(rdev)) {
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if (rdev->family >= CHIP_RV770) {
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if (radeon_crtc->crtc_id)
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WREG32(R700_D2CUR_SURFACE_ADDRESS_HIGH,
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upper_32_bits(radeon_crtc->cursor_addr));
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else
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WREG32(R700_D1CUR_SURFACE_ADDRESS_HIGH,
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upper_32_bits(radeon_crtc->cursor_addr));
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}
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WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset,
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lower_32_bits(radeon_crtc->cursor_addr));
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} else {
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/* offset is from DISP(2)_BASE_ADDRESS */
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WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset,
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radeon_crtc->cursor_addr - radeon_crtc->legacy_display_base_addr);
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}
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}
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int radeon_crtc_cursor_set2(struct drm_crtc *crtc,
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struct drm_file *file_priv,
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uint32_t handle,
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@ -324,7 +315,6 @@ int radeon_crtc_cursor_set2(struct drm_crtc *crtc,
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radeon_crtc->cursor_hot_y = hot_y;
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}
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radeon_set_cursor(crtc);
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radeon_show_cursor(crtc);
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radeon_lock_cursor(crtc, false);
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@ -362,7 +352,6 @@ void radeon_cursor_reset(struct drm_crtc *crtc)
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radeon_cursor_move_locked(crtc, radeon_crtc->cursor_x,
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radeon_crtc->cursor_y);
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radeon_set_cursor(crtc);
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radeon_show_cursor(crtc);
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radeon_lock_cursor(crtc, false);
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