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Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

Browse Source 
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] Ocelot: remove remaining bits
  [MIPS] TLB: Fix instruction bitmasks
  [MIPS] R10000: Fix wrong test in dma-default.c
  [MIPS] Provide empty irq_enable_hazard definition for legacy and R1 cores.
  [MIPS] Sibyte: Remove broken dependency on EXPERIMENTAL from SIBYTE_SB1xxx_SOC.
  [MIPS] Kconfig: whitespace cleanup.
  [MIPS] PCI: Set need_domain_info if controller domain index is non-zero.
  [MIPS] BCM1480: Fix computation of interrupt mask address register.
  [MIPS] i8259: Add disable method.
  [MIPS] tty: add the new ioctls and definitions.
This commit is contained in:
Linus Torvalds 2007-09-10 14:43:37 -07:00
commit 897ee77bfb
12 changed files with 27 additions and 60 deletions
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22
arch/mips/Kconfig
View File

@ -80,10 +80,10 @@ config MACH_DECSTATION
If you have one of the following DECstation Models you definitely
want to choose R4xx0 for the CPU Type:
DECstation 5000/50
DECstation 5000/150
DECstation 5000/260
DECsystem 5900/260
DECstation 5000/50
DECstation 5000/150
DECstation 5000/260
DECsystem 5900/260
otherwise choose R3000.
@ -818,20 +818,6 @@ config EMMA2RH
config SERIAL_RM9000
bool
#
# Unfortunately not all GT64120 systems run the chip at the same clock.
# As the user for the clock rate and try to minimize the available options.
#
choice
prompt "Galileo Chip Clock"
depends on MOMENCO_OCELOT
default SYSCLK_100 if MOMENCO_OCELOT
config SYSCLK_100
bool "100" if MOMENCO_OCELOT
endchoice
config ARC32
bool

1
arch/mips/kernel/i8259.c
View File

@ -36,6 +36,7 @@ void mask_and_ack_8259A(unsigned int);
static struct irq_chip i8259A_chip = {
.name = "XT-PIC",
.mask = disable_8259A_irq,
.disable = disable_8259A_irq,
.unmask = enable_8259A_irq,
.mask_ack = mask_and_ack_8259A,
};

2
arch/mips/mm/dma-default.c
View File

@ -35,7 +35,7 @@ static inline unsigned long dma_addr_to_virt(dma_addr_t dma_addr)
static inline int cpu_is_noncoherent_r10000(struct device *dev)
{
return !plat_device_is_coherent(dev) &&
(current_cpu_data.cputype == CPU_R10000 &&
(current_cpu_data.cputype == CPU_R10000 ||
current_cpu_data.cputype == CPU_R12000);
}

4
arch/mips/mm/tlbex.c
View File

@ -78,7 +78,7 @@ enum fields
SET = 0x200
};
#define OP_MASK 0x2f
#define OP_MASK 0x3f
#define OP_SH 26
#define RS_MASK 0x1f
#define RS_SH 21
@ -92,7 +92,7 @@ enum fields
#define IMM_SH 0
#define JIMM_MASK 0x3ffffff
#define JIMM_SH 0
#define FUNC_MASK 0x2f
#define FUNC_MASK 0x3f
#define FUNC_SH 0
#define SET_MASK 0x7
#define SET_SH 0

1
arch/mips/pci/pci.c
View File

@ -141,6 +141,7 @@ static int __init pcibios_init(void)
bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
hose->bus = bus;
need_domain_info = need_domain_info || hose->index;
hose->need_domain_info = need_domain_info;
if (bus) {
next_busno = bus->subordinate + 1;

1
arch/mips/sibyte/Kconfig
View File

@ -48,7 +48,6 @@ config SIBYTE_BCM1x55
config SIBYTE_SB1xxx_SOC
bool
depends on EXPERIMENTAL
select DMA_COHERENT
select SIBYTE_CFE
select SWAP_IO_SPACE

8
arch/mips/sibyte/bcm1480/irq.c
View File

@ -100,8 +100,8 @@ DEFINE_SPINLOCK(bcm1480_imr_lock);
void bcm1480_mask_irq(int cpu, int irq)
{
unsigned long flags;
u64 cur_ints,hl_spacing;
unsigned long flags, hl_spacing;
u64 cur_ints;
spin_lock_irqsave(&bcm1480_imr_lock, flags);
hl_spacing = 0;
@ -117,8 +117,8 @@ void bcm1480_mask_irq(int cpu, int irq)
void bcm1480_unmask_irq(int cpu, int irq)
{
unsigned long flags;
u64 cur_ints,hl_spacing;
unsigned long flags, hl_spacing;
u64 cur_ints;
spin_lock_irqsave(&bcm1480_imr_lock, flags);
hl_spacing = 0;

1
include/asm-mips/hazards.h
View File

@ -172,6 +172,7 @@ ASMMACRO(tlb_probe_hazard,
nop; nop; nop
)
ASMMACRO(irq_enable_hazard,
_ssnop; _ssnop; _ssnop;
)
ASMMACRO(irq_disable_hazard,
nop; nop; nop

4
include/asm-mips/ioctls.h
View File

@ -77,6 +77,10 @@
#define TIOCSBRK 0x5427 /* BSD compatibility */
#define TIOCCBRK 0x5428 /* BSD compatibility */
#define TIOCGSID 0x7416 /* Return the session ID of FD */
#define TCGETS2 _IOR('T',0x2A, struct termios2)
#define TCSETS2 _IOW('T',0x2B, struct termios2)
#define TCSETSW2 _IOW('T',0x2C, struct termios2)
#define TCSETSF2 _IOW('T',0x2D, struct termios2)
#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */

30
include/asm-mips/mach-ocelot/mach-gt64120.h
View File

@ -1,30 +0,0 @@
/*
* Copyright 2001 MontaVista Software Inc.
* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H
#define _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H
/*
* PCI address allocation
*/
#define GT_PCI_MEM_BASE (0x22000000UL)
#define GT_PCI_MEM_SIZE GT_DEF_PCI0_MEM0_SIZE
#define GT_PCI_IO_BASE (0x20000000UL)
#define GT_PCI_IO_SIZE GT_DEF_PCI0_IO_SIZE
extern unsigned long gt64120_base;
#define GT64120_BASE (gt64120_base)
/*
* GT timer irq
*/
#define GT_TIMER 6
#endif /* _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H */

7
include/asm-mips/termbits.h
View File

@ -164,6 +164,7 @@ struct ktermios {
#define HUPCL 0002000 /* Hang up on last close. */
#define CLOCAL 0004000 /* Ignore modem status lines. */
#define CBAUDEX 0010000
#define BOTHER 0010000
#define B57600 0010001
#define B115200 0010002
#define B230400 0010003
@ -179,9 +180,11 @@ struct ktermios {
#define B3000000 0010015
#define B3500000 0010016
#define B4000000 0010017
#define CIBAUD 002003600000 /* input baud rate (not used) */
#define CIBAUD 002003600000 /* input baud rate */
#define CMSPAR 010000000000 /* mark or space (stick) parity */
#define CRTSCTS 020000000000 /* flow control */
#define CRTSCTS 020000000000 /* flow control */
#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
/* c_lflag bits */
#define ISIG 0000001 /* Enable signals. */

6
include/asm-mips/termios.h
View File

@ -122,8 +122,10 @@ struct termio {
copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
})
#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios))
#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios))
#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
#endif /* defined(__KERNEL__) */