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drm/i915: Fix flushing regression from 9af90d19f

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Whilst moving the code around in 9af90d19f, I dropped the or'ing in of
new write domains which would zero out the write domain for a render
target if later reused as a source later in the batch. This meant that
we might drop a required flush before reading from the render target.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31043
Reported-by: xunx.fang@intel.com
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Chris Wilson 2010-10-22 10:48:12 +01:00
parent e27d853869
commit 878a3c37d3
1 changed files with 1 additions and 1 deletions
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drivers/gpu/drm/i915/i915_gem.c
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@ -3349,7 +3349,7 @@ i915_gem_execbuffer_relocate(struct drm_i915_gem_object *obj,
}
target_obj->pending_read_domains |= reloc.read_domains;
target_obj->pending_write_domain = reloc.write_domain;
target_obj->pending_write_domain |= reloc.write_domain;
/* If the relocation already has the right value in it, no
* more work needs to be done.