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mrf24j40: apply the security-enabled bit on secured outbound frames

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We set the TXNSECEN bit of register TXNCON to on when transmitting a
security-enabled frame, as described in section 3.12.2 of the MRF
datasheet.

Signed-off-by: Alexander Aring <aar@pengutronix.de>
Signed-off-by: Alexandre Macabies <web+oss@zopieux.com>
Reviewed-by: Stefan Schmidt <stefan@osg.samsung.com>
Acked-by: Alan Ott <alan@signal11.us>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
This commit is contained in:
Alexandre Macabies 2016-04-12 18:53:02 +02:00 committed by Marcel Holtmann
parent 5a62f3c6de
commit 87820441c4
1 changed files with 4 additions and 0 deletions
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4
drivers/net/ieee802154/mrf24j40.c
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@ -61,6 +61,7 @@
#define REG_TXBCON0 0x1A
#define REG_TXNCON 0x1B /* Transmit Normal FIFO Control */
#define BIT_TXNTRIG BIT(0)
#define BIT_TXNSECEN BIT(1)
#define BIT_TXNACKREQ BIT(2)
#define REG_TXG1CON 0x1C
@ -551,6 +552,9 @@ static void write_tx_buf_complete(void *context)
u8 val = BIT_TXNTRIG;
int ret;
if (ieee802154_is_secen(fc))
val |= BIT_TXNSECEN;
if (ieee802154_is_ackreq(fc))
val |= BIT_TXNACKREQ;