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s3fb: add DDC support
Add I2C support for the DDC bus and also default mode initialization by reading monitor EDID to the s3fb driver. Tested on Trio64V+ (2 cards), Trio64V2/DX, Virge (3 cards), Virge/DX (3 cards), Virge/GX2, Trio3D/2X (4 cards), Trio3D. Will probably not work on Trio32 - my 2 cards have DDC support in BIOS that looks different from the other cards but the DDC pins on the VGA connector are not connected. Signed-off-by: Ondrej Zary <linux@rainbow-software.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Ondrej Zary
Paul Mundt
parent
6e4b26805a
commit
86c0f043a7
@ -1463,6 +1463,14 @@ config FB_S3
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---help---
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Driver for graphics boards with S3 Trio / S3 Virge chip.
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config FB_S3_DDC
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bool "DDC for S3 support"
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depends on FB_S3
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select FB_DDC
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default y
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help
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Say Y here if you want DDC support for your S3 graphics card.
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config FB_SAVAGE
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tristate "S3 Savage support"
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depends on FB && PCI && EXPERIMENTAL
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@ -25,6 +25,9 @@
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#include <linux/console.h> /* Why should fb driver call console functions? because console_lock() */
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#include <video/vga.h>
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#include <linux/i2c.h>
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#include <linux/i2c-algo-bit.h>
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#ifdef CONFIG_MTRR
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#include <asm/mtrr.h>
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#endif
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@ -36,6 +39,12 @@ struct s3fb_info {
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struct mutex open_lock;
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unsigned int ref_count;
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u32 pseudo_palette[16];
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#ifdef CONFIG_FB_S3_DDC
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u8 __iomem *mmio;
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bool ddc_registered;
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struct i2c_adapter ddc_adapter;
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struct i2c_algo_bit_data ddc_algo;
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#endif
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};
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@ -105,6 +114,9 @@ static const char * const s3_names[] = {"S3 Unknown", "S3 Trio32", "S3 Trio64",
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#define CHIP_UNDECIDED_FLAG 0x80
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#define CHIP_MASK 0xFF
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#define MMIO_OFFSET 0x1000000
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#define MMIO_SIZE 0x10000
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/* CRT timing register sets */
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static const struct vga_regset s3_h_total_regs[] = {{0x00, 0, 7}, {0x5D, 0, 0}, VGA_REGSET_END};
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@ -140,7 +152,7 @@ static const struct svga_timing_regs s3_timing_regs = {
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/* Module parameters */
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static char *mode_option __devinitdata = "640x480-8@60";
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static char *mode_option __devinitdata;
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#ifdef CONFIG_MTRR
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static int mtrr __devinitdata = 1;
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@ -167,6 +179,119 @@ module_param(fasttext, int, 0644);
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MODULE_PARM_DESC(fasttext, "Enable S3 fast text mode (1=enable, 0=disable, default=1)");
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/* ------------------------------------------------------------------------- */
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#ifdef CONFIG_FB_S3_DDC
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#define DDC_REG 0xaa /* Trio 3D/1X/2X */
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#define DDC_MMIO_REG 0xff20 /* all other chips */
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#define DDC_SCL_OUT (1 << 0)
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#define DDC_SDA_OUT (1 << 1)
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#define DDC_SCL_IN (1 << 2)
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#define DDC_SDA_IN (1 << 3)
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#define DDC_DRIVE_EN (1 << 4)
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static bool s3fb_ddc_needs_mmio(int chip)
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{
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return !(chip == CHIP_360_TRIO3D_1X ||
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chip == CHIP_362_TRIO3D_2X ||
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chip == CHIP_368_TRIO3D_2X);
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}
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static u8 s3fb_ddc_read(struct s3fb_info *par)
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{
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if (s3fb_ddc_needs_mmio(par->chip))
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return readb(par->mmio + DDC_MMIO_REG);
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else
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return vga_rcrt(par->state.vgabase, DDC_REG);
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}
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static void s3fb_ddc_write(struct s3fb_info *par, u8 val)
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{
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if (s3fb_ddc_needs_mmio(par->chip))
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writeb(val, par->mmio + DDC_MMIO_REG);
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else
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vga_wcrt(par->state.vgabase, DDC_REG, val);
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}
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static void s3fb_ddc_setscl(void *data, int val)
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{
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struct s3fb_info *par = data;
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unsigned char reg;
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reg = s3fb_ddc_read(par) | DDC_DRIVE_EN;
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if (val)
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reg |= DDC_SCL_OUT;
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else
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reg &= ~DDC_SCL_OUT;
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s3fb_ddc_write(par, reg);
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}
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static void s3fb_ddc_setsda(void *data, int val)
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{
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struct s3fb_info *par = data;
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unsigned char reg;
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reg = s3fb_ddc_read(par) | DDC_DRIVE_EN;
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if (val)
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reg |= DDC_SDA_OUT;
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else
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reg &= ~DDC_SDA_OUT;
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s3fb_ddc_write(par, reg);
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}
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static int s3fb_ddc_getscl(void *data)
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{
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struct s3fb_info *par = data;
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return !!(s3fb_ddc_read(par) & DDC_SCL_IN);
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}
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static int s3fb_ddc_getsda(void *data)
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{
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struct s3fb_info *par = data;
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return !!(s3fb_ddc_read(par) & DDC_SDA_IN);
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}
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static int __devinit s3fb_setup_ddc_bus(struct fb_info *info)
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{
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struct s3fb_info *par = info->par;
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strlcpy(par->ddc_adapter.name, info->fix.id,
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sizeof(par->ddc_adapter.name));
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par->ddc_adapter.owner = THIS_MODULE;
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par->ddc_adapter.class = I2C_CLASS_DDC;
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par->ddc_adapter.algo_data = &par->ddc_algo;
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par->ddc_adapter.dev.parent = info->device;
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par->ddc_algo.setsda = s3fb_ddc_setsda;
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par->ddc_algo.setscl = s3fb_ddc_setscl;
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par->ddc_algo.getsda = s3fb_ddc_getsda;
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par->ddc_algo.getscl = s3fb_ddc_getscl;
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par->ddc_algo.udelay = 10;
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par->ddc_algo.timeout = 20;
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par->ddc_algo.data = par;
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i2c_set_adapdata(&par->ddc_adapter, par);
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/*
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* some Virge cards have external MUX to switch chip I2C bus between
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* DDC and extension pins - switch it do DDC
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*/
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/* vga_wseq(par->state.vgabase, 0x08, 0x06); - not needed, already unlocked */
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if (par->chip == CHIP_357_VIRGE_GX2 ||
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par->chip == CHIP_359_VIRGE_GX2P)
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svga_wseq_mask(par->state.vgabase, 0x0d, 0x01, 0x03);
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else
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svga_wseq_mask(par->state.vgabase, 0x0d, 0x00, 0x03);
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/* some Virge need this or the DDC is ignored */
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svga_wcrt_mask(par->state.vgabase, 0x5c, 0x03, 0x03);
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return i2c_bit_add_bus(&par->ddc_adapter);
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}
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#endif /* CONFIG_FB_S3_DDC */
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/* ------------------------------------------------------------------------- */
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/* Set font in S3 fast text mode */
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@ -994,6 +1119,7 @@ static int __devinit s3_pci_probe(struct pci_dev *dev, const struct pci_device_i
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struct s3fb_info *par;
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int rc;
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u8 regval, cr38, cr39;
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bool found = false;
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/* Ignore secondary VGA device because there is no VGA arbitration */
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if (! svga_primary_device(dev)) {
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@ -1110,12 +1236,69 @@ static int __devinit s3_pci_probe(struct pci_dev *dev, const struct pci_device_i
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info->fix.ypanstep = 0;
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info->fix.accel = FB_ACCEL_NONE;
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info->pseudo_palette = (void*) (par->pseudo_palette);
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info->var.bits_per_pixel = 8;
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#ifdef CONFIG_FB_S3_DDC
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/* Enable MMIO if needed */
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if (s3fb_ddc_needs_mmio(par->chip)) {
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par->mmio = ioremap(info->fix.smem_start + MMIO_OFFSET, MMIO_SIZE);
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if (par->mmio)
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svga_wcrt_mask(par->state.vgabase, 0x53, 0x08, 0x08); /* enable MMIO */
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else
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dev_err(info->device, "unable to map MMIO at 0x%lx, disabling DDC",
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info->fix.smem_start + MMIO_OFFSET);
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}
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if (!s3fb_ddc_needs_mmio(par->chip) || par->mmio)
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if (s3fb_setup_ddc_bus(info) == 0) {
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u8 *edid = fb_ddc_read(&par->ddc_adapter);
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par->ddc_registered = true;
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if (edid) {
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fb_edid_to_monspecs(edid, &info->monspecs);
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kfree(edid);
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if (!info->monspecs.modedb)
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dev_err(info->device, "error getting mode database\n");
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else {
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const struct fb_videomode *m;
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fb_videomode_to_modelist(info->monspecs.modedb,
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info->monspecs.modedb_len,
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&info->modelist);
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m = fb_find_best_display(&info->monspecs, &info->modelist);
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if (m) {
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fb_videomode_to_var(&info->var, m);
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/* fill all other info->var's fields */
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if (s3fb_check_var(&info->var, info) == 0)
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found = true;
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}
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}
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}
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}
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#endif
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if (!mode_option && !found)
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mode_option = "640x480-8@60";
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/* Prepare startup mode */
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rc = fb_find_mode(&(info->var), info, mode_option, NULL, 0, NULL, 8);
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if (! ((rc == 1) || (rc == 2))) {
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rc = -EINVAL;
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dev_err(info->device, "mode %s not found\n", mode_option);
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if (mode_option) {
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rc = fb_find_mode(&info->var, info, mode_option,
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info->monspecs.modedb, info->monspecs.modedb_len,
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NULL, info->var.bits_per_pixel);
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if (!rc || rc == 4) {
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rc = -EINVAL;
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dev_err(info->device, "mode %s not found\n", mode_option);
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fb_destroy_modedb(info->monspecs.modedb);
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info->monspecs.modedb = NULL;
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goto err_find_mode;
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}
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}
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fb_destroy_modedb(info->monspecs.modedb);
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info->monspecs.modedb = NULL;
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/* maximize virtual vertical size for fast scrolling */
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info->var.yres_virtual = info->fix.smem_len * 8 /
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(info->var.bits_per_pixel * info->var.xres_virtual);
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if (info->var.yres_virtual < info->var.yres) {
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dev_err(info->device, "virtual vertical size smaller than real\n");
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goto err_find_mode;
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}
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@ -1164,6 +1347,12 @@ err_reg_fb:
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fb_dealloc_cmap(&info->cmap);
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err_alloc_cmap:
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err_find_mode:
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#ifdef CONFIG_FB_S3_DDC
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if (par->ddc_registered)
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i2c_del_adapter(&par->ddc_adapter);
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if (par->mmio)
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iounmap(par->mmio);
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#endif
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pci_iounmap(dev, info->screen_base);
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err_iomap:
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pci_release_regions(dev);
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@ -1195,6 +1384,13 @@ static void __devexit s3_pci_remove(struct pci_dev *dev)
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unregister_framebuffer(info);
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fb_dealloc_cmap(&info->cmap);
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#ifdef CONFIG_FB_S3_DDC
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if (par->ddc_registered)
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i2c_del_adapter(&par->ddc_adapter);
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if (par->mmio)
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iounmap(par->mmio);
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#endif
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pci_iounmap(dev, info->screen_base);
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pci_release_regions(dev);
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/* pci_disable_device(dev); */
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