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Merge branch 'for-6.5/cxl-fwupd' into for-6.5/cxl
Add the first typical (non-sanitization) consumer of the new background command infrastructure, firmware update. Given both firmware-update and sanitization were developed in parallel from the common background-command baseline, resolve some minor context conflicts.
This commit is contained in:
Dan Williams
commit
867eab655d
@ -95,6 +95,17 @@ Description:
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all user data areas of the device.
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What: /sys/bus/cxl/devices/memX/firmware/
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Date: April, 2023
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KernelVersion: v6.5
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Contact: linux-cxl@vger.kernel.org
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Description:
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(RW) Firmware uploader mechanism. The different files under
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this directory can be used to upload and activate new
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firmware for CXL devices. The interfaces under this are
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documented in sysfs-class-firmware.
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What: /sys/bus/cxl/devices/*/devtype
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Date: June, 2021
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KernelVersion: v5.14
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@ -82,6 +82,7 @@ config CXL_PMEM
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config CXL_MEM
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tristate "CXL: Memory Expansion"
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depends on CXL_PCI
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select FW_UPLOAD
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default CXL_BUS
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help
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The CXL.mem protocol allows a device to act as a provider of "System
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@ -2,6 +2,7 @@
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/* Copyright(c) 2020 Intel Corporation. */
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#include <linux/io-64-nonatomic-lo-hi.h>
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#include <linux/firmware.h>
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#include <linux/device.h>
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#include <linux/slab.h>
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#include <linux/idr.h>
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@ -648,6 +649,313 @@ static int cxl_memdev_release_file(struct inode *inode, struct file *file)
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return 0;
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}
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/**
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* cxl_mem_get_fw_info - Get Firmware info
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* @cxlds: The device data for the operation
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*
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* Retrieve firmware info for the device specified.
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*
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* Return: 0 if no error: or the result of the mailbox command.
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*
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* See CXL-3.0 8.2.9.3.1 Get FW Info
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*/
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static int cxl_mem_get_fw_info(struct cxl_dev_state *cxlds)
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{
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struct cxl_mbox_get_fw_info info;
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struct cxl_mbox_cmd mbox_cmd;
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int rc;
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mbox_cmd = (struct cxl_mbox_cmd) {
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.opcode = CXL_MBOX_OP_GET_FW_INFO,
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.size_out = sizeof(info),
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.payload_out = &info,
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};
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rc = cxl_internal_send_cmd(cxlds, &mbox_cmd);
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if (rc < 0)
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return rc;
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cxlds->fw.num_slots = info.num_slots;
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cxlds->fw.cur_slot = FIELD_GET(CXL_FW_INFO_SLOT_INFO_CUR_MASK,
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info.slot_info);
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return 0;
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}
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/**
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* cxl_mem_activate_fw - Activate Firmware
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* @cxlds: The device data for the operation
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* @slot: slot number to activate
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*
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* Activate firmware in a given slot for the device specified.
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*
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* Return: 0 if no error: or the result of the mailbox command.
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*
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* See CXL-3.0 8.2.9.3.3 Activate FW
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*/
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static int cxl_mem_activate_fw(struct cxl_dev_state *cxlds, int slot)
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{
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struct cxl_mbox_activate_fw activate;
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struct cxl_mbox_cmd mbox_cmd;
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if (slot == 0 || slot > cxlds->fw.num_slots)
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return -EINVAL;
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mbox_cmd = (struct cxl_mbox_cmd) {
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.opcode = CXL_MBOX_OP_ACTIVATE_FW,
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.size_in = sizeof(activate),
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.payload_in = &activate,
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};
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/* Only offline activation supported for now */
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activate.action = CXL_FW_ACTIVATE_OFFLINE;
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activate.slot = slot;
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return cxl_internal_send_cmd(cxlds, &mbox_cmd);
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}
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/**
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* cxl_mem_abort_fw_xfer - Abort an in-progress FW transfer
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* @cxlds: The device data for the operation
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*
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* Abort an in-progress firmware transfer for the device specified.
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*
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* Return: 0 if no error: or the result of the mailbox command.
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*
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* See CXL-3.0 8.2.9.3.2 Transfer FW
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*/
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static int cxl_mem_abort_fw_xfer(struct cxl_dev_state *cxlds)
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{
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struct cxl_mbox_transfer_fw *transfer;
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struct cxl_mbox_cmd mbox_cmd;
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int rc;
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transfer = kzalloc(struct_size(transfer, data, 0), GFP_KERNEL);
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if (!transfer)
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return -ENOMEM;
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/* Set a 1s poll interval and a total wait time of 30s */
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mbox_cmd = (struct cxl_mbox_cmd) {
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.opcode = CXL_MBOX_OP_TRANSFER_FW,
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.size_in = sizeof(*transfer),
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.payload_in = transfer,
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.poll_interval_ms = 1000,
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.poll_count = 30,
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};
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transfer->action = CXL_FW_TRANSFER_ACTION_ABORT;
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rc = cxl_internal_send_cmd(cxlds, &mbox_cmd);
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kfree(transfer);
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return rc;
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}
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static void cxl_fw_cleanup(struct fw_upload *fwl)
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{
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struct cxl_dev_state *cxlds = fwl->dd_handle;
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cxlds->fw.next_slot = 0;
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}
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static int cxl_fw_do_cancel(struct fw_upload *fwl)
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{
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struct cxl_dev_state *cxlds = fwl->dd_handle;
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struct cxl_memdev *cxlmd = cxlds->cxlmd;
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int rc;
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rc = cxl_mem_abort_fw_xfer(cxlds);
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if (rc < 0)
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dev_err(&cxlmd->dev, "Error aborting FW transfer: %d\n", rc);
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return FW_UPLOAD_ERR_CANCELED;
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}
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static enum fw_upload_err cxl_fw_prepare(struct fw_upload *fwl, const u8 *data,
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u32 size)
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{
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struct cxl_dev_state *cxlds = fwl->dd_handle;
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struct cxl_mbox_transfer_fw *transfer;
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if (!size)
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return FW_UPLOAD_ERR_INVALID_SIZE;
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cxlds->fw.oneshot = struct_size(transfer, data, size) <
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cxlds->payload_size;
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if (cxl_mem_get_fw_info(cxlds))
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return FW_UPLOAD_ERR_HW_ERROR;
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/*
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* So far no state has been changed, hence no other cleanup is
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* necessary. Simply return the cancelled status.
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*/
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if (test_and_clear_bit(CXL_FW_CANCEL, cxlds->fw.state))
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return FW_UPLOAD_ERR_CANCELED;
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return FW_UPLOAD_ERR_NONE;
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}
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static enum fw_upload_err cxl_fw_write(struct fw_upload *fwl, const u8 *data,
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u32 offset, u32 size, u32 *written)
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{
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struct cxl_dev_state *cxlds = fwl->dd_handle;
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struct cxl_memdev *cxlmd = cxlds->cxlmd;
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struct cxl_mbox_transfer_fw *transfer;
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struct cxl_mbox_cmd mbox_cmd;
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u32 cur_size, remaining;
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size_t size_in;
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int rc;
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*written = 0;
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/* Offset has to be aligned to 128B (CXL-3.0 8.2.9.3.2 Table 8-57) */
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if (!IS_ALIGNED(offset, CXL_FW_TRANSFER_ALIGNMENT)) {
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dev_err(&cxlmd->dev,
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"misaligned offset for FW transfer slice (%u)\n",
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offset);
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return FW_UPLOAD_ERR_RW_ERROR;
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}
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/*
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* Pick transfer size based on cxlds->payload_size
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* @size must bw 128-byte aligned, ->payload_size is a power of 2
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* starting at 256 bytes, and sizeof(*transfer) is 128.
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* These constraints imply that @cur_size will always be 128b aligned.
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*/
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cur_size = min_t(size_t, size, cxlds->payload_size - sizeof(*transfer));
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remaining = size - cur_size;
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size_in = struct_size(transfer, data, cur_size);
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if (test_and_clear_bit(CXL_FW_CANCEL, cxlds->fw.state))
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return cxl_fw_do_cancel(fwl);
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/*
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* Slot numbers are 1-indexed
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* cur_slot is the 0-indexed next_slot (i.e. 'cur_slot - 1 + 1')
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* Check for rollover using modulo, and 1-index it by adding 1
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*/
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cxlds->fw.next_slot = (cxlds->fw.cur_slot % cxlds->fw.num_slots) + 1;
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/* Do the transfer via mailbox cmd */
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transfer = kzalloc(size_in, GFP_KERNEL);
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if (!transfer)
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return FW_UPLOAD_ERR_RW_ERROR;
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transfer->offset = cpu_to_le32(offset / CXL_FW_TRANSFER_ALIGNMENT);
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memcpy(transfer->data, data + offset, cur_size);
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if (cxlds->fw.oneshot) {
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transfer->action = CXL_FW_TRANSFER_ACTION_FULL;
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transfer->slot = cxlds->fw.next_slot;
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} else {
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if (offset == 0) {
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transfer->action = CXL_FW_TRANSFER_ACTION_INITIATE;
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} else if (remaining == 0) {
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transfer->action = CXL_FW_TRANSFER_ACTION_END;
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transfer->slot = cxlds->fw.next_slot;
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} else {
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transfer->action = CXL_FW_TRANSFER_ACTION_CONTINUE;
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}
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}
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mbox_cmd = (struct cxl_mbox_cmd) {
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.opcode = CXL_MBOX_OP_TRANSFER_FW,
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.size_in = size_in,
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.payload_in = transfer,
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.poll_interval_ms = 1000,
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.poll_count = 30,
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};
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rc = cxl_internal_send_cmd(cxlds, &mbox_cmd);
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if (rc < 0) {
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rc = FW_UPLOAD_ERR_RW_ERROR;
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goto out_free;
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}
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*written = cur_size;
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/* Activate FW if oneshot or if the last slice was written */
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if (cxlds->fw.oneshot || remaining == 0) {
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dev_dbg(&cxlmd->dev, "Activating firmware slot: %d\n",
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cxlds->fw.next_slot);
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rc = cxl_mem_activate_fw(cxlds, cxlds->fw.next_slot);
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if (rc < 0) {
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dev_err(&cxlmd->dev, "Error activating firmware: %d\n",
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rc);
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rc = FW_UPLOAD_ERR_HW_ERROR;
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goto out_free;
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}
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}
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rc = FW_UPLOAD_ERR_NONE;
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out_free:
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kfree(transfer);
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return rc;
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}
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static enum fw_upload_err cxl_fw_poll_complete(struct fw_upload *fwl)
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{
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struct cxl_dev_state *cxlds = fwl->dd_handle;
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/*
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* cxl_internal_send_cmd() handles background operations synchronously.
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* No need to wait for completions here - any errors would've been
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* reported and handled during the ->write() call(s).
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* Just check if a cancel request was received, and return success.
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*/
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if (test_and_clear_bit(CXL_FW_CANCEL, cxlds->fw.state))
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return cxl_fw_do_cancel(fwl);
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return FW_UPLOAD_ERR_NONE;
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}
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static void cxl_fw_cancel(struct fw_upload *fwl)
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{
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struct cxl_dev_state *cxlds = fwl->dd_handle;
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set_bit(CXL_FW_CANCEL, cxlds->fw.state);
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}
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static const struct fw_upload_ops cxl_memdev_fw_ops = {
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.prepare = cxl_fw_prepare,
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.write = cxl_fw_write,
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.poll_complete = cxl_fw_poll_complete,
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.cancel = cxl_fw_cancel,
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.cleanup = cxl_fw_cleanup,
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};
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static void devm_cxl_remove_fw_upload(void *fwl)
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{
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firmware_upload_unregister(fwl);
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}
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int cxl_memdev_setup_fw_upload(struct cxl_dev_state *cxlds)
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{
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struct device *dev = &cxlds->cxlmd->dev;
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struct fw_upload *fwl;
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int rc;
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if (!test_bit(CXL_MEM_COMMAND_ID_GET_FW_INFO, cxlds->enabled_cmds))
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return 0;
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||||
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fwl = firmware_upload_register(THIS_MODULE, dev, dev_name(dev),
|
||||
&cxl_memdev_fw_ops, cxlds);
|
||||
if (IS_ERR(fwl))
|
||||
return dev_err_probe(dev, PTR_ERR(fwl),
|
||||
"Failed to register firmware loader\n");
|
||||
|
||||
rc = devm_add_action_or_reset(cxlds->dev, devm_cxl_remove_fw_upload,
|
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fwl);
|
||||
if (rc)
|
||||
dev_err(dev,
|
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"Failed to add firmware loader remove action: %d\n",
|
||||
rc);
|
||||
|
||||
return rc;
|
||||
}
|
||||
EXPORT_SYMBOL_NS_GPL(cxl_memdev_setup_fw_upload, CXL);
|
||||
|
||||
static const struct file_operations cxl_memdev_fops = {
|
||||
.owner = THIS_MODULE,
|
||||
.unlocked_ioctl = cxl_memdev_ioctl,
|
||||
|
||||
@ -83,6 +83,7 @@ static inline bool is_cxl_endpoint(struct cxl_port *port)
|
||||
}
|
||||
|
||||
struct cxl_memdev *devm_cxl_add_memdev(struct cxl_dev_state *cxlds);
|
||||
int cxl_memdev_setup_fw_upload(struct cxl_dev_state *cxlds);
|
||||
int devm_cxl_dpa_reserve(struct cxl_endpoint_decoder *cxled,
|
||||
resource_size_t base, resource_size_t len,
|
||||
resource_size_t skipped);
|
||||
@ -260,6 +261,84 @@ struct cxl_poison_state {
|
||||
struct mutex lock; /* Protect reads of poison list */
|
||||
};
|
||||
|
||||
/*
|
||||
* Get FW Info
|
||||
* CXL rev 3.0 section 8.2.9.3.1; Table 8-56
|
||||
*/
|
||||
struct cxl_mbox_get_fw_info {
|
||||
u8 num_slots;
|
||||
u8 slot_info;
|
||||
u8 activation_cap;
|
||||
u8 reserved[13];
|
||||
char slot_1_revision[16];
|
||||
char slot_2_revision[16];
|
||||
char slot_3_revision[16];
|
||||
char slot_4_revision[16];
|
||||
} __packed;
|
||||
|
||||
#define CXL_FW_INFO_SLOT_INFO_CUR_MASK GENMASK(2, 0)
|
||||
#define CXL_FW_INFO_SLOT_INFO_NEXT_MASK GENMASK(5, 3)
|
||||
#define CXL_FW_INFO_SLOT_INFO_NEXT_SHIFT 3
|
||||
#define CXL_FW_INFO_ACTIVATION_CAP_HAS_LIVE_ACTIVATE BIT(0)
|
||||
|
||||
/*
|
||||
* Transfer FW Input Payload
|
||||
* CXL rev 3.0 section 8.2.9.3.2; Table 8-57
|
||||
*/
|
||||
struct cxl_mbox_transfer_fw {
|
||||
u8 action;
|
||||
u8 slot;
|
||||
u8 reserved[2];
|
||||
__le32 offset;
|
||||
u8 reserved2[0x78];
|
||||
u8 data[];
|
||||
} __packed;
|
||||
|
||||
#define CXL_FW_TRANSFER_ACTION_FULL 0x0
|
||||
#define CXL_FW_TRANSFER_ACTION_INITIATE 0x1
|
||||
#define CXL_FW_TRANSFER_ACTION_CONTINUE 0x2
|
||||
#define CXL_FW_TRANSFER_ACTION_END 0x3
|
||||
#define CXL_FW_TRANSFER_ACTION_ABORT 0x4
|
||||
|
||||
/*
|
||||
* CXL rev 3.0 section 8.2.9.3.2 mandates 128-byte alignment for FW packages
|
||||
* and for each part transferred in a Transfer FW command.
|
||||
*/
|
||||
#define CXL_FW_TRANSFER_ALIGNMENT 128
|
||||
|
||||
/*
|
||||
* Activate FW Input Payload
|
||||
* CXL rev 3.0 section 8.2.9.3.3; Table 8-58
|
||||
*/
|
||||
struct cxl_mbox_activate_fw {
|
||||
u8 action;
|
||||
u8 slot;
|
||||
} __packed;
|
||||
|
||||
#define CXL_FW_ACTIVATE_ONLINE 0x0
|
||||
#define CXL_FW_ACTIVATE_OFFLINE 0x1
|
||||
|
||||
/* FW state bits */
|
||||
#define CXL_FW_STATE_BITS 32
|
||||
#define CXL_FW_CANCEL BIT(0)
|
||||
|
||||
/**
|
||||
* struct cxl_fw_state - Firmware upload / activation state
|
||||
*
|
||||
* @state: fw_uploader state bitmask
|
||||
* @oneshot: whether the fw upload fits in a single transfer
|
||||
* @num_slots: Number of FW slots available
|
||||
* @cur_slot: Slot number currently active
|
||||
* @next_slot: Slot number for the new firmware
|
||||
*/
|
||||
struct cxl_fw_state {
|
||||
DECLARE_BITMAP(state, CXL_FW_STATE_BITS);
|
||||
bool oneshot;
|
||||
int num_slots;
|
||||
int cur_slot;
|
||||
int next_slot;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct cxl_security_state - Device security state
|
||||
*
|
||||
@ -314,6 +393,7 @@ struct cxl_security_state {
|
||||
* @serial: PCIe Device Serial Number
|
||||
* @event: event log driver state
|
||||
* @poison: poison driver state info
|
||||
* @fw: firmware upload / activation state
|
||||
* @mbox_send: @dev specific transport for transmitting mailbox commands
|
||||
*
|
||||
* See section 8.2.9.5.2 Capacity Configuration and Label Storage for
|
||||
@ -354,6 +434,7 @@ struct cxl_dev_state {
|
||||
struct cxl_event_state event;
|
||||
struct cxl_poison_state poison;
|
||||
struct cxl_security_state security;
|
||||
struct cxl_fw_state fw;
|
||||
|
||||
struct rcuwait mbox_wait;
|
||||
int (*mbox_send)(struct cxl_dev_state *cxlds, struct cxl_mbox_cmd *cmd);
|
||||
@ -367,6 +448,7 @@ enum cxl_opcode {
|
||||
CXL_MBOX_OP_GET_EVT_INT_POLICY = 0x0102,
|
||||
CXL_MBOX_OP_SET_EVT_INT_POLICY = 0x0103,
|
||||
CXL_MBOX_OP_GET_FW_INFO = 0x0200,
|
||||
CXL_MBOX_OP_TRANSFER_FW = 0x0201,
|
||||
CXL_MBOX_OP_ACTIVATE_FW = 0x0202,
|
||||
CXL_MBOX_OP_SET_TIMESTAMP = 0x0301,
|
||||
CXL_MBOX_OP_GET_SUPPORTED_LOGS = 0x0400,
|
||||
|
||||
@ -921,6 +921,10 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
if (IS_ERR(cxlmd))
|
||||
return PTR_ERR(cxlmd);
|
||||
|
||||
rc = cxl_memdev_setup_fw_upload(cxlds);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = cxl_event_config(host_bridge, cxlds);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
@ -8,11 +8,14 @@
|
||||
#include <linux/sizes.h>
|
||||
#include <linux/bits.h>
|
||||
#include <asm/unaligned.h>
|
||||
#include <crypto/sha2.h>
|
||||
#include <cxlmem.h>
|
||||
|
||||
#include "trace.h"
|
||||
|
||||
#define LSA_SIZE SZ_128K
|
||||
#define FW_SIZE SZ_64M
|
||||
#define FW_SLOTS 3
|
||||
#define DEV_SIZE SZ_2G
|
||||
#define EFFECT(x) (1U << x)
|
||||
|
||||
@ -21,42 +24,70 @@
|
||||
|
||||
static unsigned int poison_inject_dev_max = MOCK_INJECT_DEV_MAX;
|
||||
|
||||
enum cxl_command_effects {
|
||||
CONF_CHANGE_COLD_RESET = 0,
|
||||
CONF_CHANGE_IMMEDIATE,
|
||||
DATA_CHANGE_IMMEDIATE,
|
||||
POLICY_CHANGE_IMMEDIATE,
|
||||
LOG_CHANGE_IMMEDIATE,
|
||||
SECURITY_CHANGE_IMMEDIATE,
|
||||
BACKGROUND_OP,
|
||||
SECONDARY_MBOX_SUPPORTED,
|
||||
};
|
||||
|
||||
#define CXL_CMD_EFFECT_NONE cpu_to_le16(0)
|
||||
|
||||
static struct cxl_cel_entry mock_cel[] = {
|
||||
{
|
||||
.opcode = cpu_to_le16(CXL_MBOX_OP_GET_SUPPORTED_LOGS),
|
||||
.effect = cpu_to_le16(0),
|
||||
.effect = CXL_CMD_EFFECT_NONE,
|
||||
},
|
||||
{
|
||||
.opcode = cpu_to_le16(CXL_MBOX_OP_IDENTIFY),
|
||||
.effect = cpu_to_le16(0),
|
||||
.effect = CXL_CMD_EFFECT_NONE,
|
||||
},
|
||||
{
|
||||
.opcode = cpu_to_le16(CXL_MBOX_OP_GET_LSA),
|
||||
.effect = cpu_to_le16(0),
|
||||
.effect = CXL_CMD_EFFECT_NONE,
|
||||
},
|
||||
{
|
||||
.opcode = cpu_to_le16(CXL_MBOX_OP_GET_PARTITION_INFO),
|
||||
.effect = cpu_to_le16(0),
|
||||
.effect = CXL_CMD_EFFECT_NONE,
|
||||
},
|
||||
{
|
||||
.opcode = cpu_to_le16(CXL_MBOX_OP_SET_LSA),
|
||||
.effect = cpu_to_le16(EFFECT(1) | EFFECT(2)),
|
||||
.effect = cpu_to_le16(EFFECT(CONF_CHANGE_IMMEDIATE) |
|
||||
EFFECT(DATA_CHANGE_IMMEDIATE)),
|
||||
},
|
||||
{
|
||||
.opcode = cpu_to_le16(CXL_MBOX_OP_GET_HEALTH_INFO),
|
||||
.effect = cpu_to_le16(0),
|
||||
.effect = CXL_CMD_EFFECT_NONE,
|
||||
},
|
||||
{
|
||||
.opcode = cpu_to_le16(CXL_MBOX_OP_GET_POISON),
|
||||
.effect = cpu_to_le16(0),
|
||||
.effect = CXL_CMD_EFFECT_NONE,
|
||||
},
|
||||
{
|
||||
.opcode = cpu_to_le16(CXL_MBOX_OP_INJECT_POISON),
|
||||
.effect = cpu_to_le16(0),
|
||||
.effect = cpu_to_le16(EFFECT(DATA_CHANGE_IMMEDIATE)),
|
||||
},
|
||||
{
|
||||
.opcode = cpu_to_le16(CXL_MBOX_OP_CLEAR_POISON),
|
||||
.effect = cpu_to_le16(0),
|
||||
.effect = cpu_to_le16(EFFECT(DATA_CHANGE_IMMEDIATE)),
|
||||
},
|
||||
{
|
||||
.opcode = cpu_to_le16(CXL_MBOX_OP_GET_FW_INFO),
|
||||
.effect = CXL_CMD_EFFECT_NONE,
|
||||
},
|
||||
{
|
||||
.opcode = cpu_to_le16(CXL_MBOX_OP_TRANSFER_FW),
|
||||
.effect = cpu_to_le16(EFFECT(CONF_CHANGE_COLD_RESET) |
|
||||
EFFECT(BACKGROUND_OP)),
|
||||
},
|
||||
{
|
||||
.opcode = cpu_to_le16(CXL_MBOX_OP_ACTIVATE_FW),
|
||||
.effect = cpu_to_le16(EFFECT(CONF_CHANGE_COLD_RESET) |
|
||||
EFFECT(CONF_CHANGE_IMMEDIATE)),
|
||||
},
|
||||
};
|
||||
|
||||
@ -109,6 +140,10 @@ struct mock_event_store {
|
||||
|
||||
struct cxl_mockmem_data {
|
||||
void *lsa;
|
||||
void *fw;
|
||||
int fw_slot;
|
||||
int fw_staged;
|
||||
size_t fw_size;
|
||||
u32 security_state;
|
||||
u8 user_pass[NVDIMM_PASSPHRASE_LEN];
|
||||
u8 master_pass[NVDIMM_PASSPHRASE_LEN];
|
||||
@ -1160,6 +1195,87 @@ static struct attribute *cxl_mock_mem_core_attrs[] = {
|
||||
};
|
||||
ATTRIBUTE_GROUPS(cxl_mock_mem_core);
|
||||
|
||||
static int mock_fw_info(struct cxl_dev_state *cxlds,
|
||||
struct cxl_mbox_cmd *cmd)
|
||||
{
|
||||
struct cxl_mockmem_data *mdata = dev_get_drvdata(cxlds->dev);
|
||||
struct cxl_mbox_get_fw_info fw_info = {
|
||||
.num_slots = FW_SLOTS,
|
||||
.slot_info = (mdata->fw_slot & 0x7) |
|
||||
((mdata->fw_staged & 0x7) << 3),
|
||||
.activation_cap = 0,
|
||||
};
|
||||
|
||||
strcpy(fw_info.slot_1_revision, "cxl_test_fw_001");
|
||||
strcpy(fw_info.slot_2_revision, "cxl_test_fw_002");
|
||||
strcpy(fw_info.slot_3_revision, "cxl_test_fw_003");
|
||||
strcpy(fw_info.slot_4_revision, "");
|
||||
|
||||
if (cmd->size_out < sizeof(fw_info))
|
||||
return -EINVAL;
|
||||
|
||||
memcpy(cmd->payload_out, &fw_info, sizeof(fw_info));
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mock_transfer_fw(struct cxl_dev_state *cxlds,
|
||||
struct cxl_mbox_cmd *cmd)
|
||||
{
|
||||
struct cxl_mbox_transfer_fw *transfer = cmd->payload_in;
|
||||
struct cxl_mockmem_data *mdata = dev_get_drvdata(cxlds->dev);
|
||||
void *fw = mdata->fw;
|
||||
size_t offset, length;
|
||||
|
||||
offset = le32_to_cpu(transfer->offset) * CXL_FW_TRANSFER_ALIGNMENT;
|
||||
length = cmd->size_in - sizeof(*transfer);
|
||||
if (offset + length > FW_SIZE)
|
||||
return -EINVAL;
|
||||
|
||||
switch (transfer->action) {
|
||||
case CXL_FW_TRANSFER_ACTION_FULL:
|
||||
if (offset != 0)
|
||||
return -EINVAL;
|
||||
fallthrough;
|
||||
case CXL_FW_TRANSFER_ACTION_END:
|
||||
if (transfer->slot == 0 || transfer->slot > FW_SLOTS)
|
||||
return -EINVAL;
|
||||
mdata->fw_size = offset + length;
|
||||
break;
|
||||
case CXL_FW_TRANSFER_ACTION_INITIATE:
|
||||
case CXL_FW_TRANSFER_ACTION_CONTINUE:
|
||||
break;
|
||||
case CXL_FW_TRANSFER_ACTION_ABORT:
|
||||
return 0;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
memcpy(fw + offset, transfer->data, length);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mock_activate_fw(struct cxl_dev_state *cxlds,
|
||||
struct cxl_mbox_cmd *cmd)
|
||||
{
|
||||
struct cxl_mbox_activate_fw *activate = cmd->payload_in;
|
||||
struct cxl_mockmem_data *mdata = dev_get_drvdata(cxlds->dev);
|
||||
|
||||
if (activate->slot == 0 || activate->slot > FW_SLOTS)
|
||||
return -EINVAL;
|
||||
|
||||
switch (activate->action) {
|
||||
case CXL_FW_ACTIVATE_ONLINE:
|
||||
mdata->fw_slot = activate->slot;
|
||||
mdata->fw_staged = 0;
|
||||
return 0;
|
||||
case CXL_FW_ACTIVATE_OFFLINE:
|
||||
mdata->fw_staged = activate->slot;
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
static int cxl_mock_mbox_send(struct cxl_dev_state *cxlds, struct cxl_mbox_cmd *cmd)
|
||||
{
|
||||
struct device *dev = cxlds->dev;
|
||||
@ -1232,6 +1348,15 @@ static int cxl_mock_mbox_send(struct cxl_dev_state *cxlds, struct cxl_mbox_cmd *
|
||||
case CXL_MBOX_OP_CLEAR_POISON:
|
||||
rc = mock_clear_poison(cxlds, cmd);
|
||||
break;
|
||||
case CXL_MBOX_OP_GET_FW_INFO:
|
||||
rc = mock_fw_info(cxlds, cmd);
|
||||
break;
|
||||
case CXL_MBOX_OP_TRANSFER_FW:
|
||||
rc = mock_transfer_fw(cxlds, cmd);
|
||||
break;
|
||||
case CXL_MBOX_OP_ACTIVATE_FW:
|
||||
rc = mock_activate_fw(cxlds, cmd);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
@ -1247,6 +1372,11 @@ static void label_area_release(void *lsa)
|
||||
vfree(lsa);
|
||||
}
|
||||
|
||||
static void fw_buf_release(void *buf)
|
||||
{
|
||||
vfree(buf);
|
||||
}
|
||||
|
||||
static bool is_rcd(struct platform_device *pdev)
|
||||
{
|
||||
const struct platform_device_id *id = platform_get_device_id(pdev);
|
||||
@ -1279,10 +1409,19 @@ static int cxl_mock_mem_probe(struct platform_device *pdev)
|
||||
mdata->lsa = vmalloc(LSA_SIZE);
|
||||
if (!mdata->lsa)
|
||||
return -ENOMEM;
|
||||
mdata->fw = vmalloc(FW_SIZE);
|
||||
if (!mdata->fw)
|
||||
return -ENOMEM;
|
||||
mdata->fw_slot = 2;
|
||||
|
||||
rc = devm_add_action_or_reset(dev, label_area_release, mdata->lsa);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
rc = devm_add_action_or_reset(dev, fw_buf_release, mdata->fw);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
cxlds = cxl_dev_state_create(dev);
|
||||
if (IS_ERR(cxlds))
|
||||
return PTR_ERR(cxlds);
|
||||
@ -1324,6 +1463,10 @@ static int cxl_mock_mem_probe(struct platform_device *pdev)
|
||||
if (IS_ERR(cxlmd))
|
||||
return PTR_ERR(cxlmd);
|
||||
|
||||
rc = cxl_memdev_setup_fw_upload(cxlds);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
cxl_mem_get_event_records(cxlds, CXLDEV_EVENT_STATUS_ALL);
|
||||
|
||||
return 0;
|
||||
@ -1362,9 +1505,40 @@ static ssize_t security_lock_store(struct device *dev, struct device_attribute *
|
||||
|
||||
static DEVICE_ATTR_RW(security_lock);
|
||||
|
||||
static ssize_t fw_buf_checksum_show(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
struct cxl_mockmem_data *mdata = dev_get_drvdata(dev);
|
||||
u8 hash[SHA256_DIGEST_SIZE];
|
||||
unsigned char *hstr, *hptr;
|
||||
struct sha256_state sctx;
|
||||
ssize_t written = 0;
|
||||
int i;
|
||||
|
||||
sha256_init(&sctx);
|
||||
sha256_update(&sctx, mdata->fw, mdata->fw_size);
|
||||
sha256_final(&sctx, hash);
|
||||
|
||||
hstr = kzalloc((SHA256_DIGEST_SIZE * 2) + 1, GFP_KERNEL);
|
||||
if (!hstr)
|
||||
return -ENOMEM;
|
||||
|
||||
hptr = hstr;
|
||||
for (i = 0; i < SHA256_DIGEST_SIZE; i++)
|
||||
hptr += sprintf(hptr, "%02x", hash[i]);
|
||||
|
||||
written = sysfs_emit(buf, "%s\n", hstr);
|
||||
|
||||
kfree(hstr);
|
||||
return written;
|
||||
}
|
||||
|
||||
static DEVICE_ATTR_RO(fw_buf_checksum);
|
||||
|
||||
static struct attribute *cxl_mock_mem_attrs[] = {
|
||||
&dev_attr_security_lock.attr,
|
||||
&dev_attr_event_trigger.attr,
|
||||
&dev_attr_fw_buf_checksum.attr,
|
||||
NULL
|
||||
};
|
||||
ATTRIBUTE_GROUPS(cxl_mock_mem);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user