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RISC-V Fixes for 6.11-rc8
* Two fixes for smp_processor_id() calls in preemptible sections: one if the perf driver, and one in the fence.i prctl. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmbjDTkTHHBhbG1lckBk YWJiZWx0LmNvbQAKCRAuExnzX7sYiRsKD/428yAcDT6JKjG+jzYnMARDxl+OS0hJ KKwfeglvpPXWqZoZlyhPgJMJ/fNalrH/dVwl01a3Aobjy8/JV6W6L2Cc/lwRBNXv O+nfCzzJoZs+v7D0MR2Ad101vfToafDaiZ9Q6jH4/9yi/m5zAaIHdEnjYQQW5rLc FMnfGDHXo40WkrnjEjefeh7n88d5dtyD3szwS8khSnJulGFRHHWW0XL54wVeY3wE NvLKdD5PDR7kzOE6BvofPQ1tIJxpWnE+jqSgHmS1eYKlwwzb1kvtGXiktUl/gcwb /+jFgK49gqWMpx1ji+utw4R357uIZY0DPIiMvY7K5PjeY+TXtltTBgfyvjklpLWm YrZ1snpMiMl/VTxFYVFMCvowK/DvylvSQ737zwMaxTq/DGwvr8GPuRO1Pnwc/3QZ wCLy3rsK56LE46+9IrYeauYNiOl1bd6znuASzrPhr8Ecexm2DW+JZqRRZCMl3UTK p9hrr3CxUT4hi0bksjkSOBks7cLNp3Rqa/fEBtM6YKKzSU6NlEoNpuiH7sjh7ETE Zk4qUjRPiRcje0XL2NTKfpKSGuxK/xP4188aYA5jZ1QxO/zditk8BrS5WRfgEoPr gjNapO25nrnJbgi9PaClMdeYNV//Fi/0vjpDjw6pYfJaZSE0sWMqp5/bWt5Bsy2A e/OyJ+U4TPY4vQ== =pEDD -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-6.11-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Palmer Dabbelt: - Two fixes for smp_processor_id() calls in preemptible sections: one if the perf driver, and one in the fence.i prctl. * tag 'riscv-for-linus-6.11-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: Disable preemption while handling PR_RISCV_CTX_SW_FENCEI_OFF drivers: perf: Fix smp_processor_id() use in preemptible code
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8581ae1ea0
@ -158,6 +158,7 @@ void __init riscv_init_cbo_blocksizes(void)
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#ifdef CONFIG_SMP
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static void set_icache_stale_mask(void)
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{
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int cpu = get_cpu();
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cpumask_t *mask;
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bool stale_cpu;
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@ -168,10 +169,11 @@ static void set_icache_stale_mask(void)
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* concurrently on different harts.
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*/
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mask = ¤t->mm->context.icache_stale_mask;
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stale_cpu = cpumask_test_cpu(smp_processor_id(), mask);
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stale_cpu = cpumask_test_cpu(cpu, mask);
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cpumask_setall(mask);
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cpumask_assign_cpu(smp_processor_id(), mask, stale_cpu);
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cpumask_assign_cpu(cpu, mask, stale_cpu);
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put_cpu();
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}
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#endif
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@ -239,14 +241,12 @@ int riscv_set_icache_flush_ctx(unsigned long ctx, unsigned long scope)
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case PR_RISCV_CTX_SW_FENCEI_OFF:
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switch (scope) {
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case PR_RISCV_SCOPE_PER_PROCESS:
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current->mm->context.force_icache_flush = false;
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set_icache_stale_mask();
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current->mm->context.force_icache_flush = false;
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break;
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case PR_RISCV_SCOPE_PER_THREAD:
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current->thread.force_icache_flush = false;
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set_icache_stale_mask();
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current->thread.force_icache_flush = false;
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break;
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default:
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return -EINVAL;
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@ -1373,11 +1373,15 @@ static int pmu_sbi_device_probe(struct platform_device *pdev)
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/* SBI PMU Snapsphot is only available in SBI v2.0 */
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if (sbi_v2_available) {
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int cpu;
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ret = pmu_sbi_snapshot_alloc(pmu);
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if (ret)
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goto out_unregister;
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ret = pmu_sbi_snapshot_setup(pmu, smp_processor_id());
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cpu = get_cpu();
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ret = pmu_sbi_snapshot_setup(pmu, cpu);
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if (ret) {
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/* Snapshot is an optional feature. Continue if not available */
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pmu_sbi_snapshot_free(pmu);
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@ -1391,6 +1395,7 @@ static int pmu_sbi_device_probe(struct platform_device *pdev)
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*/
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static_branch_enable(&sbi_pmu_snapshot_available);
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}
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put_cpu();
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}
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register_sysctl("kernel", sbi_pmu_sysctl_table);
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