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drm/amdgpu: be explicit about cpu vram access for driver BOs (v2)
For kernel driver BOs, be explicit about whether we need vram access up front. This avoids unecessary migrations and avoids using visible vram for buffers were it's not needed. v2: line wrap fixes Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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bddf802638
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857d913d05
@ -244,7 +244,8 @@ static int amdgpu_vram_scratch_init(struct amdgpu_device *adev)
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if (adev->vram_scratch.robj == NULL) {
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r = amdgpu_bo_create(adev, AMDGPU_GPU_PAGE_SIZE,
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PAGE_SIZE, true, AMDGPU_GEM_DOMAIN_VRAM, 0,
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PAGE_SIZE, true, AMDGPU_GEM_DOMAIN_VRAM,
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AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
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NULL, &adev->vram_scratch.robj);
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if (r) {
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return r;
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@ -126,8 +126,8 @@ static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev,
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aligned_size = ALIGN(size, PAGE_SIZE);
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ret = amdgpu_gem_object_create(adev, aligned_size, 0,
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AMDGPU_GEM_DOMAIN_VRAM,
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0, true,
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&gobj);
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AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
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true, &gobj);
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if (ret) {
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printk(KERN_ERR "failed to allocate framebuffer (%d)\n",
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aligned_size);
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@ -125,7 +125,8 @@ int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev)
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if (adev->gart.robj == NULL) {
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r = amdgpu_bo_create(adev, adev->gart.table_size,
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PAGE_SIZE, true, AMDGPU_GEM_DOMAIN_VRAM, 0,
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PAGE_SIZE, true, AMDGPU_GEM_DOMAIN_VRAM,
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AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
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NULL, &adev->gart.robj);
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if (r) {
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return r;
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@ -656,7 +656,8 @@ int amdgpu_mode_dumb_create(struct drm_file *file_priv,
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r = amdgpu_gem_object_create(adev, args->size, 0,
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AMDGPU_GEM_DOMAIN_VRAM,
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0, ttm_bo_type_device,
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AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
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ttm_bo_type_device,
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&gobj);
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if (r)
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return -ENOMEM;
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@ -859,7 +859,8 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
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amdgpu_ttm_set_active_vram_size(adev, adev->mc.visible_vram_size);
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r = amdgpu_bo_create(adev, 256 * 1024, PAGE_SIZE, true,
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AMDGPU_GEM_DOMAIN_VRAM, 0,
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AMDGPU_GEM_DOMAIN_VRAM,
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AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
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NULL, &adev->stollen_vga_memory);
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if (r) {
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return r;
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@ -154,7 +154,9 @@ int amdgpu_uvd_sw_init(struct amdgpu_device *adev)
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bo_size = AMDGPU_GPU_PAGE_ALIGN(le32_to_cpu(hdr->ucode_size_bytes) + 8)
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+ AMDGPU_UVD_STACK_SIZE + AMDGPU_UVD_HEAP_SIZE;
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r = amdgpu_bo_create(adev, bo_size, PAGE_SIZE, true,
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AMDGPU_GEM_DOMAIN_VRAM, 0, NULL, &adev->uvd.vcpu_bo);
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AMDGPU_GEM_DOMAIN_VRAM,
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AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
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NULL, &adev->uvd.vcpu_bo);
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if (r) {
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dev_err(adev->dev, "(%d) failed to allocate UVD bo\n", r);
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return r;
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@ -901,7 +903,9 @@ int amdgpu_uvd_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
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int r, i;
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r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
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AMDGPU_GEM_DOMAIN_VRAM, 0, NULL, &bo);
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AMDGPU_GEM_DOMAIN_VRAM,
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AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
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NULL, &bo);
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if (r)
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return r;
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@ -948,7 +952,9 @@ int amdgpu_uvd_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
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int r, i;
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r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true,
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AMDGPU_GEM_DOMAIN_VRAM, 0, NULL, &bo);
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AMDGPU_GEM_DOMAIN_VRAM,
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AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
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NULL, &bo);
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if (r)
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return r;
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@ -141,7 +141,9 @@ int amdgpu_vce_sw_init(struct amdgpu_device *adev, unsigned long size)
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/* allocate firmware, stack and heap BO */
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r = amdgpu_bo_create(adev, size, PAGE_SIZE, true,
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AMDGPU_GEM_DOMAIN_VRAM, 0, NULL, &adev->vce.vcpu_bo);
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AMDGPU_GEM_DOMAIN_VRAM,
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AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
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NULL, &adev->vce.vcpu_bo);
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if (r) {
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dev_err(adev->dev, "(%d) failed to allocate VCE bo\n", r);
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return r;
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@ -1099,7 +1099,9 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
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r = amdgpu_bo_create(adev, AMDGPU_VM_PTE_COUNT * 8,
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AMDGPU_GPU_PAGE_SIZE, true,
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AMDGPU_GEM_DOMAIN_VRAM, 0, NULL, &pt);
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AMDGPU_GEM_DOMAIN_VRAM,
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AMDGPU_GEM_CREATE_NO_CPU_ACCESS,
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NULL, &pt);
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if (r)
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goto error_free;
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@ -1299,7 +1301,8 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm)
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vm->page_directory_fence = NULL;
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r = amdgpu_bo_create(adev, pd_size, align, true,
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AMDGPU_GEM_DOMAIN_VRAM, 0,
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AMDGPU_GEM_DOMAIN_VRAM,
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AMDGPU_GEM_CREATE_NO_CPU_ACCESS,
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NULL, &vm->page_directory);
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if (r)
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return r;
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@ -762,7 +762,9 @@ int fiji_smu_init(struct amdgpu_device *adev)
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/* Allocate FW image data structure and header buffer */
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ret = amdgpu_bo_create(adev, image_size, PAGE_SIZE,
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true, AMDGPU_GEM_DOMAIN_VRAM, 0, NULL, toc_buf);
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true, AMDGPU_GEM_DOMAIN_VRAM,
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AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
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NULL, toc_buf);
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if (ret) {
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DRM_ERROR("Failed to allocate memory for TOC buffer\n");
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return -ENOMEM;
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@ -770,7 +772,9 @@ int fiji_smu_init(struct amdgpu_device *adev)
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/* Allocate buffer for SMU internal buffer */
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ret = amdgpu_bo_create(adev, smu_internal_buffer_size, PAGE_SIZE,
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true, AMDGPU_GEM_DOMAIN_VRAM, 0, NULL, smu_buf);
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true, AMDGPU_GEM_DOMAIN_VRAM,
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AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
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NULL, smu_buf);
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if (ret) {
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DRM_ERROR("Failed to allocate memory for SMU internal buffer\n");
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return -ENOMEM;
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@ -3786,7 +3786,9 @@ static int gfx_v7_0_rlc_init(struct amdgpu_device *adev)
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/* save restore block */
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if (adev->gfx.rlc.save_restore_obj == NULL) {
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r = amdgpu_bo_create(adev, dws * 4, PAGE_SIZE, true,
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AMDGPU_GEM_DOMAIN_VRAM, 0, NULL, &adev->gfx.rlc.save_restore_obj);
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AMDGPU_GEM_DOMAIN_VRAM,
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AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
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NULL, &adev->gfx.rlc.save_restore_obj);
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if (r) {
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dev_warn(adev->dev, "(%d) create RLC sr bo failed\n", r);
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return r;
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@ -3827,7 +3829,9 @@ static int gfx_v7_0_rlc_init(struct amdgpu_device *adev)
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if (adev->gfx.rlc.clear_state_obj == NULL) {
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r = amdgpu_bo_create(adev, dws * 4, PAGE_SIZE, true,
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AMDGPU_GEM_DOMAIN_VRAM, 0, NULL, &adev->gfx.rlc.clear_state_obj);
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AMDGPU_GEM_DOMAIN_VRAM,
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AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
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NULL, &adev->gfx.rlc.clear_state_obj);
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if (r) {
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dev_warn(adev->dev, "(%d) create RLC c bo failed\n", r);
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gfx_v7_0_rlc_fini(adev);
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@ -3864,7 +3868,9 @@ static int gfx_v7_0_rlc_init(struct amdgpu_device *adev)
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if (adev->gfx.rlc.cp_table_size) {
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if (adev->gfx.rlc.cp_table_obj == NULL) {
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r = amdgpu_bo_create(adev, adev->gfx.rlc.cp_table_size, PAGE_SIZE, true,
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AMDGPU_GEM_DOMAIN_VRAM, 0, NULL, &adev->gfx.rlc.cp_table_obj);
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AMDGPU_GEM_DOMAIN_VRAM,
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AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
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NULL, &adev->gfx.rlc.cp_table_obj);
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if (r) {
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dev_warn(adev->dev, "(%d) create RLC cp table bo failed\n", r);
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gfx_v7_0_rlc_fini(adev);
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@ -623,7 +623,9 @@ int iceland_smu_init(struct amdgpu_device *adev)
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/* Allocate FW image data structure and header buffer */
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ret = amdgpu_bo_create(adev, image_size, PAGE_SIZE,
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true, AMDGPU_GEM_DOMAIN_VRAM, 0, NULL, toc_buf);
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true, AMDGPU_GEM_DOMAIN_VRAM,
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AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
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NULL, toc_buf);
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if (ret) {
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DRM_ERROR("Failed to allocate memory for TOC buffer\n");
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return -ENOMEM;
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@ -761,7 +761,9 @@ int tonga_smu_init(struct amdgpu_device *adev)
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/* Allocate FW image data structure and header buffer */
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ret = amdgpu_bo_create(adev, image_size, PAGE_SIZE,
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true, AMDGPU_GEM_DOMAIN_VRAM, 0, NULL, toc_buf);
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true, AMDGPU_GEM_DOMAIN_VRAM,
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AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
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NULL, toc_buf);
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if (ret) {
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DRM_ERROR("Failed to allocate memory for TOC buffer\n");
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return -ENOMEM;
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@ -769,7 +771,9 @@ int tonga_smu_init(struct amdgpu_device *adev)
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/* Allocate buffer for SMU internal buffer */
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ret = amdgpu_bo_create(adev, smu_internal_buffer_size, PAGE_SIZE,
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true, AMDGPU_GEM_DOMAIN_VRAM, 0, NULL, smu_buf);
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true, AMDGPU_GEM_DOMAIN_VRAM,
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AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
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NULL, smu_buf);
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if (ret) {
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DRM_ERROR("Failed to allocate memory for SMU internal buffer\n");
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return -ENOMEM;
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