i2c: tegra: Initialize div-clk rate unconditionally

It doesn't make sense to conditionalize the div-clk rate changes because
rate is fixed and it won't ever change once it's set at the driver's probe
time. All further changes are NO-OPs because CCF caches rate and skips
rate-change if rate is unchanged.

Reviewed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
This commit is contained in:
Dmitry Osipenko 2020-09-30 01:18:48 +03:00 committed by Wolfram Sang
parent ed022e5dd3
commit 8548a75f3e

View File

@ -293,7 +293,7 @@ struct tegra_i2c_dev {
bool is_curr_atomic_xfer;
};
static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev, bool clk_reinit);
static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev);
static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val,
unsigned long reg)
@ -691,7 +691,7 @@ static int __maybe_unused tegra_i2c_runtime_resume(struct device *dev)
* domain ON.
*/
if (i2c_dev->is_vi) {
ret = tegra_i2c_init(i2c_dev, true);
ret = tegra_i2c_init(i2c_dev);
if (ret)
goto disable_div_clk;
}
@ -778,7 +778,7 @@ static void tegra_i2c_vi_init(struct tegra_i2c_dev *i2c_dev)
i2c_writel(i2c_dev, 0x0, I2C_TLOW_SEXT);
}
static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev, bool clk_reinit)
static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev)
{
u32 val;
int err;
@ -836,16 +836,14 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev, bool clk_reinit)
if (i2c_dev->hw->has_interface_timing_reg && tsu_thd)
i2c_writel(i2c_dev, tsu_thd, I2C_INTERFACE_TIMING_1);
if (!clk_reinit) {
clk_multiplier = (tlow + thigh + 2);
clk_multiplier *= (i2c_dev->clk_divisor_non_hs_mode + 1);
err = clk_set_rate(i2c_dev->div_clk,
i2c_dev->bus_clk_rate * clk_multiplier);
if (err) {
dev_err(i2c_dev->dev,
"failed changing clock rate: %d\n", err);
return err;
}
clk_multiplier = tlow + thigh + 2;
clk_multiplier *= i2c_dev->clk_divisor_non_hs_mode + 1;
err = clk_set_rate(i2c_dev->div_clk,
i2c_dev->bus_clk_rate * clk_multiplier);
if (err) {
dev_err(i2c_dev->dev, "failed to set div-clk rate: %d\n", err);
return err;
}
if (!i2c_dev->is_dvc && !i2c_dev->is_vi) {
@ -1319,7 +1317,7 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
if (!time_left && !completion_done(&i2c_dev->dma_complete)) {
dev_err(i2c_dev->dev, "DMA transfer timeout\n");
tegra_i2c_init(i2c_dev, true);
tegra_i2c_init(i2c_dev);
return -ETIMEDOUT;
}
@ -1340,7 +1338,7 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
if (time_left == 0) {
dev_err(i2c_dev->dev, "i2c transfer timed out\n");
tegra_i2c_init(i2c_dev, true);
tegra_i2c_init(i2c_dev);
return -ETIMEDOUT;
}
@ -1352,7 +1350,7 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
if (likely(i2c_dev->msg_err == I2C_ERR_NONE))
return 0;
tegra_i2c_init(i2c_dev, true);
tegra_i2c_init(i2c_dev);
/* start recovery upon arbitration loss in single master mode */
if (i2c_dev->msg_err == I2C_ERR_ARBITRATION_LOST) {
if (!i2c_dev->is_multimaster_mode)
@ -1811,7 +1809,7 @@ static int tegra_i2c_probe(struct platform_device *pdev)
if (ret < 0)
goto disable_div_clk;
ret = tegra_i2c_init(i2c_dev, false);
ret = tegra_i2c_init(i2c_dev);
if (ret) {
dev_err(&pdev->dev, "Failed to initialize i2c controller\n");
goto release_dma;
@ -1918,7 +1916,7 @@ static int __maybe_unused tegra_i2c_resume(struct device *dev)
if (err)
return err;
err = tegra_i2c_init(i2c_dev, false);
err = tegra_i2c_init(i2c_dev);
if (err)
return err;