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MIPS: Emulate the new MIPS R6 BALC instruction

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MIPS R6 uses the <R6 swc2 opcode for the new BALC instructions.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
This commit is contained in:
Markos Chandras 2014-11-26 15:43:11 +00:00
parent 10d962d534
commit 84fef63012
3 changed files with 19 additions and 1 deletions
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2
arch/mips/include/uapi/asm/inst.h
View File

@ -33,7 +33,7 @@ enum major_op {
sdl_op, sdr_op, swr_op, cache_op, sdl_op, sdr_op, swr_op, cache_op,
ll_op, lwc1_op, lwc2_op, bc6_op = lwc2_op, pref_op, ll_op, lwc1_op, lwc2_op, bc6_op = lwc2_op, pref_op,
lld_op, ldc1_op, ldc2_op, ld_op, lld_op, ldc1_op, ldc2_op, ld_op,
sc_op, swc1_op, swc2_op, major_3b_op, sc_op, swc1_op, swc2_op, balc6_op = swc2_op, major_3b_op,
scd_op, sdc1_op, sdc2_op, sd_op scd_op, sdc1_op, sdc2_op, sd_op
}; };

10
arch/mips/kernel/branch.c
View File

@ -789,6 +789,16 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
} }
regs->cp0_epc += 8; regs->cp0_epc += 8;
break; break;
case balc6_op:
if (!cpu_has_mips_r6) {
ret = -SIGILL;
break;
}
/* Compact branch: BALC */
regs->regs[31] = epc + 4;
epc += 4 + (insn.i_format.simmediate << 2);
regs->cp0_epc = epc;
break;
#endif #endif
case cbcond0_op: case cbcond0_op:
case cbcond1_op: case cbcond1_op:

8
arch/mips/math-emu/cp1emu.c
View File

@ -670,6 +670,14 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
*contpc = regs->cp0_epc + dec_insn.pc_inc + *contpc = regs->cp0_epc + dec_insn.pc_inc +
dec_insn.next_pc_inc; dec_insn.next_pc_inc;
return 1;
case balc6_op:
if (!cpu_has_mips_r6)
break;
regs->regs[31] = regs->cp0_epc + 4;
*contpc = regs->cp0_epc + dec_insn.pc_inc +
dec_insn.next_pc_inc;
return 1; return 1;
#endif #endif
case cop0_op: case cop0_op: