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Merge branch 'pci/hotplug'
- Enable pciehp by default if USB4 is enabled because USB4/Thunderbolt tunneling depends on native PCIe hotplug (Albert Zhou) - Make sure pciehp binds only to Downstream Ports, not Upstream Ports (Rafael J. Wysocki) - Remove unused get_mode1_ECC_cap callback in shpchp (Ian Cowan) - Enable pciehp Command Completed Interrupt only if supported to reduce confusion when looking at lspci output (Pali Rohár) * pci/hotplug: PCI: pciehp: Enable Command Completed Interrupt only if supported PCI: shpchp: Remove unused get_mode1_ECC_cap callback PCI: acpiphp: Avoid setting is_hotplug_bridge for PCIe Upstream Ports PCI/portdrv: Set PCIE_PORT_SERVICE_HP for Root and Downstream Ports only PCI: pciehp: Enable by default if USB4 enabled
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commit
84c3482963
@ -6,11 +6,14 @@
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menuconfig HOTPLUG_PCI
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bool "Support for PCI Hotplug"
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depends on PCI && SYSFS
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default y if USB4
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help
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Say Y here if you have a motherboard with a PCI Hotplug controller.
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This allows you to add and remove PCI cards while the machine is
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powered up and running.
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Thunderbolt/USB4 PCIe tunneling depends on native PCIe hotplug.
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When in doubt, say N.
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if HOTPLUG_PCI
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@ -58,9 +58,6 @@ shpchp:
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pciehp with commit 82a9e79ef132 ("PCI: pciehp: remove hpc_ops"). Clarify
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if there was a specific reason not to apply the same change to shpchp.
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* The ->get_mode1_ECC_cap callback in shpchp_hpc_ops is never invoked.
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Why was it introduced? Can it be removed?
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* The hardirq handler shpc_isr() queues events on a workqueue. It can be
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simplified by converting it to threaded IRQ handling. Use pciehp as a
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template.
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@ -411,6 +411,14 @@ static void check_hotplug_bridge(struct acpiphp_slot *slot, struct pci_dev *dev)
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if (dev->is_hotplug_bridge)
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return;
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/*
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* In the PCIe case, only Root Ports and Downstream Ports are capable of
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* accommodating hotplug devices, so avoid marking Upstream Ports as
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* "hotplug bridges".
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*/
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if (pci_is_pcie(dev) && pci_pcie_type(dev) == PCI_EXP_TYPE_UPSTREAM)
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return;
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list_for_each_entry(func, &slot->funcs, sibling) {
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if (PCI_FUNC(dev->devfn) == func->function) {
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dev->is_hotplug_bridge = 1;
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@ -811,7 +811,9 @@ static void pcie_enable_notification(struct controller *ctrl)
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else
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cmd |= PCI_EXP_SLTCTL_PDCE;
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if (!pciehp_poll_mode)
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cmd |= PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE;
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cmd |= PCI_EXP_SLTCTL_HPIE;
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if (!pciehp_poll_mode && !NO_CMD_CMPL(ctrl))
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cmd |= PCI_EXP_SLTCTL_CCIE;
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mask = (PCI_EXP_SLTCTL_PDCE | PCI_EXP_SLTCTL_ABPE |
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PCI_EXP_SLTCTL_PFDE |
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@ -311,7 +311,6 @@ struct hpc_ops {
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int (*get_latch_status)(struct slot *slot, u8 *status);
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int (*get_adapter_status)(struct slot *slot, u8 *status);
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int (*get_adapter_speed)(struct slot *slot, enum pci_bus_speed *speed);
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int (*get_mode1_ECC_cap)(struct slot *slot, u8 *mode);
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int (*get_prog_int)(struct slot *slot, u8 *prog_int);
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int (*query_power_fault)(struct slot *slot);
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void (*green_led_on)(struct slot *slot);
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@ -489,23 +489,6 @@ static int hpc_get_adapter_speed(struct slot *slot, enum pci_bus_speed *value)
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return retval;
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}
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static int hpc_get_mode1_ECC_cap(struct slot *slot, u8 *mode)
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{
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int retval = 0;
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struct controller *ctrl = slot->ctrl;
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u16 sec_bus_status = shpc_readw(ctrl, SEC_BUS_CONFIG);
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u8 pi = shpc_readb(ctrl, PROG_INTERFACE);
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if (pi == 2) {
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*mode = (sec_bus_status & 0x0100) >> 8;
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} else {
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retval = -1;
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}
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ctrl_dbg(ctrl, "Mode 1 ECC cap = %d\n", *mode);
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return retval;
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}
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static int hpc_query_power_fault(struct slot *slot)
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{
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struct controller *ctrl = slot->ctrl;
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@ -900,7 +883,6 @@ static const struct hpc_ops shpchp_hpc_ops = {
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.get_adapter_status = hpc_get_adapter_status,
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.get_adapter_speed = hpc_get_adapter_speed,
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.get_mode1_ECC_cap = hpc_get_mode1_ECC_cap,
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.get_prog_int = hpc_get_prog_int,
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.query_power_fault = hpc_query_power_fault,
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@ -4,6 +4,7 @@
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#
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config PCIEPORTBUS
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bool "PCI Express Port Bus support"
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default y if USB4
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help
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This enables PCI Express Port Bus support. Users can then enable
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support for Native Hot-Plug, Advanced Error Reporting, Power
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@ -15,9 +16,12 @@ config PCIEPORTBUS
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config HOTPLUG_PCI_PCIE
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bool "PCI Express Hotplug driver"
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depends on HOTPLUG_PCI && PCIEPORTBUS
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default y if USB4
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help
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Say Y here if you have a motherboard that supports PCI Express Native
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Hotplug
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Say Y here if you have a motherboard that supports PCIe native
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hotplug.
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Thunderbolt/USB4 PCIe tunneling depends on native PCIe hotplug.
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When in doubt, say N.
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@ -209,6 +209,8 @@ static int get_port_device_capability(struct pci_dev *dev)
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int services = 0;
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if (dev->is_hotplug_bridge &&
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(pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT ||
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pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM) &&
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(pcie_ports_native || host->native_pcie_hotplug)) {
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services |= PCIE_PORT_SERVICE_HP;
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