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drm/nvc0/gr: macro to determine fermi class, will use it in a few places
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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068da16198
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@ -675,13 +675,10 @@ nvc0_graph_create(struct drm_device *dev)
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nvc0_graph_priv *priv;
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int ret, gpc, i;
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u32 fermi;
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switch (dev_priv->chipset) {
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case 0xc0:
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case 0xc3:
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case 0xc4:
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break;
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default:
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fermi = nvc0_graph_class(dev);
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if (!fermi) {
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NV_ERROR(dev, "PGRAPH: unsupported chipset, please report!\n");
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return 0;
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}
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@ -770,6 +767,10 @@ nvc0_graph_create(struct drm_device *dev)
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NVOBJ_CLASS(dev, 0x9039, GR); /* M2MF */
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NVOBJ_MTHD (dev, 0x9039, 0x0500, nvc0_graph_mthd_page_flip);
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NVOBJ_CLASS(dev, 0x9097, GR); /* 3D */
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if (fermi >= 0x9197)
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NVOBJ_CLASS(dev, 0x9197, GR); /* 3D (NVC1-) */
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if (fermi >= 0x9297)
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NVOBJ_CLASS(dev, 0x9297, GR); /* 3D (NVC8-) */
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NVOBJ_CLASS(dev, 0x90c0, GR); /* COMPUTE */
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return 0;
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@ -72,4 +72,26 @@ struct nvc0_graph_chan {
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int nvc0_grctx_generate(struct nouveau_channel *);
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/* nvc0_graph.c uses this also to determine supported chipsets */
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static inline u32
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nvc0_graph_class(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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switch (dev_priv->chipset) {
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case 0xc0:
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case 0xc3:
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case 0xc4:
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return 0x9097;
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#if 0
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case 0xc1:
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return 0x9197;
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case 0xc8:
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return 0x9297;
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#endif
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default:
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return 0;
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}
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}
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#endif
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