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arm: Replace various irq_desc accesses
Use the proper functions. There is no need to fiddle with irq_desc. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>C Acked-by: Tony Lindgren <tony@atomide.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: arm <linux-arm-kernel@lists.infradead.org> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Link: http://lkml.kernel.org/r/20140223212737.099151500@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -120,7 +120,7 @@ static void imx6q_enable_wb(bool enable)
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int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
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{
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struct irq_desc *iomuxc_irq_desc;
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struct irq_data *iomuxc_irq_data = irq_get_irq_data(32);
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u32 val = readl_relaxed(ccm_base + CLPCR);
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val &= ~BM_CLPCR_LPM;
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@ -167,10 +167,9 @@ int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
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* 3) Software should mask IRQ #32 right after CCM Low-Power mode
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* is set (set bits 0-1 of CCM_CLPCR).
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*/
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iomuxc_irq_desc = irq_to_desc(32);
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imx_gpc_irq_unmask(&iomuxc_irq_desc->irq_data);
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imx_gpc_irq_unmask(iomuxc_irq_data);
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writel_relaxed(val, ccm_base + CLPCR);
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imx_gpc_irq_mask(&iomuxc_irq_desc->irq_data);
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imx_gpc_irq_mask(iomuxc_irq_data);
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return 0;
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}
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@ -44,13 +44,10 @@ static unsigned int irq_counter[16];
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static irqreturn_t deferred_fiq(int irq, void *dev_id)
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{
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struct irq_desc *irq_desc;
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struct irq_chip *irq_chip = NULL;
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int gpio, irq_num, fiq_count;
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struct irq_chip *irq_chip;
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irq_desc = irq_to_desc(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK));
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if (irq_desc)
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irq_chip = irq_desc->irq_data.chip;
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irq_chip = irq_get_irq_chip(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK));
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/*
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* For each handled GPIO interrupt, keep calling its interrupt handler
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